LT3965

LT3965/LT3965-1 (Rev. B)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 26

Technical content

Rev. BFor more information www.analog.com Document Feedback TYPICAL APPLICATION FEATURES DESCRIPTION 8-Switch Matrix LED Dimmer The LT®3965/LT3965-1 is an LED bypass switching device for dimming individual LEDs in a string using a common current source. It features eight individually controlled floating source 17V/330mΩ NMOS switches. The eight switches can be connected in parallel and/or in series to bypass current around one or more LEDs in a string. The LT3965 is initialized with all switches off (LEDs on), and the LT3965-1 is initialized with all switches on (LEDs off)The LT3965 /LT3965-1 uses the I 2C serial interface to communicate with the microcontroller . Each of the eight channels can be independently programmed to bypass the LED string in constant on or off, or PWM dimming with or without fade transition. Using the fade option provides 11-bit resolution logarithmic transition between PWM dimming states. The LT3965 /LT3965-1 provides an internal clock generator and also supports external clock source for PWM dimming. The LT3965/ LT3965-1 reports fault conditions for each channel such as open LED and shorted LED. The four address select pins allow 16 LT3965/LT3965-1 devices to share the I bus. The device is available in a 28-lead TSSOP package.

APPLICATIONS

n Eight Independent 17V 330mΩ NMOS Switches n Independent On/Off/Dimming Control of 1 to 4 LEDs for Each Switch n I2C Multidrop Serial Interface with Programmable Open LED and Shorted LED Fault Reporting n 16 Unique I2C Addresses n VDD Range: 2.7V to 5.5V and VIN Range: 8V to 60V n Digital Programmable 256:1 PWM Dimming n Fade T ransition Between PWM Dimming States n Optional Internal Clock Generator or External Clock Source for PWM Dimming n Open LED Overvoltage Protection n Flicker Free PWM Dimming n AEC-Q100 Qualified for Automotive Applications n Automotive LED Headlight Clusters n Large LED Displays n Automated Camera Flash Equipment n RGBW Color Mixing Lighting

3965 TA01

33µHD1 D2 D3 500mA LED+ LED+ LED– VLED 26V VIN 40V 0.01µF VIN ISP 0.5/uni03A9 ISN RT DIM/SS VC L T3955 EN/UVLO PWM VREF CTRL PGND INTVCC PWMOUT SYNC VMODE FB GND GNDK SW 28.7k 375kHz VCC SDA SCL ALERT 28k 500Hz DIMMING FREQUENCY L1: WURTH 744066330 D1: DFLS260 D2, D3: CMSD6263S 2 IN 1 PACKAGE D4, D5: PMEG6010CEH M1: VISHAY Si7309DN Q1, Q3: ZETEX FMMT593 Q2: ZETEX FMMT493 10k10k10k 20k 1µF 50V 2.2nF 1µF 0.1µF 100V 0.1µF 28k 49.9k EN/UVLO BIAS BIAS UVLO DETECT BIAS 9.09k IN4148 750/uni03A9 GND L T3965/ L T3965-1 VDD EN/UVLO EN/UVLO SDA SCL ALERT RTCLK ADDR1 ADDR2 ADDR3 ADDR4 LEDREF DRN8 DRN7 SRC8 DRN6 SRC7 DRN5 SRC6 DRN4 SRC5 DRN3 SRC4 DRN2 SRC3 DRN1 SRC2 SRC1 VIN 0.1µF 1µF 100V Matrix LED Dimmer Powered by a Buck Mode LED Driver All registered trademarks and trademarks are the property of their respective owners.

Rev. B For more information www.analog.com ABSOLUTE MAXIMUM RATINGS DRN[8:1] SRC[8:1] LEDREF DRN[8:1]-SRC[8:1] (Each Channel) EN/UVLO S DA, SCL, ALERT RTCLK ADDR[4:1] Operating Junction Temperature Range (Note 2) LT 3965E/LT3965E-1/LT3965I/LT3965I-1 –40°C to 125°C Storage Temperature Range (Note 1) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3965EFE#PBF LT3965EFE#TRPBF LT3965FE 28-Lead Plastic TSSOP –40°C to 125°C LT3965EFE-1#PBF LT3965EFE-1#TRPBF LT39651FE 28-Lead Plastic TSSOP –40°C to 125°C LT3965IFE#PBF LT3965IFE#TRPBF LT3965FE 28-Lead Plastic TSSOP –40°C to 125°C LT3965IFE-1#PBF LT3965IFE-1#TRPBF LT39651FE 28-Lead Plastic TSSOP –40°C to 125°C AUTOMOTIVE PRODUCTS** LT3965EFE#WPBF LT3965EFE#WTRPBF LT3965FE 28-Lead Plastic TSSOP –40°C to 125°C LT3965IFE#WPBF LT3965IFE#WTRPBF LT3965FE 28-Lead Plastic TSSOP –40°C to 125°C LT3965EFE-1#WPBF LT3965EFE-1#WTRPBF LT39651FE 28-Lead Plastic TSSOP –40°C to 125°C LT3965IFE-1#WPBF LT3965IFE-1#WTRPBF LT39651FE 28-Lead Plastic TSSOP –40°C to 125°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. TOP VIEW FE PACKAGE 28-LEAD PLASTIC TSSOP θ JC = 10°C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB DRN8 V IN EN/UVLO ALERT SCL SDA VDD RTCLK ADDR1 ADDR2 ADDR3 ADDR4 LEDREF SRC1 SRC8 DRN7 SRC7 DRN6 SRC6 DRN5 SRC5 DRN4 SRC4 DRN3 SRC3 DRN2 SRC2 DRN1 GND PIN CONFIGURATION

Rev. BFor more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 40V, VDD = EN/UVLO = 5V, LEDREF = 3V, SRC = 0V, ADDR[4:1] not connected, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Input Supply Voltage l 2.7 5.5 V VDD Operating IQ SCL = SDA =5V (I2C Bus Idle), RTCLK = 28k 1.3 1.8 mA VDD Shutdown IQ EN/UVLO < 0.4V EN/UVLO = 1.15V 0.1 1 µA µA VIN Operating Voltage All Channels VOTH[1:0] = VSTH[1:0] = “00” (Note 3) l 8 60 V VIN Operating IQ (Channel Not Switching) All Channels V OTH[1:0] = VSTH[1:0] = “00”, LED ON 1 1.4 mA All Channels VOTH[1:0] = VSTH[1:0] = “11”, LED OFF 2.5 3.3 mA All Channels VOTH[1:0] = “11”, VSTH[1:0] = “00”, LED ON 1.5 2 mA VIN Shutdown IQ EN/UVLO < 1.15V 0.1 1 µA DRN[8:1] Operating Voltage l VIN – 3V V SRC[8:1] Operating Voltage l VIN – 7.1V V Current Out of SRC[8:1] Pins (Each Channel) Channel LED Is On (Channel Switch Is Off) Channel LED Is Off (Channel Switch Is On) l l µA µA Switch On-Resistance 330 mΩ Switch Leakage Current DRN = 16V, VOTH[1:0] = 11 5 µA Switch T ransition Time (tr/tf) DRN to 10V through 50Ω Resistor 0.35 0.5 0.65 µs DRN[8:1] to SRC[8:1] Crowbar Protection Clamp Voltage LED or Switch Bypass Current is 500mA l 22 25 V Response Time from SW Crowbar Protection to SW Secure Protection LED or Switch Bypass Current is 500mA l 1 1.6 µs Programmable Open LED Threshold (VOTH) V OTH[1:0] = “00” (Note 3) VOTH[1:0] = “01” (LT3965-1 POR State) VOTH[1:0] = “10” VOTH[1:0] = “11” (LT3965 POR State) l l l l 4.25 8.5 12.75 4.5 13.5 4.75 9.5 14.25 V V V V Programmable Shorted LED Threshold (V STH) for LEDREF = 0V VSTH[1:0] = “00” (Note 3) VSTH[1:0] = “01” VSTH[1:0] = “10” VSTH[1:0] = “11” l l l l 0.85 0.85 0.85 0.85 1.15 1.2 1.25 1.3 V V V V Programmable Shorted LED Threshold (V STH) for LEDREF = 3V VSTH[1:0] = “00” (Note 3) VSTH[1:0] = “01” VSTH[1:0] = “10” VSTH[1:0] = “11” l l l l 0.85 3.8 6.7 9.6 1.15 4.2 7.3 10.4 V V V V Programmable Shorted LED Threshold (V STH) for LEDREF ≥ 4V VSTH[1:0] = “00” (Note 3) VSTH[1:0] = “01” VSTH[1:0] = “10” VSTH[1:0] = “11” l l l l 0.85 4.7 8.5 12.3 1.15 5.3 9.5 13.7 V V V V EN/UVLO Threshold V oltage Falling l 1.15 1.24 1.35 V EN/UVLO Threshold Voltage Rising Hyst. 10 mV EN/UVLO Input Bias Current Low EN/UVLO = 1.15V 2.2 2.7 3.2 µA EN/UVLO Input Bias Current High EN/UVLO = 1.33V 10 100 nA RTCLK Programmable Internal Oscillator or External Clock Source LED PWM Dimming Frequency (=RTCLK Programmed Oscillator Frequency/2048 or External Clock Frequency/2048) R TCLK = 80.6kΩ RTCLK = 28kΩ RTCLK = 10kΩ l l l 170 450 950 195 500 1090 220 550 1250 Hz Hz Hz

Rev. B For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 40V, VDD = EN/UVLO = 5V, LEDREF = 3V, SRC = 0V, ADDR[4:1] not connected, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS RTCLK Output Voltage (Using Internal Oscillator) RTCLK = 28kΩ 0.83 0.88 0.93 V RTCLK Input Low Threshold (RTVIL) l 0.4 V RTCLK Input High Threshold (RTVIH) l 1.5 V RTCLK Input Clock Frequency 2.5 MHz RTCLK Input Clock Pulse Width High (TRTH) 100 ns RTCLK Input Clock Pulse Width Low (TRTL) 100 ns RTCLK Input Clock Ramp Time between RTVIL and RTVIH (TRTRAMP) TRTL = 10µs 2.3 µs Address Select ADDR[4:1] Input Low l 0.25VDD V ADDR[4:1] Input High l 0.75VDD V ADDR[4:1] Pull-Up Resistance to VDD 300 500 700 kΩ Alert Status Output ALERT Output Low Voltage I ALERT = 3mA 0.3 0.4 V ALERT Output High Leakage Current ALERT = 5.5V 0.1 µA External LED Reference Voltage for Shorted LED Detection LEDREF Input Linear Range 0 4 V LEDREF Input Bias Current 0V ≤ LEDREF ≤ 4V –100 100 nA I 2C Port (See Note 5 for I2C Timing Diagram) SDA and SCL Input Threshold Rising l 0.7VDD V SDA and SCL Input Threshold Falling l 0.25VDD V SDA and SCL Input Hysteresis l 0.05VDD V SDA and SCL Input Current SDA = SCL = 0V to 5.5V –250 250 nA SDA Output Low Voltage ISDA = 3mA l 0.4 V SCL Clock Operating Frequency l 400 kHz (Repeated) Start Condition Hold Time (tHD_STA) l 0.6 μs Repeated Start Condition Set-Up Time (tSU_STA) l 0.6 µs Stop Condition Setup Time (tSU_STO) l 0.6 μs Data Hold Time Output (tHD_DAT(O)) l 0 900 ns Data Hold Time Input (tHD_DAT(I)) l 0 ns Data Set-Up Time (tSU_DAT) l 100 ns SCL Clock Low Period (tLOW) l 1.3 µs SCL Clock High Period (tHIGH) l 0.6 μs Data Rise Time (tr) CB = Capacitance of One BUS Line (pF) (Note 4) 20 + 0.1CB 300 ns Data Fall Time (tf) CB = Capacitance of One BUS Line (pF) (Note 4) 20 + 0.1CB 300 ns Input Spike Suppression Pulse Width (tSP) 50 ns Bus Free Time (tBUF) l 1.3 µs

Rev. BFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS VDD Quiescent Current vs Temperature VIN Quiescent Current vs Temperature EN/UVLO Threshold vs Temperature

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3965E/LT3965E-1 is guaranteed to meet performance specifications from the 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3965I/LT3965I-1 is guaranteed over the full –40°C to 125°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 3: V OTH[1:0] and VSTH[1:0] register bits are set by LT3965/LT3965-1 I2C commands. VOTH/VSTH programmed by VOTH[1:0]/VSTH[1:0] refer to the open/shorted LED threshold between DRN and SRC of a channel. For a channel, VIN > VSRC + VOTH + 2.5V is required for accurate open LED detection. Note 4: Rise and fall times are measured at 30% and 70% levels. Note 5: I 2C interface timing diagram. tSP tBUF tSU,STO tSP tHD,STA START CONDITION STOP CONDITION tSU,STA tHD,DATI tHD,DATO REPEATED START CONDITION REPEATED START CONDITION tSU,DAT SDA SCL tHD,STA 3965 TD TEMPERATURE (°C) –50 VDD, IQ (mA) 1.8 1.6 1.2 1.4 1.0 0.8 0 50–25 25 100

3965 G01

VDD = 5V ALL SWITCHES ARE ON ALL SWITCHES ARE OFF TEMPERATURE (°C) –50 VIN, IQ (mA) 2.8 2.6 2.4 2.2 1.8 2.0 1.6 1.2 1.4 1.0 0.8 0 50–25 25 100

3965 G02

VIN = 40V , LEDREF = 3V VOTH[1:0] = 11, VSTH[1:0] = 00, SWITCHES ARE OFF VOTH[1:0] = VSTH[1:0] = 00, SWITCHES ARE OFF VOTH[1:0] = VSTH[1:0] = 11, SWITCHES ARE ON TEMPERATURE (°C) –50 EN/UVLO THRESHOLD (V) 1.27 1.26 1.24 1.25 1.23 1.22 1.21 0 50–25 25 100

3965 G03

TA = 25°C, unless otherwise noted.

Rev. B For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switch Open LED Protection Response Time vs Temperature Open LED Threshold Rising vs VIN, Temperature for VOTH[1:0] = 00 Open LED Threshold Rising vs VIN, Temperature for VOTH[1:0] = 01 Switch On-Resistance vs Temperature Switching T ransition Time vs Temperature Shorted LED Threshold Falling vs LEDREF EN/UVLO Hysteresis Current vs Temperature R TCLK vs PWM Dimming Frequency PWM Dimming Frequency vs Temperature TEMPERATURE (°C) –50 EN/UVLO CURRENT (µA) 3.0 2.8 2.4 2.6 2.2 2.0 0 50–25 25 100

3965 G04

TEMPERATURE (°C) –50 SWITCH ON-RESISTANCE (m/uni03A9) 550 500 400 450 350 250 300 200 0 50–25 25 100

3965 G07

TEMPERATURE (°C) –50 RESPONSE TIME (µs) 1.40 1.30 1.35 1.25 1.15 1.20 1.10 1.00 1.05 0 50–25 25 100

3965 G10

VIN VOL TAGE (V) OPEN LED THRESHOLD (V) 5.0 4.8 4.6 4.4 4.2 4.9 4.7 4.5 4.3 4.1 4.0 25 4515 35 55

3965 G11

SRC = 0V –50°C 25°C 150°C VIN VOL TAGE (V) OPEN LED THRESHOLD (V) 25 4515 35 55

3965 G12

SRC = 0V –50°C 25°C 150°C TEMPERATURE (°C) –50 TRANSITION TIME (ns) 600 550 450 500 400 0 50–25 25 100

3965 G08

LEDREF (V) SHORTED LED THRESHOLD (V) 31 2 4

3965 G09

VSTH[1.0] = 00 VSTH[1.0] = 01 VSTH[1.0] = 10 VSTH[1.0] = 11VIN – SRC > 15V DIMMING FREQUENCY (Hz) RTCLK (k/uni03A9) 160 140 100 120 400 800200 600

3965 G05

TEMPERATURE (°C) –50 DIMMING FREQUENCY (Hz) 540 500 520 480 460 0 50–25 25 100

3965 G06

RTCLK = 28k TA = 25°C, unless otherwise noted.

Rev. BFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Open LED Threshold Rising vs VIN, Temperature for VOTH[1:0] = 10 Open LED Threshold Rising vs VIN, Temperature for VOTH[1:0] = 11 Shorted LED Threshold Falling vs VIN, Temperature for VOTH[1:0] = 00 Shorted LED Threshold Falling vs V IN, Temperature for VSTH[1:0] = 01 RTCLK Input Clock Frequency vs Fading Time R TCLK vs Fading Time Shorted LED Threshold Falling vs V IN, Temperature for VSTH[1:0] = 11 Shorted LED Threshold Falling vs V IN, Temperature for VSTH[1:0] = 10 Current Out of SRC Pin vs Temperature VIN VOL TAGE (V) OPEN LED THRESHOLD (V) 15.0 12.0 9.0 13.5 10.5 7.5 6.0 25 4515 35 55

3965 G13

SRC = 0V –50°C 25°C 150°C VIN VOL TAGE (V) OPEN LED THRESHOLD (V) 25 4515 35 55

3965 G14

SRC = 0V –50°C 25°C 150°C VIN VOL TAGE (V) SHORTED LED THRESHOLD (V) 1.2 1.0 1.1 0.9 0.8 25 4515 35 55

3965 G15

LEDREF = 3V SRC = 0V –50°C 25°C 150°C VIN VOL TAGE (V) SHORTED LED THRESHOLD (V) 4.2 4.0 4.1 3.9 3.8 25 4515 35 55 LEDREF = 3V SRC = 0V –50°C 25°C 150°C FADING TIME (ms) 300 RTCLK INPUT CLOCK FREQUENCY (MHz) 3.0 2.6 1.8 2.2 1.4 0.6 1.0 0.2 600 450 900

3965 G20

0.4% AND 99.6% FADING TIME (ms) 300 RTCLK (k/uni03A9) 600 450 900

3965 G21

0.4% AND 99.6% VIN VOL TAGE (V) SHORTED LED THRESHOLD (V) 25 4535 55

3965 G18

LEDREF = 3V SRC = 0V –50°C 25°C 150°C TEMPERATURE (°C) –50 CURRENT OUT OF SRC (µA) 0 50–25 25 100

3965 G19

VIN VOL TAGE (V) SHORTED LED THRESHOLD (V) 7.5 6.5 7.0 6.0 5.5 25 4515 35 55

3965 G17

LEDREF = 3V SRC = 0V –50°C 25°C 150°C TA = 25°C, unless otherwise noted.

Rev. B For more information www.analog.com PIN FUNCTIONS VIN: Input Supply Pin for LED Bypass Switches and Fault Detectors. Must be locally by-passed with a 1µF (or larger) capacitor placed close to this pin. For proper channel switch bypass operation, V IN must be at least 7.1V higher than channel source voltage. EN/UVLO: Shutdown and Undervoltage Detect Pin. An accurate 1.24V (nominal) falling threshold with exter - nally programmable hysteresis detects when V IN – SRC is okay to enable the part. Rising hysteresis is generated by an external resistor and an accurate internal 2.7µA pull-down current. EN/UVLO going high (from below the falling threshold to above the rising threshold) resets the device to an initial power-on condition, which all registers are loaded with a default value. Tie to 0.4V, or less, to dis- able the device and reduce VDD and VIN quiescent current below 1µA. Typically this pin is tied to a PNP based level shifter to ensure the part is enabled only when V IN is at least 7.1V higher than channel source voltage. ALERT: Alert Output for Fault Condition Report. ALERT pin is asserted (pulled low) to indicate that an open LED fault condition or/and a shorted LED fault condition or/and an overheat fault condition are detected. The ALERT pin is deasserted (released to high) after the part sends its Alert Response Address successfully or the fault condition is cleared by an I 2C write command. RTCLK: External PWM Clock Input and Internal Oscillator Frequency Programming Pin. Set the internal oscillator frequency using a resistor to GND if the internal oscillator is used for PWM dimming. An external clock source able to sink 500µA at 0.4V can be used for PWM dimming by driving RTCLK above and below V IH and VIL respectively to override the internal oscillator . Do not leave the RTCLK pin open. Place the resistor close to the IC if a resis - tor is used to set the internal oscillator frequency. LED PWM dimming frequency equals the programmed internal oscillator frequency divided by 2048 or the external clock frequency divided by 2048. LEDREF: LED Reference Voltage Input. This pin is used to set the normal operating VF of the LED. The shorted LED threshold VSTH can be programmed through I 2C Serial Interface to one of the following four values: 1V, VLEDREF + 1V, 2 • VLEDREF + 1V and 3 • VLEDREF + 1V. Connecting this pin to GND sets the shorted LED threshold to 1V. The internal value of VLEDREF becomes fixed at 4V if more than 4V is applied to this pin. Do not leave this pin open. VDD: Supply Voltage for I2C Serial Port and Input Supply Pin for Internal Bias and Logic. This pin sets the logic reference level of I 2C SCL and SDA pins. SCL and SDA logic levels are scaled to VDD. When the VDD pin is 2.7V or above, the I2C interface is active. The LT3965/LT3965-1 will acknowledge communications to its address and data can be written to and read back from LT3965/LT3965-1 registers. This is true even if EN/UVLO is low. However , when EN/UVLO goes high, the LT3965/LT3965-1 resets all registers to default values (see Table 1 and Table 2 for default values). Connect a 0.1μF (or larger) decoupling capacitor from this pin to ground. SCL: Clock Input Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to VDD. SDA: Data Input and Output Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to VDD. ADDR[4:1]: Programmable Address Select Pins. The device address is 010xxxx0 for all channel mode (ACMODE) write, 010xxxx1 for all channel mode (ACMODE) read, 101xxxx0 for single channel mode (SCMODE) write, and 101xxxx1 for single channel mode (SCMODE) read. ADDR[4] is MSB and ADDR[1] is LSB. A total of 16 LT3965/LT3965-1 devices can be connected to the same I 2C bus. ADDR[4:1] are pulled up to V DD through a 500k resistor inside the LT3965/LT3965-1, so ADDR[4:1] default value is 1111. Each bit of ADDR[4:1] default value can be overwritten by connecting the pin to the ground. For robust design, use an external resistor to connect ADDR pins to V DD or to GND. DRN[8:1]: Floating N-Channel FET Drain Side Pins. Tie to V DD with a 100k resistor if not used. SRC[8:1]: Floating N-Channel FET Source Side Pins. The channel source voltage (SRC[8:1]) must be at least 7.1V lower than V IN for proper channel switch bypass opera - tion. Tie to GND if not used. GND : Exposed Pad Pin. Solder the exposed pad directly to ground plane (GND).

3965 F01

12 ADDR4

11 ADDR3ADDR3

10 ADDR2ADDR2

9 ADDR1

5 SCL

6 SDA

3 EN/UVLO

Figure 1. Block Diagram

Rev. B For more information www.analog.com APPLICATIONS INFORMATION OVERVIEW The LT3965/LT3965-1 is an 8-channel LED bypass switch- ing device with I2C serial interface, designed for dimming LED strings using a common current source. Each of the eight channels can be independently programmed to bypass the LED string in constant on or off, or dimming with or without fade transition. Operation can be best understood by referring to the block diagram in Figure 1. The LT3965/LT3965-1 operates over the VDD input sup- ply range of 2.7V to 5.5V. The eight channel switches are powered by the VIN input supply and can be connected in parallel and/or in series. Each of the eight channel switches can bypass one or more LEDs up to 17V in a string. Each channel has an LED fault detector which can be pro- grammed to detect an open LED fault at one of the four threshold levels: 4.5V, 9V (default setting of LT3965-1), 13.5V and 18V (default setting of LT3965). If EN/UVLO is high, when an open LED fault is detected in a channel, the channel switch will be turned on to bypass the faulty LED to maintain the continuity of the string and for self protection. The PWM dimming for this channel is interrupted until reset by the serial interface. With a proper LED reference voltage (<4V) applied to the LEDREF pin, each channel LED fault detector can be programmed to detect a single-shorted LED fault (default setting), a 2-shorted LED fault, a 3-shorted LED fault or a 4-shorted LED fault in a multi-LED segment. When a shorted LED fault is detected in a channel, the channel switch will continue with the programmed PWM dimming. Besides LED faults, the LT3965/LT3965-1 also detects and reports an overheat fault condition (≥170°C). The LT3965/LT3965-1 asserts (pulls down) the ALERT pin to interrupt the bus master when an LED fault and/or an overheat fault is detected. The master can use the alert response address (ARA) to determine which device is send- ing the alert. The LT3965/LT3965-1 I2C serial interface contains nine command registers for configuring channel switches and LED fault detectors. It also contains two read-only fault status registers for reporting the LED and overheat faults. The I2C serial interface supports random addressing of any register . The LT3965/LT3965-1 address select pins ADDR4, ADDR3, ADDR2 and ADDR1 allow up to 16 LT3965/LT3965-1 devices to share the I2C bus. If a resistor is connected between the RTCLK pin and the ground, the internal oscillator is chosen and the LED dimming frequency is set by the resistor . If the RTCLK pin is driven by an external clock source, the external clock source is used to override the internal oscillator and the dimming frequency equals the external clock frequency divided by 2048. DIFFERENCES BETWEEN LT3965 AND LT3965-1 The LT3965 and the LT3965-1 have different default command register values, which result in different initial switch states and different open LED threshold settings after POR (Power On Reset). Otherwise they are the same (see Table 1 and Table 2 for default register values). Details of the LT3965/ LT3965-1 operation are found in the following sections. EN/UVLO SHUTDOWN The EN/UVLO pin resets the internal logic and controls whether the LT3965/LT3965-1 is enabled or is in shutdown state. The LT3965/LT3965-1 indicates that the part is in shutdown state by setting all OLFREG and SLFREG register bits high and deasserting the ALERT pin. In the shutdown state, the serial interface is alive as long as VDD is applied. Any data written while EN/UVLO is low will be reset when it transitions high. The eight channel switches are off and the alert function is disabled in shutdown condition. Because V IN must be at least 7.1V higher than the channel source voltage for proper channel switch bypass operation, it is recommended to enable the IC when V IN is at least 7.1V higher than VLED+. The PNP based level shifter shown in Figure 1 can be used to generate EN/UVLO input signal. A micropower 1.24V reference, a comparator and con - trollable current source, IS1, allow the user to accurately program the VIN – VLED+ voltage at which the IC turns on and off (see Figure 1). When EN/UVLO is above 0.7V, and below the 1.24V threshold, the small pull-down current source, IS1, (typical 2.7μA) is active. The purpose of this current is to allow the user to program the rising hyster- esis. The typical falling threshold voltage and rising thresh- old voltage can be calculated by the following equations: (VIN – VLED +)(FALLING) =1.24 • R1 +VBE (VIN – VLED +)(RISING) =2.7µA •R1 +(VIN – VLED +)(FALLING)

1 DIMMING CYCLE = 2048 RTCLK CLOCK CYCLES

3965 F02

Figure 2. POR Dimming Cycle Initialization Diagram greater than 7.1V when the part is enabled. remains off until its next dimming cycle starts. initial value to the target value in one dimming cycle. no more than the target value in down transition.

status registers can be read by the master . register is retained until it is overwritten or a POR occurs. mode and up to 400kbits/s in the fast mode. is HIGH. The bus is then free for another transmission.

3865 F04

Figure 4. LT3965/LT3965-1 Down T ransition Dimming Curve

3865 F03

Figure 3. LT3965/LT3965-1 Up T ransition Dimming Curve

Table 1. All Channel Mode (ACMODE) Command Register (8 Bits Long. See 1) All Channel Mode (ACMODE) Command section for how Table 2. Single Channel Mode (SCMODE) Command Registers (14 Bits Long. See 2) Single Channel Mode (SCMODE) Command section for how to access these register bits). Note: The dimming value range is 00000001 to 11111111. If the invalid dimming value 00000000 is received, 00000001 will be written to the register instead.

Table 3. Read-Only Fault Status Register (See 1) All Channel Mode (ACMODE) Command section and 2) Single Channel Mode (SCMODE) Command section for how to access these register bits). : The LT3965/LT3965-1 sets all OLFREG and SLFREG register bits high and asserts the ALERT pin to indicate the overheat fault condition (≥170°C).

3965 F05

Figure 5. LT3965/LT3965-1 Command Registers and Channel Control Diagram

Figure 6. LT3965/LT3965-1 I2C Serial Port ACMODE Write Protocol Figure 7. LT3965/LT3965-1 I2C Serial Port ACMODE Read Protocol with a terminating STOP condition. shaking between the master and the slave. the return of its acknowledge by the LT3965/LT3965-1. them back before sending a STOP condition.

3965 F06

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overheat fault conditions. The command is four bytes long. register , the OLFREG register and the SLFREG register . ADDR4, ADDR3, ADDR2 and ADDR1. about 47µs to transmit if 400kHz SCL clock is chosen. and channel switching off (LED turning on) is about 1µs. makes one channel switch at a time. the channel SCMREG register you want to configure.

3965 F08

0 CA 3 CA2 CA1 B[13]B[12] B[9] B[8]

Figure 8. LT3965/LT3965-1 I2C Serial Port SCMODE Write Short Format Protocol

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Figure 9. LT3965/LT3965-1 I2C Serial Port SCMODE Write Long Format Protocol (bit 3, bit 2 for VOTH[1:0] and bit 1, bit 0 for MC[1:0]). third byte is the dimming value DV[7:0]. able 2, Figure 8 and Figure 5). of the V OTH higher than the channel LED-on voltage. age is 3.8V, to set VOTH to 9V is preferred. voltage, once the application circuit is powered on. threshold (refer to Table 2, Figure 9 and Figure 5). Performance Characteristics).

Figure 10. LT3965/LT3965-1 I2C Serial Port SCMODE Read Protocol Figure 11. LT3965/LT3965-1 I2C Serial Port SCMODE Write Short Format Followed by SCMODE Read

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3965 F11

Rev. BFor more information www.analog.com APPLICATIONS INFORMATION If the LEDREF pin is set to a voltage other than 0V, the channel shorted LED threshold VSTH can be programmed to one of these four values: 1V, 1V + V LEDREF, 1V + 2 • VLEDREF and 1V + 3 • V LEDREF. The POR default V STH of the LT3965/LT3965-1 is 1V. By using this feature, each channel is able to detect 1, 2, 3, or 4 shorted LEDs. This feature can be turned off by grounding the LEDREF pin. When the LEDREF pin is set to 0V, the VSTH will be set to 1V, no matter how the VSTH[1:0] bits are programmed. The SCMODE read command (see Figure 10 and Figure 11) is used to read back the addressed channel SCMREG reg- ister bits and to get the channel LED fault conditions. The SCMODE read command is three bytes long. The first byte is the SCMODE device read address. The second byte comprises (from MSB to LSB) one addressed channel bit from the OLFREG register , one addressed channel bit from the SLFREG register , and 6 bits (VOTH[1:0], VSTH[1:0] and MC[1:0]) from the addressed SCMREG register . The third byte is the dimming value DV[7:0] from the addressed SCMREG register . Unlike the SCMODE write command, the SCMODE read command does not contain the channel address. Actually the channel address received from the last SCMODE write command is stored and will be used as the channel address for incoming SCMODE read operations. In other words, a SCMODE read command always reads the chan- nel SCMREG register addressed by the last SCMODE write command. If no SCMODE write command has ever been received, the default channel address 000 (CH1) is used. The LT3965 /LT3965-1 SCMODE device address is 101A4A3A2A1 followed by an eighth bit which is a data direction bit (R/W)— a 0 indicates a write transmission (the master writes to the addressed LT3965), a 1 indicates a read transmission (the master reads from the addressed LT3965/LT3965-1). A4A3A2A1 is an input logic value from the programmable address select pins ADDR4, ADDR3, ADDR2 and ADDR1. 3) Broadcast Mode (BCMODE) Command The BCMODE write command (see Figure 12) is used to synchronize the dimming cycles among the multiple LT3965/LT3965-1 slaves on the I 2C bus. The LT3965/ LT3965-1 slaves must be operating with a common exter- nal clock in order to be synchronized. The BCMODE write command is only one byte long: 00011000. The com - mand does not modify any register bits. It only resets each channel counter to synchronize the dimming cycles. The BCMODE read command (see Figure 13) is used to inquire about which LT3965/ LT3965-1 slave on the bus is sending the alert (see LT3965/LT3965-1 LT3965/ LT3965-1 Alert Response Protocol Using Alert Response Address (ARA) section for detail). This command is two bytes long. The first byte is the broadcast read address 00011001. The second byte 010A4A3A2A11 is sent by the alerting slave to indicate its ACMODE device read address to the master . A4A3A2A1 is an input logic value from the programmable address select pins ADDR4, ADDR3, ADDR2 and ADDR1. If the BCMODE read command is issued when no LT3965/ LT3965-1 slave on the bus is sending alert, the master receives no acknowledgement. LT3965/LT3965-1 ALERT RESPONSE PROTOCOL USING ALERT RESPONSE ADDRESS (ARA) In a system where several slaves share a common inter- rupt line, the master can use the alert response address (ARA) to determine which device initiated the interrupt. The master initiates the ARA procedure with a START con- dition and the special 7-bit ARA bus address (0001100) followed by the read bit (R) = 1. If the LT3965/LT3965-1 is asserting the ALERT pin, it acknowledges and responds by sending its 7-bit bus address (010A4A3A2A1) and a 1. While it is sending its address, it monitors the SDA pin to see if another device is sending an address at the same time using standard I 2C bus arbitration. If the LT3965/ LT3965-1 is sending a 1 and reads a 0 on the SDA pin on

the fault status bit set in the OLFREG/SLFREG register .

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3965 F13

Figure 12. LT3965/LT3965-1 I2C Serial Port BCMODE Write Protocol Figure 13. LT3965/LT3965-1 I2C Serial Port BCMODE Read Protocol will cause the ALERT pin to be asserted (pulled down). continue with the programmed PWM dimming.

Rev. BFor more information www.analog.com APPLICATIONS INFORMATION accessing the channel. If the open/shorted LED fault no longer exists when the write command is updating the command register at the I 2C STOP condition, the fault status bit matching the channel will be cleared and the ALERT pin will be deasserted. Otherwise, the fault status bit will remain set, and the ALERT pin will remain asserted or be asserted again if previously deasserted. OVERHEAT FAUL T DETECTION AND ALERT ASSERTION An overheat fault will be triggered when the IC tempera - ture exceeds 170°C. Once an overheat fault is triggered, all status bits in both the OLFREG register and the SLFREG register will be set, which will cause the ALERT pin to be asserted (pulled down) and all eight channel switches to be turned on (LEDs to be turned off) for cooling down the system. OVERHEAT STATUS BITS CLEARANCE The fault status bits set in the OLFREG register and the SLFREG register by an overheat fault can only be cleared by an ACMODE write command with all 1s in its data byte. If the IC temperature is below 160°C when the ACMODE write command is updating the ACMREG register at the I 2C STOP condition, the fault status bits will be cleared and the ALERT pin will be deasserted. Otherwise, the fault status bits will remain set, and the ALERT pin will remain asserted or be asserted again if previously deasserted. ALERT DEASSERTION The LT3965L T3965-1 deasserts the ALERT pin in either of the following two situations: 1) The LT3965/LT3965-1 has successfully completed the ARA procedure initiated by the master . Please note that the successfully completed ARA procedure does not clear fault status bits. It only deasserts the ALERT pin. 2) The LT3965 /LT3965-1 has received an ACMODE or SCMODE write command which cleared the fault status bits, resulting in the ALERT pin deassertion. PRINTED CIRCUIT BOARD LAYOUT When laying out the printed circuit board, the following checklist should be followed to ensure proper operation of the LT3965/LT3965-1: 1. C onnect the exposed pad of the package (Pin 29) directly to a large ground plane to minimize thermal and electrical impedance. Keep the LED connection traces as short as possible. 3. P lace power supply bypass capacitors as close as pos - sible to the supply pins. Place the R TCLK resistor as close as possible to the IC if a resistor is used to set LED dimming frequency. Long Wires or Cables Between LT3965/LT3965-1 and LEDs The best practice is to place the LT3965/LT3965-1 and the LEDs it controls on the same PCB and to keep LED con - nection traces as short as possible. Long wires (>>10cm) between the LT3965/ LT3965-1 and the LEDs introduce parasitic inductance that leads to an underdamped RLC response (ringing) in the switching voltage when chan - nel is switching on and off. A meter of 30-gage wire can introduce about 1µH of parasitic inductance. The ringing can trigger open LED protection due to false open LED detection, and cause the channel to bypass good LEDs. In extreme cases, the ringing may exceed absolute maximum ratings and damage the part. The parasitic inductance also generates a step voltage waveform (relative to GND) at the switches at the frequency of the switching regulator . The magnitude of this step waveform depends upon the cur- rent ripple in the source and the parasitic inductance. The fast edges of the step waveform can cause unintended toggling of the LT3965/LT3965-1 switches. RC snubber circuits (shown in Figure 14) can suppress the ringing and allow use of wires up to 1 meter with no false fault detection. The snubber should be placed close to the IC. Please note that an 8-LED string requires 9 snubbers: one snubber across each of the 8 switches and a snubber across all 8 switches (R9, C9). The 9th snubber (R9, C9) softens the stepped waveform edges.

shown here is good for most applications. rating VIN – SRC ≥ –0.3V is met. Figure 14. RC Snubbers In Long Wire Application Figure 15. Clamping Diode For LT3965/LT3965-1 Protection 15) near the IC across channel pins.

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3965 F14

Rev. BFor more information www.analog.com TYPICAL APPLICATIONS 1µF 5.7k GND 10k RT SW1 BOOST INTV CC INTVCCINTVCC FBH1-2SW2PWM1-3 CTRL1-2VREF CTRL3 47.5k 0.22µF L4 47µH FLT1-3SS3 SS1-2 10µF 50V 10µF 50V 1µF 50V 0.1µF 10µF

3965 TA02

2.2nF 499k 69.8k ISP1-2 EN/UVLO VIN ISN1-2 GATE3 SENSEP3 SENSEN3 GATE1SENSEP1SENSEN1ISP3 ISN3 L T3797 GATE2 SENSEP2 SENSEN2 TG1-2 0.50/uni03A9 500mA 0.50/uni03A9 500mA 0.05/uni03A90.05/uni03A9 M5M4 D3L3 15µH M2M1M3 TG2TG1 FBH2 44.2k1M FBH1 1M44.2k ISN2 LED2+ LED2– LED1+ LED1– D2D1 33µH 33µH 43.2k ISP2 ISN1 ISP1 0.02/uni03A9 FBH3 SYNC 10µF 50V 0.1µF 50V VIN 9V TO 30V 33µF 50V 49.9k 9.09k TG3 D1, D2: DIODES DFLS260 D3: DIODES PDS360 D4, D5, D10, D11: CENTRAL SEMI CMSD6263S

2 IN 1 PACKAGE

D6, D7: NXP SEMI PMEG6010CEH D8, D9: NXP SEMI PMEG4010CEH Q1: ZETEX FMMT591 L1, L2: WURTH ELECTRONICS 7447789133 L3: WURTH ELECTRONICS 7443551151 L4: COOPER BUSSMANN SD25-470-R M1, M2: VISHAY Si7308DN M3: VISHAY Si7850DP M4, M5: VISHAY Si7309DN VC1-2 15k 22nF 1nF VC3 0.1µF 50V D5D4 INTVCC 0.1µF 16V 0.1µF 16V D11D10 SYNC 22µF 22µF 500mA VLED 26V SDAALERT5V SCL GND L T3965/ L T3965-1 CH1 EN/UVLO SCL SDA ALERT RTCLK ADDR1 ADDR2 ADDR3 ADDR4 LEDREF DRN8 DRN7 SRC8 DRN6 SRC7 DRN5 SRC6 DRN4 SRC5 DRN3 SRC4 DRN2 SRC3 DRN1 SRC2 SRC1 V IN VDD 10k 10k 10k 1µF 10V 1µF 50V 500mA VLED 26V 1µF 50V1µF SET DIV VIN GND 350kHz SYNC OUT L TC69000.1µF 10V 10µF 50V 60.4k GND L T3965/ L T3965-1 CH2 EN/UVLO SCL SDA ALERT RTCLK ADDR1 ADDR2 ADDR3 ADDR4 LEDREF DRN8 DRN7 SRC8 DRN6 SRC7 DRN5 SRC6 DRN4 SRC5 DRN3 SRC4 DRN2 SRC3 DRN1 SRC2 SRC1 V INVDD BIAS VOUT BIAS = VOUT + INTVCC + 5V VOUT Matrix LED Dimmer Powered by a Dual Buck Mode LED Driver with a Boost Pre-Regulator

Rev. B For more information www.analog.com PACKAGE DESCRIPTION FE28 (EB) TSSOP REV L 0117 0.09 – 0.20 (.0035 – .0079) 0° – 8° 0.25 REF 0.50 – 0.75 (.020 – .030) 4.30 – 4.50* (.169 – .177) 1 3 4 5 6 7 8 9 10 11 12 13 14 19 20 22 21 15 16 18 17 9.60 – 9.80* (.378 – .386) 4.75 (.187) 2.74 (.108) 28 27 26 2524 23 1.20 (.047) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 2RECOMMENDED SOLDER PAD LAYOUT EXPOSED PAD HEAT SINK ON BOTTOM OF PACKAGE0.45 ±0.05

0.65 BSC

4.50 ±0.10 6.60 ±0.10 1.05 ±0.10 4.75 (.187) 2.74 (.108) MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE SEE NOTE 4 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT 6.40 (.252) BSC 28-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev L) Exposed Pad Variation EB

Rev. BFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 04/17 Added LT3965-1 Option Clarified Block Diagram All B 12/19 Added Automotive Products 2

Rev. B For more information www.analog.com  ANALOG DEVICES, INC. 2016-2019 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LT3795 High Side 110V, 1MHz LED Driver with 3000:1 PWM Dimming with Spread Spectrum Frequency Modulation VIN: 4.5V to 110V, VOUT(MAX) = 110V, 3000:1 PWM, 20:1 Analog, ISD < 1µA, LT3952 60V, 4A LED Driver with 4000:1 PWM Dimming with Spread Spectrum V IN: 3V to 42V, VOUT(MAX) = 60V, 4000:1 PWM, 20:1 Analog, ISD < 1µA, LT3797 T riple Output LED Driver Controller with 3000:1 PWM Dimming V IN: 2.5V to 90V, VOUT(MAX) = 100V, 3000:1 PWM, 20:1 Analog, ISD < 1µA, 7mm × 8mm QFN-52 Package LT3756/LT3756-1/ LT3756-2 High Side 100V, 1MHz LED Controller with 3000:1 PWM Dimming V IN: 6V to 100V, VOUT: 5V to 100V, 3000:1 PWM, 20:1 Analog, ISD < µA, 3mm × 3mm QFN-16 and MSOP-16E Packages IVINP L T3952 VIN VC IVINCOMP SYNC/SPRD TG TG ISN ISMON ISP ISN ISMON ISP DIM PWM CTRL VREF FB GNDEN/UVLO OVLO SS RT INTVCC INTVCC

3965 TA03

2.2µF 4.7µF 50V 0.1µF6.8nF 0.1µF 340k 60.4k 14.7k 365k 249k 64.9k 1.5k IVINN SW SW 22µH 10µF 25V VIN 6V TO 18V 1µF 25V SHORTLED OPENLED SHORTLED OPENLED 100k100k 350kHz SYNC 130k 69.8k L T3470 5V REGULATOR 0.25/uni03A9M1 TG ISPISN LED+ LED– 22µF D2 D6

8 LEDs

1µF 50V SW 0.1µF 100V GND L T3965/ L T3965-1 RTCLK350kHz SYNC (170Hz PWM) SDA SCL ALERT ADDR1 EN/UVLOEN/UVLO D1, D6: DIODES DFLS260 D2, D3: NXP SEMI PMEG6010CEH D4, D5: CENTRAL SEMI CMSD6263S L1: WURTH 74437349220 22µH L2: WURTH 74408943330 33µH Q1, Q2: ZETEX FMMT591 M1: VISHAY Si7415DN VDD ADDR2 ADDR3 ADDR4 LEDREF BIAS 10V DRN8 DRN7 SRC8 DRN6 SRC7 DRN5 SRC6 DRN4 SRC5 DRN3 SRC4 DRN2 SRC3 DRN1 SRC2 SRC1 V IN 10k 10k 10k100k SDA SCL ALERT 10µF 10V 33µH INTVCC L TC6900 DIV OUT SET GND 0.1µF LED+ 49.9k EN/UVLO BIAS BIAS UVLO DETECT 9.09k Matrix LED Dimmer Powered by a Boost-Buck LED Driver