LT3950EMSE

LT3950 AD | Alldatasheet

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Technical content

Rev. 0For more information www.analog.com Document Feedback TYPICAL APPLICATION FEATURES DESCRIPTION 60V, 1.5A LED Driver with Internal Exponential Scale Dimming The LT®3950 is a multitopology DC/DC converter designed specifically to drive high current LEDs. It contains a 1.5A, 60V DMOS switch and supports an external PWM dim - ming PMOS. The LT3950 has an internal PWM generator for dimming that maps an analog control signal to an exponential scale used to define PWM dimming duty ratio. Using an exponential scale to define duty ratio preserves dimming resolution across a wide range of LED current. In addition to operating as a constant current source, the LT3950 also provides output voltage regulation. This can be used to prevent damage to the part in case of open LED events. A programmable switching frequency offers flex- ibility in design for higher efficiency or reduced compo - nent size. Enabling spread spectrum frequency modula - tion reduces EMI. The switching frequency can also easily be synchronized by driving the SYNC/SPRD pin with an external clock. LED current is programmed with a single external sense resistor and can be adjusted from zero to full-scale by an analog signal at the CTRL pin. 10W LED Driver for Automotive, 2MHz, 90% Efficient Efficiency and Power Loss with and without PWM Dimming

APPLICATIONS

n Operates in Boost, SEPIC, Buck Mode and Buck- Boost Mode n 128:1 Internal Exponential Scale PWM Dimming n Wide Input Voltage Range (3V to 60V) n 1.5A, 60V Internal Switch n 20000:1 External PWM Dimming at 100Hz n ±2% LED Current and Output Voltage Regulation n PMOS Switch Driver for PWM Dimming n LED Short/Open Protection and Indication n Constant Voltage and Constant Current Regulation n Adjustable 300kHz to 2MHz Switching Frequency n Adjustable 100Hz to 1kHz PWM Generator Frequency n Internal Spread Spectrum Frequency Modulation n Easy Synchronization to External Clock n Programmable VIN UVLO with Hysteresis n Available in 16-Lead MSOP Package n Display Backlighting n Automotive and Avionic Lighting All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. Patents, including 7199560, 7321203, 7746300, 8116045. Patents pending. L T3950

3950 TA01a

2.2µF 24.9k FB PWMTG VC PWM INTVCC CTRL ISP ISN SW 1µF 220pF 2.2µF 10W LED POWER (DERATED BELOW VIN = 7V)267k 39k FAUL TFAUL T VIN EN/UVLO VIN 3V TO16V DC TRANSIENT TO 48V 100k 100k SYNC/SPRD RP RT GND 300Hz 182k 2MHz 45.3k 10µH 1/uni03A9 P LOSS, EFF . 10% PWM DIMMING P LOSS 100% ON EFFICIENCY 100% ON EFFICIENCY (EFF .) AT 10% PWM DIMMING V IN (V) 100 0.500 0.750 1.000 1.250 1.500 1.750 2.000 2.250 2.500 2.750 3.000 EFFICIENCY (%) POWER LOSS (W)

3950 TA01b

Rev. 0 For more information www.analog.com PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS Operating Junction Temperature (Notes 3, 5) (Note 1) ISP ISN FB VC CTRL SYNC/SPRD PWM RP PWMTG SW SW VIN EN/UVLO INTVCC FAUL T RT TOP VIEW MSE PACKAGE 16-LEAD PLASTIC MSOP θJA = 40°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB GND ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3950EMSE#PBF LT3950EMSE#TRPBF 3950 16-Lead Plastic MSOP –40°C to 125°C LT3950JMSE#PBF LT3950JMSE#TRPBF 3950 16-Lead Plastic MSOP –40°C to 150°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

Rev. 0For more information www.analog.com

ELECTRICAL CHARACTERISTICS

PARAMETER CONDITIONS MIN TYP MAX UNITS Operating Supply Range l 3 60 V Input (VIN) Quiescent Current VFB = 1.25V, Not Switching 1.8 mA Input (VIN) Shutdown Current EN/UVLO = 0V EN/UVLO = 0.9V, CTRL = 0V 130 200 µA µA EN/UVLO Shutdown Threshold (Falling) l 1.15 1.25 1.35 V EN/UVLO Rising Hysteresis EN/UVLO Rising 32 mV EN/UVLO Input Low Voltage IVIN < 1µA 0.4 V EN/UVLO Pin Current (Device Off) EN/UVLO = 1.2V 2 µA EN/UVLO Pin Current (Device On) EN/UVLO = 1.35V 0 µA Internal LDO Regulator Internal Regulator Voltage Not Switching, 1mA External Load l 2.94 3 3.06 V Line Regulation Not Switching, 3.3V < VIN < 60V 0.025 %/V Load Regulation Not Switching, 0.1mA < ILOAD <10mA 0.05 %/mA Max. Output Current Not Switching, INTVCC = 2.8V 20 mA Dropout Voltage Not Switching, INTVCC Droop 1%, ILOAD = 10mA 350 mV LED Current Regulation (Note 4) ISP Common Mode Voltage Range l 4 60 V Current Sense Threshold (VISP – VISN) CTRL = 1.5V (100%) CTRL = 0.7V (50%) CTRL = 0.3V (10%) l l l 248 121 250 125 255 129 mV mV mV Current Sense Threshold (VISP – VISN) at GND ISP = 0V 85 mV CTRL OFF Threshold (Falling) l 85 100 125 mV CTRL OFF Hysteresis 35 mV CTRL Pin Current –100 100 nA ISP, ISN Pin Current (Combined) CTRL = 1.5V (Full Scale) CTRL = 0V (Stopped) 450 0.1 µA µA Error Amp Transconductance 60 µS Error Amp Output Resistance 20 MΩ LED Voltage Regulation (Note 4) FB Regulation Threshold (VFB) l 1.188 1.176 1.2 1.2 1.212 1.224 V V FB Pin Current Current Out of Pin 20 100 nA ISP Voltage Regulation Threshold 60 V FB Amplifier Transconductance 500 µS FB Amplifier Output Resistance 20 MΩ Oscillator Programmed Switching Frequency (fSW) RT = 45.3k SYNC/SPRD = 0V RT = 402k SYNC/SPRD = 0V l l 1880 276 2000 300 2120 324 kHz kHz Spread Spectrum Modulation Depth SYNC/SPRD = 3V 25 % Minimum Off Time l 35 55 75 ns Minimum On Time 45 ns The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, VIN = EN/UVLO = 12V, FAUL T = 100kΩ to 12V, ISP = ISN = 48V, SYNC/SPRD = 0V, CTRL = 1.5V, PWM = 3V, INTVCC = 1μF to GND, RT = 45.3kΩ to GND, RP = 100kΩ to GND, FB = 1V.

Rev. 0 For more information www.analog.com Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Do not apply a positive or negative voltage to INTVCC, PWMTG, or RT pin, otherwise permanent damage may occur . Use these pins only as directed in the Pin Functions and Applications Information sections. Note 3: The LT3950E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the −40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The PARAMETER CONDITIONS MIN TYP MAX UNITS SYNC/SPRD Threshold (Rising) 0.85 V SYNC/SPRD Hysteresis 50 mV SYNC/SPRD Internal Pull-Down Resistance 100 kΩ Minimum SYNC Pulse Width 25 ns Power Switch RDS(ON) ISW = 500mA 200 mΩ Switch Current Limit l 1.5 1.65 1.8 A Switch Leakage Current VSW = 60V, EN/UVLO = 0V 3 µA External PMOS Driver PWMTG ON (VISP – VPWMTG) Voltage 6 7.5 9 V PWMTG OFF (VISP – VPWMTG) Voltage 0 0.3 V Turn-on Time CLOAD = 470pF 100 ns Turn-off Time CLOAD = 470pF 100 ns Fault Detection and Reporting LED Open Threshold VISP – VISN = 0 VFB – 37mV VFB – 23mV VFB – 9mV V FB Overvoltage Threshold VFB + 60mV VFB + 80mV VFB + 100mV V FB Shorted LED Threshold 300 330 mV Overcurrent Protection Threshold (VISP – VISN) VISP = 60V 600 700 800 mV FAULT Pin Pull Down Current VFAULT = 0.2V, VFB = 1.25V 1 mA FAULT Pin Leakage Current VFAULT = 3V, VFB = 0.7V –100 100 nA Internal PWM Generator PWM Pin Voltage for Max. Duty Ratio 1.2 V PWM Pin Voltage for Min. Duty Ratio 0.2 V Min. Duty Ratio VPWM = 0.2V 0.78 % Max. Duty Ratio VPWM = 1.2V 100 % PWM Pin Voltage Step per Duty Ratio Setting 7.8 mV PWM Pin Current PWM = 3V –100 100 nA PWM Clock Frequency RP = 100k 400 Hz Fraction of INTVCC for 10% Duty Ratio 27.2 % The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, VIN = EN/UVLO = 12V, FAUL T = 100kΩ to 12V, ISP = ISN = 48V, SYNC/SPRD = 0V, CTRL = 1.5V, PWM = 3V, INTVCC = 1μF to GND, RT = 45.3kΩ to GND, RP = 100kΩ to GND, FB = 1V. LT3950J is guaranteed over the −40°C to 150°C operating junction temperature range. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: LED Amplifier parameters measured in a servo loop with VC. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device.

Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS PWM Generator Duty Ratio vs PWM Pin Voltage Switching Frequency vs RT Switching Frequency vs Temperature Internal PWM Frequency vs RP ISP–ISN Full-Scale Threshold vs CTRL Pin Voltage ISP–ISN Threshold (Full Scale) vs Temperature ISP–ISN Threshold (50% Scale) vs Temperature ISP–ISN Threshold (10% Scale) vs Temperature ISP–ISN Threshold (ISP = 0V) vs Temperature PWM PIN VOL TAGE (V) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.5 100 PWM DIMMING DUTY RATIO (%)

3950 G01

R T (k/uni03A9) 100 1000 0.1 SWITCHING FREQUENCY (MHz)

3950 G02

R P (k/uni03A9) 100 1000 0.1 PWM FREQUENCY (kHz)

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V CTRL (V) 0.4 0.8 1.2 1.6 2.0 –50 100 150 200 250 300 ISP–ISN (mV)

3950 G05

TEMPERATURE (°C) –50 –30 –10 110 130 150 240 242 244 246 248 250 252 254 256 258 260 V ISP–ISN (mV)

3950 G06

TEMPERATURE (°C) –50 –30 –10 110 130 150 115 117 119 121 123 125 127 129 131 133 135 V ISP–ISN (mV)

3950 G07

TEMPERATURE (°C) –50 –30 –10 110 130 150 V ISP–ISN (mV)

3950 G08

TEMPERATURE (°C) –50 –30 –10 110 130 150 100 V ISP–ISN (mV)

3950 G09

TEMPERATURE (°C) –50 –30 –10 110 130 150 1800 1840 1880 1920 1960 2000 2040 2080 2120 2160 2200 F SW RT = 45.3k (kHz)

3950 G03

Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS FB Regulation Voltage vs Temperature FB Overvoltage Threshold (Rising) vs Temperature FB Short LED Threshold (Falling) vs Temperature FB Open LED Threshold (Rising) vs Temperature C/10 Threshold (Falling) vs Temperature ISP–ISN Regulation Voltage vs FB Pin Voltage EN/UVLO Threshold vs Temperature EN/UVLO Pin Current vs Temperature ISP Regulation Engagement Point TEMPERATURE (°C) –55 –25 125 155 1.160 1.168 1.176 1.184 1.192 1.200 1.208 1.216 1.224 1.232 1.240 V FB (V)

3950 G10

TEMPERATURE (°C) –50 100 150 1.26 1.27 1.28 1.29 1.30 1.31 1.32 FB OVERVOL TAGE THRESHOLD (V)

3950 G11

TEMPERATURE (°C) –50 100 150 300 305 310 315 320 325 330 FB SHORT LED THRESHOLD (mV)

3950 G12

ISP = ISN=12V TEMPERATURE (°C) –50 100 150 1.10 1.12 1.14 1.16 1.18 1.20 FB OPEN LED THRESHOLD (V)

3950 G13

TEMPERATURE (°C) –55 –25 125 155 1.150 1.165 1.180 1.195 1.210 1.225 1.240 1.255 1.270 1.285 1.300 EN/UVLO THRESHOLD

3950 G16

TEMPERATURE (°C) –50 100 150 C/10 THRESHOLD (mV)

3950 G14

VISP = 12V VFB = 1.2V TEMPERATURE (°C) –55 –25 125 155 1.00 1.30 1.60 1.90 2.20 2.50 2.80 3.10 3.40 3.70 4.00 CURRENT INTO PIN (µA)

3950 G17

V FB (V) 1.14 1.15 1.16 1.17 1.18 1.19 1.20 120 180 240 300 V ISP–ISN (mV)

3950 G15

VISP = 12V VCTRL = 1.5V TEMPERATURE (°C) –50 –25 100 125 150 V ISP (V)

3950 G18

Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS INTVCC Voltage vs Temperature INTVCC Dropout vs Temperature Minimum Off Time vs Temperature Switch RDS(ON) vs Temperature PWMTG On-Voltage vs Temperature TEMPERATURE (°C) –55 –25 125 155 2.900 2.920 2.940 2.960 2.980 3.000 3.020 3.040 3.060 3.080 3.100 INTV CC (V)

3950 G19

I LOAD = 10mA TEMPERATURE (°C) –55 –25 125 155 232 252 273 293 314 334 355 375 396 416 437 V IN – INTV CC (mV)

3950 G20

TEMPERATURE (°C) –50 –25 100 125 150 100 130 160 190 220 250 280 310 340 370 400 SWITCH R DS(ON) (m/uni03A9)

3950 G22

TEMPERATURE (°C) –55 –25 125 155 6.5 6.6 6.7 6.8 6.9 7.0 7.1 7.2 7.3 7.4 7.5 V ISP PWMTG (V)

3950 G23

TEMPERATURE (°C) –50 –25 100 125 150 T OFF(MIN) (ns)

3950 G21

Rev. 0 For more information www.analog.com PIN FUNCTIONS ISP: Kelvin connect this pin to the high side of the LED current feedback sense resistor . Current in the sense resistor is 250mV/ R SENSE while the CTRL pin voltage exceeds 1.2V. It varies as (CTRL – 200mV)/(4 • RSENSE) if the voltage at the CTRL pin is between 200mV and 1.2V. ISN: Kelvin connect this pin to the low side of the LED current feedback sense resistor , see ISP for more details. If the voltage difference VISP – VISN ever exceeds 700mV (typ.), switching stops and the part re-enters soft-start. The PWMTG pin goes high to disconnect the load, and the part signals an overcurrent event. FB: Output Voltage Feedback Pin. This pin is used for output voltage regulation and limiting. Tie this pin to a resistive voltage divider from the output voltage. When the voltage at FB approaches 1.2V, the control loop will reduce switch current to regulate output voltage such that FB remains around 1.2V. If LED current falls below 10% (typ.) of full scale while the output voltage is in regulation, an LED Open event is signaled. If the voltage at FB exceeds 1.3V (typ.), PWMTG is driven high, switching stops, and the device signals an overvoltage event. If the voltage at FB falls below 300mV (typ.) after soft-start has finished, an LED Short event is signaled at FAUL T, PWMTG is driven high, switching stops and the part re-enters soft-start. See the Applications section for more info on the use of the FB pin for general applications. CTRL: Analog Alternative to PWM Dimming. Tie to INTVCC to set RSENSE current to full scale. Current in RSENSE varies as (CTRL – 200mV)/(4 • RSENSE) when the voltage at the CTRL pin varies from 200mV to 1.2V. VC: An internal error amplifier node used for compensa- tion. Stabilize the loop by connecting a capacitor or RC network between this pin and ground. PWM: Pulse Width Modulation (PWM) Dimming Generator Control Pin. Connect an analog signal to this pin to use the internal exponential scale dimming PWM generator . When the voltage at this pin remains between 0.2V and 1.2V, the duty ratio of the internal PWM generator will vary with the pin voltage. A linear ramp of voltage on the PWM pin between 0.2V and 1.2V and lasting many PWM dimming cycles (set by RP) will result in an exponentially increasing PWM duty ratio. An external PWM signal can also drive this pin directly if the ON and OFF voltages are above 1.3V and below 100mV, respectively. SYNC/SPRD: Switch Clock Synchronize / Spread Spectrum. Tie this pin to INTVCC to enable internal spread spectrum frequency modulation. An external clock can also drive this pin to synchronize switching. Choose RT such that the LT3950 clock would be close to the external clock, then drive this pin with that clock. INTVCC: Voltage Supply Used by Internal Circuitry. Tie a 1µF capacitor between this pin and ground. This pin is sometimes used as a reference voltage for other pins, however this pin is not intended for use as a power source for external loads, and connecting it to any external load may interfere with operation of the system. It is not recommended to connect INTV CC except as directed to LT3950. RT: Connect a resistor between this pin and ground to set the switching frequency. Do not connect anything other than a resistor to this pin or the system may not function correctly. RP: Connect a resistor between this pin and ground to set the PWM dimming generator frequency. Connect this pin to INTVCC to synchronize the PWM dimming clock to the switching clock (fPWM = fSW/4096). FAUL T: Open-Drain Fault Indication Pin Indicating Short LED, Open LED, Overvoltage and Overcurrent Faults. Tie this pin through a 100k resistor to VIN or INTVCC, or use it as an open drain signal. LT3950 pulls this pin low to signal all reported fault events. EN/UVLO: Enable/Undervoltage Lockout . When the volt- age at this pin falls below 1.25V (typ.), with approximately

Rev. 0For more information www.analog.com PIN FUNCTIONS 32mV of hysteresis when returning over 1.25V, switching stops and the part shuts down. Drive this pin high with a logic level greater than 1.4V or low with a logic level below 1V for simple ON/OFF functionality, or tie it through a resistive voltage divider to VIN for a precise input under- voltage shutdown threshold. VIN: Input Supply Pin. Must be locally bypassed. PWMTG: High Side Gate Driver for External Series PMOS Switch. This pin is used to disconnect the load for PWM dimming as well as fault events. PWMTG drives the PMOS gate between V ISP and V ISP – 7.5V (typ.) to cut off the flow of residual charge from the output capacitor when the load should be disconnected, as well as to prevent the long transient that would result from needing to recharge the output capacitor at the end of a long PWM off period. Leave open if unused. The voltage at PWMTG is limited to 7.5V (typ.) below the voltage at ISP to protect the gate of the PMOS switch. SW: Switch Pin. See PCB recommendations in the Applications section for details on reducing EMI. GND (Exposed Pad): This is the ground connection. Must be soldered to PCB ground for the device to work.

Rev. 0 For more information www.analog.com R ISP ISN SW SW FB VCCTRL SYNC/SPRD RTGND C/10 OC RP 3950 BD –1.2V VIN PWMTG LED ARRAY PWMTG –0.2V –1.3V 1.2V FBOV FBOC FBOK 1.2V 0.3V 700mV –1.25V 1.2V EN PWM INTVCC VIN EN/UVLO FAUL T LOG SCALE SLOPE COMP PWM OSCILLATOR 300Hz TO 1kHz 300kHz TO 2MHz OSCILLATOR COUNT OVRFW SOFT-START AND FAUL T LOGIC 25mV Q R S QR S ADC VIN FAUL T 1V + PWM VISP VISP – 7V BLOCK DIAGRAM

Rev. 0For more information www.analog.com OPERATION LT3950 is a constant-frequency, constant-current, con - stant voltage (CC/CV) power supply with integrated low side NMOS switch that can be configured as a boost, SEPIC, buck mode or buck-boost mode LED driver . The operation of the part can be best understood by looking at the block diagram. At the beginning of every clock cycle, the clock signal sets an SR latch controlling the switch driver . The switch turns on and connects the inductor to ground. The positive voltage drop across the induc - tor results in linearly increasing current in the inductor . The switch will remain on until the current comparator near the SR latch resets it. This reset will occur when the switch current exceeds the internal demand current. This demand current is determined by the error amplifier . The external LED current sense resistor used to program load current drives the error amplifier . The voltage drop across the sense resistor multiplied by the amplifier’s transcon- ductance establishes the demand current. With no induced offset, the error amplifier would regulate the load to zero current based on the voltage across the LED current sense resistor . To establish the positive offset in the error amplifier needed to program the LED cur - rent, a small current is intentionally pulled from only one input of the amplifier through a series resistor . The CTRL pin establishes this offset current by varying the voltage dropped across a resistor to ground. These two resistors are internal to the IC. Changing the CTRL pin voltage will vary the LED current sense resistor regulation voltage between true zero and 250mV. During constant current operation the FB pin provides overvoltage protection. While the FB pin voltage is below its regulation threshold, the FB amplifier has little effect on demand current. However , as the FB pin voltage approaches VFB, the FB amplifier has an increasingly pro- nounced effect, until eventually it dominates the demand current. When the FB pin voltage exceeds the regulation threshold by 100mV (typ.) the FAUL T pin is asserted to indicate an overvoltage event. Similarly, if the voltage at the FB pin ever falls below 300mV (typ.) (excluding start- up) then the FAUL T pin is asserted to signal a shorted LED event. In addition to regulating load current, the LED current sense amplifier also provides a digital indication of whether the load current is above or below 10% of the programmed full-scale value. If the load current drops below 10% of full-scale while the FB pin voltage is in regulation, the FAUL T pin is asserted to indicate an Open LED event. Fast overcurrent protection relies on a separate signal path than the main current sense amplifier . If the sense resis- tor voltage (VISP–VISN) exceeds 700mV (typ.), switching stops and the FAUL T pin is asserted to indicate an overcur- rent event. This event, along with Short LED, also triggers a brief interruption of switching while soft-start is reset, followed by a soft start of the switching. Three different methods for dimming the LED load are provided with LT3950. First, the voltage at the CTRL pin, which sets the sense resistor regulation threshold, pro - vides continuous, analog dimming of the LED load. In addition, two method of PWM dimming exist. The first, external PWM, relies on a user-provided PWM signal. This signal drives the PWM pin directly, causing the system to turn off and on (meaning stop and start switching, and also disconnect and reconnect the LED load to the output capacitor via PWMTG) based on the duty ratio of the PWM pin voltage. Alternatively, internal PWM dim - ming is available. Internal PWM dimming uses an internal analog-to-digital converter to translate the voltage at the PWM pin to a 7-bit digital representation. This conversion uses a lin - ear scale; every 7.8mV (typ.) the 7-bit value changes. Each particular value corresponds to a unique duty ratio that is separated exponentially from its neighbors. For example, moving by 7.8mV (typ.) near the 10% duty ratio region can result in a change from 9.6% to 10% duty ratio. Moving by the same difference, 7.8mV (typ.) near the 100% region can change the duty ratio from 96% to 100%. A smooth ramp at the PWM pin lasting many PWMTG dimming periods as set by RP will create an exponentially increasing PWM duty ratio for the LED load. This preserves dimming accuracy and resolution across a wide range of PWM dimming duty ratios.

good understanding of the part. on the PWM dimming PMOS will be discussed later . dimming will not allow very high frequency PWM signals. CTRL pin voltage appears below. Figure 1. VISP-ISN vs CTRL Pin Voltage

3950 F01

3950 F02

chosen such that their total value is between 1k and 1M.

3950 F03

connect nothing to the RT pin except this resistor . Table 1. Selected RT Values and Switching Frequency at start-up or after faults, when the output is still low. this, see the section concerning soft-start.

Table 2. Selected RP Values and PWM Dimming Frequency tion to this, LT3950 provides an optional load disconnect. works for any of the supported power stage topologies. example application circuits. INTVCC results in continuous, uninterrupted operation. value. The values of duty ratio are separated exponentially. PWM pin voltage appears below. Figure 4. PWM Duty Ratio

3950 F04

to the external clock frequency. CCM is given by the following relationship. Figure 5. LT3950 Typical EMI (VIN = 12V, VLED = 25V, ILED =

Rev. 0 For more information www.analog.com Maximum Switch and Load Current An important system parameter is the current limit. This can prevent damage to the switch and external compo - nents by limiting the maximum instantaneous current conducting through the power switch. In a well-designed system, there will be margin between the maximum switch current to drive the LED load and the switch current limit. The LT3950 offers a current limit that does not change with duty ratio and also has sufficient slope compensa - tion so that reaching the current limit during line and load transients does not result in subharmonic oscillations. A good rule of thumb for setting maximum LED current for boost and buck-boost power stages appears below. This equation assumes that the inductor selection used limits current ripple to around 30% of average current. For more information on inductor selection, see the External Component Selection section. ILED,MAX(30%ripple) ≈1.4A • VIN VISP In the boost and buck-boost mode topologies, average switch current is related to average LED current by the ratio of V IN to V ISP. In the buck topology, average LED current approximately equals average inductor current. For this reason the buck topology provides the highest possible LED current capability. The peak instantaneous switch current is thus the average LED current plus half of the peak to peak ripple current. This leads to the following result for buck mode current limit. I LED,MAX(BUCK) = 1.4A For more information about power stage topologies, review the example application circuits included below. Loop Compensation Loop compensation normally will take the form of an RC network connected between the VC pin and ground. A single capacitor can fulfill stability requirements if PCB area is extremely limited. The addition of a series resis - tor , however , will increase response speed and can also recover phase margin. A schematic diagram of the typical compensation scheme is illustrated below. APPLICATIONS INFORMATION Figure 6. L T3950 CC RC VC

3950 F06

For many cases, a 1nF capacitor and 10kΩ resistor will suffice. This is a good place to start for all applications. If settling time is unacceptable, ringing is too large, or the loop remains unstable, the information below can help. First, try reducing or eliminating the compensation resis- tor , RC, especially if transient response is ringing or under- damped. Reducing the compensation resistor will cause longer settling time and larger deviation from load steps such as PWM dimming. Next, increase the size of the compensation capacitor , CC. This will reduce the frequency of the dominant (low fre - quency) pole and thereby the unity gain frequency. It will usually be possible to stabilize the loop given a big enough compensation capacitor . Increasing the compensation capacitor slows down the transient response to line and load activity. If the compensation capacitor cannot change by a small amount to achieve stability, consider instead increasing the output capacitor or decreasing the inductor to separate the load pole and right half plane zero. EXTERNAL COMPONENT SELECTION Input and Output Capacitor Selection The input and output capacitors supply the transient cur- rent for the power stage and should be placed and cho - sen according to the transient current requirements. An X7R type ceramic capacitor is usually a good choice for both input and output capacitor . Even though X7R has less variation with temperature and DC bias voltage than many other materials, the effect of capacitance derating with voltage stress must be considered. It is generally a good rule of thumb to pick capacitors with a voltage rating about 60% higher than the application demands. The switching frequency, output current, inductor ripple current, and tolerable input voltage ripple are key param- eters to consider when determining the value of the input capacitor . Typically, boost, buck-boost mode, and SEPIC

capacitor will often suffice. equation may lead to selection of a 2.2µF input capacitor). RMS input capacitor current for the buck converter case. Table 3. Capacitor Manufacturers interact with certain EMI mitigating features in LT3950. Table 4. Schottky Rectifier Manufaturers

inductor with around 30% peak to peak ripple. Table 5. Inductor Manufacturers can reduce maximum PWM dimming dynamic range. functions to aid larger systems in responding to failures. section, disconnect the load from the output capacitor . each type of fault appears at the end of this section. in place to use the LED Short fault detection.

3950 F07

with a single digital I/O pin.

as if it had just been powered on for the first time. completes the soft-start process. Figure 8. LED Short Hiccup Mode

3950 F08

the desired minimum VIN value for operation.

3950 F09

Rev. 0 For more information www.analog.com The EN/UVLO threshold has a hysteretic window to pre - vent oscillating between the ON and OFF states. When the EN/UVLO pin falls below its falling threshold (1.25V typ.), switching stops, soft-start is reset, and if an exter- nal PMOS is used according to instructions in the PWM Dimming section, the load is disconnected from the out- put capacitor . Low Voltage (SEPIC) Startup Certain power stage topologies, such as the SEPIC, may require the part to start up in the condition where ISP and ISN are both near (or at) 0V. This condition is handled dif- ferently than steady-state operation. Below around 2.5V at ISN, the part does not use the programmed offset defined by the CTRL pin, but instead uses a constant offset of around 85mV (typ.) across ISP and ISN. This ensures that the part starts in a reasonable amount of time. When ISN < 2.5V (typ), LED Open and LED Short faults are disabled. The ability of the error amplifier to tolerate an input common mode voltage of 0V should not lead the user to consider low-side sensing. Not only is the LED current sense amplifier most accurate above 4V on ISN, but also recall that ISP provides the positive rail for the driver of the external disconnect PMOS. Therefore the use of low side sensing of LED current is not recommended. Full-scale threshold accuracy is derated when VISN < 4V. Planning for Thermal Shutdown The LT3950 will automatically shut down when the inter- nal temperature is above 170°C. This shutdown is guar - anteed to always be outside of the operating region of the device. The effects of thermal shutdown are similar to that of certain load faults: switching stops, soft-start is reset, and if an external PMOS is used according to instructions in the PWM Dimming section, the load is disconnected from the output capacitor . The exposed pad of LT3950 is ground, and must be sol- dered to a good, large ground plane with many vias to aid in thermal management. A simple electrical connection is not sufficient for high-power operation, good thermal conductivity is critical. PCB Layout Guidelines and Information Printed Circuit Board (PCB) layout profoundly affects per- formance of all power applications. Proper electrical and thermal connection between the IC and outside world will make or break any system. Do not neglect the thoughtful and detailed layout of any application PCB. The exposed ground pad on the bottom of the package is the only path to ground for the IC, and it will not work correctly unless the exposed pad has a good, high-quality solder connection to a ground plane. The ground con - nection for analog functions such as RT , the compensa- tion network, and any voltage dividers for PWM or CTRL should be Kelvin connected to the exposed pad. A sepa- rate power ground should exist for the input and output capacitors and LED load. If possible, the INTV CC bypass capacitor should have its own ground. Proper power and ground planes provide both electrical and thermal connections between the IC and the outside world. It is imperative that at least one ground plane be present in any application of LT3950. Ground planes should not be interrupted by other traces, and should be continuous, very wide sheets of copper . If components connect to the ground plane by way of vias, use filled vias if possible. Connect the exposed pad of the IC to such a ground plane. Use as many vias as will fit in the exposed pad area to make the connection. Use filled vias if pos - sible. Do not copy any particular layout for the exposed pad connection, but instead use as many vias as will fit given the capabilities of the PCB manufacturer . In addition to soldering down the exposed pad, it is critical to provide a good, robust layout for the rest of the power path. Use wide traces for VIN and to connect to the load. Keep the sense resistor very close to the IC, and ensure that the ISP and ISN traces run as close to one another as possible. It is strongly recommended to not allow ISP and ISN to take different paths to the sense resistor , but instead to keep them beside one another as much as pos- sible. Minimize the total area of any SW node traces; keep the output capacitor and external catch diode as close as possible to the IC to help this. Finally, use wide traces to APPLICATIONS INFORMATION

Rev. 0For more information www.analog.com TYPICAL APPLICATIONS 100k L T3950 INTVCC

3950 TA02

1µF2.2µF 20k FB FAUL T FAUL T PWMTG PWM CTRL INTVCC SYNC/SPRD RP ISP ISNSW 2.2µF LED ARRAY 2MHz 45.3k 4.7k VIN EN/UVLO GND RT VC 10µH 500m/uni03A9 1µF 220pF INTVCC 500mA VIN 3V TO 48V D1 M1 L1: WURTH 74437324100 D1: DIODES INC. DFLS260Q M1: VISHAY SI7309 5W Buck-Boost Mode LED Driver with Spread Spectrum Frequency Modulation Efficiency and Power Loss I LED = 0.5A I LED = 0.25A I LED = 0.5A I LED = 0.25A V IN (V) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 EFFICIENCY (%) POWER LOSS (w)

3950 TA02b

connect to the external PMOS switch, if used. Note, how- ever , that the gate of the external PMOS should be con- nected by a narrow trace. Except for the external PMOS gate, avoid vias where possible in the power path. If vias are truly unavoidable, use many (more than 10) in parallel. Despite the techniques used in the design of LT3950 to mitigate electromagnetic interference (EMI), proper PCB layout is critical for suppressing radiated and conducted noise. Minimizing the area of the SW node will decrease the amount of capacitance that the switch sees, and thus reduce the current spike seen during switching events. Failing to minimize the area of the so-called hot loop will dramatically degrade EMI performance. Keep the output capacitor and catch diode as close as possible to the SW pin of the IC to minimize the hot loop. For more informa- tion about hot loops see Analog Devices Application Notes AN136 and AN139.

Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS L T3950

3950 TA03

2.2µF 390k 10k FB PWMTG VC PWM INTVCC CTRL ISP ISN SW 1µF 220pF 2.2µF LED POWER (DERATED BELOW VIN = 6V)267k 36k FAUL TFAUL T VIN EN/UVLO VIN 3.3V TO 16V 100k 100k L1: WURTH 74437321022 D1: DIODES INC. DFLS260Q M1: VISHAY SI7309 SYNC/SPRD RP RT GND 300Hz 180k 2MHz 45.3k 2.2µH 0.5/uni03A9 Efficiency 8W Boost LED Driver with Internal 10% PWM Dimming I LED = 250mA I LED = 250mA I LED = 122mA I LED = 122mA VIN (V) 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 EFFICIENCY (%) POWER LOSS (W)

3950 TA03b

Rev. 0For more information www.analog.com 100k 267k 100k L T3950 INTVCC

3950 TA04

10µF2.2µF 2.2µF D1 59k FB PWMTGCTRL PWM INTVCC SYNC/SPRD RP VC ISP ISN SW 2MHz 45.3k 47k FAUL T VIN EN/UVLO VIN 3V TO 36V GNDRT FAUL T 6.8µH 1:1 1µF 330pF INTVCC 333mA 13 2 LED ARRAY 750m/uni03A9 L1: WURTH 744 870 00 M1: VISHAY SI230 D1: DIODES INC DFLS160Q 5W SEPIC LED Driver with Internal 10% PWM Dimming Efficiency VIN (V) 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 EFFICIENCY (%) POWER LOSS (W)

3950 TA04b

Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS 100k 47k 28k15.4k 499k L T3950

3950 TA05

4.7µF 0.1µF 10k SW ISP ISN PWMTG 4.7µF LED ARRAY VIN EN/UVLO 68µH250m/uni03A9 INTVCC FB PWM INTVCC RP VC 301k 400kHz FAUL T GND RT FAUL T 1µF 220pFSYNC/SPRD INTVCC VIN 45V TO 58V D1M1 L1: WURTH 744 373 49680 D1: DIODES INC. DFLS260 M1: VISHAY SI7309 CTRL 36W Buck-Mode LED Driver Efficiency I LED = 1A I LED = 1A I LED = 0.5A I LED = 1A V IN (V) 46.5 49.5 52.5 55.5 58.5 100 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 EFFICIENCY (%) POWER LOSS (W)

3950 TA05b

Rev. 0For more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. PACKAGE DESCRIPTION MSOP (MSE16) 0213 REV F 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 16151413121110 1 2 3 4 5 6 7 8 1 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.305 ±0.038 (.0120 ±.0015) TYP 0.50 (.0197) BSC BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.280 ±0.076 (.011 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE

0.12 REF

0.35 REF 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F)

Rev. 0 For more information www.analog.com  ANALOG DEVICES, INC. 2020 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LT3517 Full-Featured LED Driver with 1.5A Switch Current 1.5A, 45V Internal Switch, 5000:1 T rue Color PWM Dimming, 100mV High-Side Current Sense, Open LED Protection LT3518 Full-Featured LED Driver with 2.3A Switch Current 2.3A, 45V Internal Switch, 3000:1 T rue Color PWM Dimming, 100mV High-Side Current Sense, Open LED Protection LT3922 36V, 2A Synchronous Step-Up LED Driver ±2% Current Regulation Accuracy, 5000:1 PWM Dimming, 128:1 Internal PWM, Silent Switcher Architecture for Low EMI LT3761 60VIN LED Controller with Internal PWM Generator 4.5V to 60V Input, Rail-to-Rail Current Sense 0V to 80V, 3000:1 T rue Color PWM, ±3% Current Regulation Accuracy LT3952 60V LED Driver with 4A Switch Current 4A, 60V Internal DMOS Switch, 4000:1 T rue Color PWM Dimming, 0V to 60V Output Current Regulation with Monitor LT3477 3A DC/DC Converter with Dual Rail-to-Rail Current Sense Dual 100mV Rail-to-Rail Current Sense Amplifiers, 2.5V to 25V Input Voltage, 3A, 42V Internal Switch 100% 10% L T3950

3950 TA06a

2.2µF 390k 10k FB PWMTG RP PWM INTVCC VC CTRL RP ISP ISN SW 1µF 220pF 2.2µF LED POWER (DERATED BELOW VIN = 6V) 267k FAUL TFAUL T VIN EN/UVLO VIN 6V TO 16V 100k100k 100k 100k 100k L1: WURTH 74437321022 D1: DIODES INC. DFLS260Q M1: VISHAY SI7309 36k SYNC/SPRD RT GND 180k 300HzGND 45.3k 2MHz 2.2µH D1 0.5/uni03A9 m1 2MHz, 8W and 0.8W Input Boost LED Driver Startup Using Always-On Input Startup Using 10% Dimming Input V IN AT 5V/DIV I LED AT 200mA/DIV TIME AT 2MS/DIV

3950 TA06b

V IN AT 5V/DIV I LED AT 200mA/DIV TIME AT 2MS/DIV

3950 TA06c