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2, 5 30BQ060 15.4k VOUT 3, 4 220pF 15nF 1, 8, 9, 16 LT3431 SHDN SYNC SW BIAS FB VCGND 0.22µF 47µF CERAMIC 10µH** MMSD914TI 4.99k

3431 TA01

2.2µF† 100V CERAMIC V IN 12V (TRANSIENTS TO 60V) 1.5k INCREASE INDUCTOR VALUE FOR LOAD CURRENTS ABOVE 2A (SEE APPLICATIONS INFORMATION—MAXIMUM OUTPUT LOAD CURRENT) UNITED CHEMI-CON THCS50EZA225ZT High Voltage, 3A, 500kHz Step-Down Switching Regulator n Wide Input Range: 5.5V to 60V n 3A Peak Switch Current n Small Thermally Enhanced 16-Pin TSSOP Package n Constant 500kHz Switching Frequency n Saturating Switch Design: 0.1W n Peak Switch Current Maintained Over Full Duty Cycle Range n Effective Supply Current: 2.5mA n Shutdown Current: 30mA n 1.2V Feedback Reference Voltage n Easily Synchronizable n Cycle-by-Cycle Current Limiting The LT 3431 is a 500kHz monolithic buck switching regu- lator that accepts input voltages up to 60V. A high efficiency 3A, 0.1W switch is included on the die along with all the nec- essary oscillator, control and logic circuitry. A current mode architecture provides fast transient response and good loop stability. Special design techniques and a new high voltage process achieve high efficiency over a wide input range. Efficiency is maintained over a wide output current range by using the output to bias the circuitry and by utilizing a supply boost capacitor to saturate the power switch. Patented circuitry maintains peak switch current over the full duty cycle range. A shutdown pin reduces supply current to 30mA and the de- vice can be externally synchronized from 580kHz to 700kHz with logic level inputs. The LT3431 is available in a thermally enhanced 16-pin TSSOP package. n Industrial and Automotive Power Supplies n Portable Computers n Battery Chargers n Distributed Power Systems , LTC and LT are registered trademarks of Linear Technology Corporation. 5V, 2A Buck Converter Efficiency vs Load Current LOAD CURRENT (A) EFFICIENCY (%) 100 2.0

3431 TA02

0.5 1.0 1.5 2.5 VOUT = 5V VOUT = 3.3V VIN = 12V L = 15µH

(Note 1) Operating Junction Temperature Range ORDER PART NUMBER LT3431EFE LT3431IFE FE PART MARKING PARAMETER CONDITIONS MIN TYP MAX UNITS Reference Voltage (VREF) 5.5V £ VIN £ 60V 1.204 1.219 1.234 V VOL + 0.2 £ VC £ VOH – 0.2 l 1.195 1.243 V FB Input Bias Current l –0.2 –1.5 mA Error Amp Voltage Gain (Note 2) 200 475 V/V Error Amp gm dl (VC) = –10mA 1650 2200 3300 mMho l 1000 4200 mMho VC to Switch gm 3.4 A/V EA Source Current FB = 1V or V SENSE = 4.1V l 125 275 450 mA EA Sink Current FB = 1.4V or V SENSE = 5.7V l 100 275 500 mA VC Switching Threshold Duty Cycle = 0 0.8 V VC High Clamp SHDN = 1V 2.1 V Switch Current Limit V C Open, BOOST = VIN + 5V, FB = 1V or VSENSE = 4.1V –40 °C␣£ Tj £ 25°C 3.0 5 6.5 A (Note 9) Tj = 125 °C 2.5 4 5.5 A Switch On Resistance I SW = 2.5A, BOOST = VIN + 5V (Note 7) 0.1 0.14 W l 0.18 W Maximum Switch Duty Cycle FB = 1V or V SENSE = 4.1V 88 92 % l 80 % Switch Frequency V C Set to Give DC = 50% 460 500 540 kHz l 430 500 570 kHz fSW Line Regulation 5.5V £ VIN £ 60V l 0.05 0.15 %/V fSW Shifting Threshold Df = 10kHz 0.8 V The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted. TJMAX = 125°C, qJA = 45°C/ W, qJC (PAD) = 10°C/W EXPOSED PAD MUST BE SOLDERED TO GROUND PLANE ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W

ELECTRICAL CHARACTERISTICS

V IN VIN SW BOOST NC GND GND SHDN SYNC NC FB V C BIAS GND Consult LTC Marketing for parts specified with wider operating temperature ranges. 3431EFE 3431IFE

PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage (Note 3) l 4.6 5.5 V Minimum Boost Voltage (Note 4) I SW £ 2.5A l 1.8 3 V Boost Current (Note 5) BOOST = V IN + 5V, ISW = 0.75A l 25 50 mA BOOST = VIN + 5V, ISW = 2.5A l 75 120 mA Input Supply Current (IVIN) (Note 6) V BIAS = 5V 1.5 2.2 mA Bias Supply Current (IBIAS) (Note 6) V BIAS = 5V 3.1 4.2 mA Shutdown Supply Current SHDN = 0V, V IN £ 60V, SW = 0V, VC Open 30 100 mA l 200 mA Lockout Threshold V C Open, l 2.30 2.42 2.53 V Shutdown Thresholds V C Open, Shutting Down l 0.15 0.37 0.58 V VC Open, Starting Up l 0.25 0.42 0.6 V Minimum SYNC Amplitude l 1.5 2.2 V SYNC Frequency Range 580 700 kHz SYNC Input Resistance 20 k W Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Gain is measured with a VC swing equal to 200mV above the low clamp level to 200mV below the upper clamp level. Note 3: Minimum input voltage is not measured directly, but is guaranteed by other tests. It is defined as the voltage where internal bias lines are still regulated so that the reference voltage and oscillator remain constant. Actual minimum input voltage to maintain a regulated output will depend upon output voltage and load current. See Applications Information. Note 4: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. Note 5: Boost current is the current flowing into the BOOST pin with the pin held 5V above input voltage. It flows only during switch on time. Note 6: Input supply current is the quiescent current drawn by the input pin when the BIAS pin is held at 5V with switching disabled. Bias supply current is the current drawn by the BIAS pin when the BIAS pin is held at 5V. Total input referred supply current is calculated by summing input supply current (IVIN) with a fraction of bias supply current (IBIAS): ITOTAL = IVIN + (IBIAS)(VOUT/VIN) With VIN = 15V, VOUT = 5V, IVIN = 1.5mA, IBIAS = 3.1mA, ITOTAL = 2.5mA. Note 7: Switch on resistance is calculated by dividing VIN to SW voltage by the forced current (3A). See Typical Performance Characteristics for the graph of switch voltage at other currents. Note 8: The LT3431EFE is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3431IFE is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 9: See Typical Performance Graph of Peak Switch Current Limit vs Junction Temperature. Note 10. This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. The l denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.

TYPICAL PERFOR A CE CHARACTERISTICS UW Switch Peak Current Limit DUTY CYCLE (%) SWITCH PEAK CURRENT (A)3 20 40 TYPICAL 60 80

3431 G01

Tj = 25°C GUARANTEED MINIMUM FB Pin Voltage and Current SHDN Pin Bias Current JUNCTION TEMPERATURE (°C) –50 FEEDBACK VOLTAGE (V) CURRENT (µA) 1.224 1.229 1.234 25 75

3431 G02

1.219 1.214 –25 0 50 100 125 1.209 1.204 1.5 2.0 1.0 0.5 VOLTAGE CURRENT JUNCTION TEMPERATURE (°C) –50 250 200 150 100 25 75

3431 G03

–25 0 50 100 125 CURRENT (mA) CURRENT REQUIRED TO FORCE SHUTDOWN (FLOWS OUT OF PIN). AFTER SHUTDOWN, CURRENT DROPS TO A FEW mA AT 2.38V STANDBY THRESHOLD (CURRENT FLOWS OUT OF PIN) Error Amplifier Transconductance JUNCTION TEMPERATURE (°C) TRANSCONDUCTANCE (µmho)

3431 G07

–50 50 100 0 25 75–25 125 Error Amplifier Transconductance Frequency Foldback FREQUENCY (Hz) GAIN (mMho) PHASE (DEG) 3000 2500 2000 1500 1000 500 200 150 100 –50 100 10k 100k 10M

3431 G08

ERROR AMPLIFIER EQUIVALENT CIRCUIT ROUT 200k COUT 12pF VC RLOAD = 50W VFB 2 • 10–3 )( VFB (V) 0 0.2 SWITICHING FREQUENCY (kHz) OR FB CURRENT (µA) 375 500 625 1.0

3431 G09

0.4 0.6 0.8 1.2 SWITCHING FREQUENCY FB PIN CURRENT Lockout and Shutdown Thresholds JUNCTION TEMPERATURE (°C) –50 SHDN PIN VOLTAGE (V) 50 100

3431 G04

2.4 2.0 1.6 1.2 0.8 0.4 –25 125 LOCKOUT START-UP SHUTDOWN Shutdown Supply Current Shutdown Supply Current INPUT VOLTAGE (V) INPUT SUPPLY CURRENT (µA)

3431 G05

VSHDN = 0V SHUTDOWN VOLTAGE (V) INPUT SUPPLY CURRENT (µA) 100 150 200 250 300 0.1 0.2 0.3 0.4

3431 G06

0.5 VIN = 60V VIN = 15V

LOAD CURRENT (A) INPUT VOLTAGE (V)

3431 G11

7.5 7.0 6.5 6.0 5.5 5.0 MINIMUM INPUT VOLTAGE TO START MINIMUM INPUT VOLTAGE TO RUN SWITCH CURRENT (A) 0123 BOOST PIN CURRENT (mA)

3431 G12

Switching Frequency BOOST Pin Current JUNCTION TEMPERATURE (°C) –50 FREQUENCY (kHz) 50 100

3431 G10

–25 125 TYPICAL PERFOR A CE CHARACTERISTICS UW VC Pin Shutdown Threshold JUNCTION TEMPERATURE (°C) –50 1.5 1.7 2.1 25 75

3431 G13

1.3 1.1 –25 0 50 100 125 0.9 0.7 1.9 THRESHOLD VOLTAGE (V) Switch Voltage Drop SWITCH CURRENT (A) 0123 SWITCH VOLTAGE (mV)

3431 G14

TJ = 125°C TJ = 25°C TJ = –40°C JUNCTION TEMPERATURE (°C) –50 SWITCH MINIMUM ON TIME (ns) 400 500 600 25 75

3431 G15

–25 0 50 100 125 100 Switch Minimum ON Time vs Temperature JUNCTION TEMPERATURE (°C) –50 SWITCH PEAK CURRENT LIMIT (A) 50 100

3431 G16

6.00 5.50 5.00 4.50 4.00 3.50 3.00 2.50 –25 125 Switch Peak Current Limit

GND (Pins 1, 8, 9, 16): The GND pin connections act as the reference for the regulated output, so load regulation will suffer if the “ground” end of the load is not at the same voltage as the GND pins of the IC. This condition will occur when load current or other currents flow through metal paths between the GND pins and the load ground. Keep the paths between the GND pins and the load ground short and use a ground plane when possible. The FE package has an exposed pad that is fused to the GND pins. The pad should be soldered to the copper ground plane under the device to reduce thermal resistance. (See Applications Information—Layout Considerations.) SW (Pins 2, 5): The switch pin is the emitter of the on-chip power NPN switch. This pin is driven up to the input pin voltage during switch on time. Inductor current drives the switch pin voltage negative during switch off time. Nega- tive voltage is clamped with the external catch diode. Maximum negative switch voltage allowed is – 0.8V. V IN (Pins 3, 4): This is the collector of the on-chip power NPN switch. VIN powers the internal control circuitry when a voltage on the BIAS pin is not present. High dI/dt edges occur on this pin during switch turn on and off. Keep the path short from the V IN pin through the input bypass capacitor, through the catch diode back to SW. All trace inductance in this path creates voltage spikes at switch off, adding to the V CE voltage across the internal NPN. BOOST (Pin 6): The BOOST pin is used to provide a drive voltage, higher than the input voltage, to the internal bipo- lar NPN power switch. Without this added voltage, the typical switch voltage loss would be about 1.5V. The ad- ditional BOOST voltage allows the switch to saturate and voltage loss approximates that of a 0.1W FET structure. NC (Pins 7, 13): No Connection. BIAS (Pin 10): The BIAS pin is used to improve efficiency when operating at higher input voltages and light load current. Connecting this pin to the regulated output volt- age forces most of the internal circuitry to draw its oper- ating current from the output voltage rather than the input supply. This architecture increases efficiency especially when the input voltage is much higher than the output. Minimum output voltage setting for this mode of operation is 3V. V C (Pin 11) The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally used for frequency compensation, but can also serve as a current clamp or control loop override. V C sits at about 0.9V for light loads and 2.1V at maximum load. It can be driven to ground to shut off the regulator, but if driven high, current must be limited to 4mA. FB (Pin 12): The feedback pin is used to set the output voltage using an external voltage divider that generates 1.22V at the pin for the desired output voltage. Three additional functions are performed by the FB pin. When the pin voltage drops below 0.6V, switch current limit is reduced and the external SYNC function is disabled. Below 0.8V, switching frequency is also reduced. See Feedback Pin Functions in Applications Information for details. SYNC (Pin 14): The SYNC pin is used to synchronize the internal oscillator to an external signal. It is directly logic compatible and can be driven with any signal between 10% and 90% duty cycle. The synchronizing range is equal to initial operating frequency up to 700kHz. See Synchronizing in Applications Information for details. SHDN (Pin 15): The SHDN pin is used to turn off the regulator and to reduce input drain current to a few microamperes. This pin has two thresholds: one at 2.38V to disable switching and a second at 0.4V to force com- plete micropower shutdown. The 2.38V threshold func- tions as an accurate undervoltage lockout (UVLO); some- times used to prevent the regulator from delivering power until the input voltage has reached a predetermined level. If the SHDN pin functions are not required, the pin can either be left open (to allow an internal bias current to lift the pin to a default high state) or be forced high to a level not to exceed 6V.

Figure 1. LT3431 Block Diagram

3431 F01

S flip-flop to turn the switch on. and output capacitor, then an abrupt 180° shift will occur. and also gives much quicker transient response. than the input voltage, allowing switch to be saturated.

APPLICATIO S I FOR ATIOWU UU FEEDBACK PIN FUNCTIONS The feedback (FB) pin on the LT3431 is used to set output voltage and provide several overload protection features. The first part of this section deals with selecting resistors to set output voltage and the second part talks about foldback frequency and current limiting created by the FB pin. Please read both parts before committing to a final design. The suggested value for the output divider resistor (see Figure 2) from FB to ground (R2) is 5k or less, and a formula for R1 is shown below. The output voltage error caused by ignoring the input bias current on the FB pin is less than 0.25% with R2 = 5k. A table of standard 1% values is shown in Table 1 for common output voltages. Please read the following if divider resistors are increased above the suggested values. R RV OUT 21 2 2 12 2 -() . Table 1 OUTPUT R1 % ERROR AT OUTPUT VOLTAGE R2 (NEAREST 1%) DUE TO DISCREET 1% (V) (k W )( k W ) RESISTOR STEPS 3 4.99 7.32 + 0.32 3.3 4.99 8.45 – 0.43 5 4.99 15.4 – 0.30 6 4.75 18.7 + 0.40 8 4.47 24.9 + 0.20 10 4.32 30.9 – 0.54 12 4.12 36.5 + 0.24 15 4.12 46.4 – 0.27 More Than Just Voltage Feedback The feedback pin is used for more than just output voltage sensing. It also reduces switching frequency and current limit when output voltage is very low (see the Frequency Foldback graph in Typical Performance Characteristics). This is done to control power dissipation in both the IC and in the external diode and inductor during short-circuit conditions. A shorted output requires the switching regu- lator to operate at very low duty cycles, and the average current through the diode and inductor is equal to the short-circuit current limit of the switch (typically 4A for the LT3431, folding back to less than 2A). Minimum switch on time limitations would prevent the switcher from attaining a sufficiently low duty cycle if switching frequency were maintained at 500kHz, so frequency is reduced by about 5:1 when the feedback pin voltage drops below 0.8V (see Frequency Foldback graph). This does not affect operation with normal load conditions; one simply sees a gear shift in switching frequency during start-up as the output voltage rises. In addition to lower switching frequency, the LT3431 also operates at lower switch current limit when the feedback pin voltage drops below 0.6V. Q2 in Figure 2 performs this function by clamping the V C pin to a voltage less than its normal 2.1V upper clamp level. This foldback current limit greatly reduces power dissipation in the IC, diode and in- ductor during short-circuit conditions. External synchro- nization is also disabled to prevent interference with fold- back operation. Again, it is nearly transparent to the user under normal load conditions. The only loads that may be affected are current source loads which maintain full load current with output voltage less than 50% of final value. In these rare situations the feedback pin can be clamped above 0.6V with an external diode to defeat foldback current limit. Caution: clamping the feedback pin means that frequency shifting will also be defeated, so a combination of high in- put voltage and dead shorted output may cause the LT3431 to lose control of current limit. The internal circuitry which forces reduced switching frequency also causes current to flow out of the feedback pin when output voltage is low. The equivalent circuitry is shown in Figure 2. Q1 is completely off during normal operation. If the FB pin falls below 0.8V, Q1 begins to conduct current and reduces frequency at the rate of approximately 3.5kHz/mA. To ensure adequate frequency foldback (under worst-case short-circuit conditions), the external divider Thevinin resistance must be low enough to pull 115mA out of the FB pin with 0.44V on the pin (R DIV £ 3.8k). The net result is that reductions in frequency and current limit are affected by output voltage divider imped- ance. Although divider impedance is not critical, caution should be used if resistors are increased beyond the suggested values and short-circuit conditions can possi- bly occur with high input voltage. High frequency pickup

and current foldback will decrease. also reduce output ripple voltage. voltage is due to the very low ESR of ceramic capacitors.

3431 F02

Figure 2. Frequency and Current Limit Foldback its effective series resistance (ESR). Figure 3. LT3431 Output Ripple Voltage Waveforms.

APPLICATIO S I FOR ATIOWU UU importance, the subsequent suggestions in Peak Induc- tor and Fault Current and EMI will additionally help in the selection of the inductor value. Peak-to-peak output ripple voltage is the sum of a triwave (created by peak-to-peak ripple current (ILP-P) times ESR) and a square wave (created by parasitic inductance (ESL) and ripple current slew rate). Capacitive reactance is assumed to be small compared to ESR or ESL. V I ESR ESL dI dt RIPPLE LP P= () ( ) + ()- S where: ESR = equivalent series resistance of the output capacitor ESL = equivalent series inductance of the output capacitor dI/dt = slew rate of inductor ripple current = VIN/L Peak-to-peak ripple current (I LP-P) through the inductor and into the output capacitor is typically chosen to be between 20% and 40% of the maximum load current. It is approximated by: I VV V Vf L LP P OUT IN OUT IN - = () ( ) () ( ) ( ) Example: with V IN = 12V, V OUT = 5V, L = 10 mH, ESR = 0.080W and ESL = 10nH, output ripple voltage can be approximated as follows: IA dI dt VA mV RIPPLE P- P P- P = () -() () () () =+= 51 2 5 12 10 10 500 10 05 8 10 10 10 1 2 0 58 0 08 10 10 10 1 2 0 046 0 012 58 .. · . S To reduce output ripple voltage further requires an in- crease in the inductor value with the trade-off being a physically larger inductor with the possibility of increased component height and cost. Ceramic Output Capacitor An alternative way to further reduce output ripple voltage is to reduce the ESR of the output capacitor by using a ceramic capacitor. Although this reduction of ESR re- moves a useful zero in the overall loop response, this zero can be replaced by inserting a resistor (R C) in series with the V C pin and the compensation capacitor C C. (See Ceramic Capacitors in Applications Information.) Peak Inductor Current and Fault Current To ensure that the inductor will not saturate, the peak inductor current should be calculated knowing the maxi- mum load current. An appropriate inductor should then be chosen. In addition, a decision should be made whether or not the inductor must withstand continuous fault conditions. If maximum load current is 1A, for instance, a 1A inductor may not survive a continuous 4A overload condition. Dead shorts will actually be more gentle on the inductor because the LT3431 has frequency and current limit foldback. Peak inductor and switch current can be significantly higher than output current, especially with smaller induc- tors and lighter loads, so don’t omit this step. Powdered iron cores are forgiving because they saturate softly, whereas ferrite cores saturate abruptly. Other core mate- rials fall somewhere in between. The following formula assumes continuous mode of operation, but errs only slightly on the high side for discontinuous mode, so it can be used for all conditions. II I I VV V Vf L PEAK OUT LP P OUT OUT IN OUT IN =+ =+ () ( ) () ( ) ( ) () () ±- 2 2 EMI Decide if the design can tolerate an “open” core geometry like a rod or barrel, which have high magnetic field radiation, or whether it needs a closed core like a toroid to prevent EMI problems. This is a tough decision because the rods or barrels are temptingly cheap and small and

APPLICATIO S I FOR ATIOWU UU Additional Considerations After making an initial choice, consider additional factors such as core losses and second sourcing, etc. Use the experts in Linear Technology’s Applications department if you feel uncertain about the final choice. They have experience with a wide range of inductor types and can tell you about the latest developments in low profile, surface mounting, etc. Maximum Output Load Current Maximum load current for a buck converter is limited by the maximum switch current rating (I P). The current rating for the LT3431 is 3A. Unlike most current mode convert- ers, the LT3431 maximum switch current limit does not fall off at high duty cycles. Most current mode converters suffer a drop off of peak switch current for duty cycles above 50%. This is due to the effects of slope compensa- tion required to prevent subharmonic oscillations in cur- rent mode converters. (For detailed analysis, see Applica- tion Note 19.) The LT3431 is able to maintain peak switch current limit over the full duty cycle range by using patented circuitry to cancel the effects of slope compensation on peak switch current without affecting the frequency compensation it provides. Maximum load current would be equal to maximum switch current for an infinitely large inductor , but with finite inductor size, maximum load current is reduced by one-half peak-to-peak inductor current (ILP-P). The follow- ing formula assumes continuous mode operation, imply- ing that the term on the right is less than one-half of I IOUT(MAX) = Continuous Mode I± I = I P LP-P P - +() -() () ( ) ( ) VV V VV LfV OUT F IN OUT F IN For VOUT = 5V, VIN = 12V, VF(D1) = 0.52V, f = 500kHz and L = 10mH: I A OUT MAX() - +() -() () () () =- = 5 0 52 12 5 0 52 2 15 10 500 10 12 30 32 7 .± . Note that there is less load current available at the higher input voltage because inductor ripple current increases. At V IN = 24V, duty cycle is 23% and for the same set of conditions: I A OUT MAX() .± . +() -() () () () =- = 5 0 52 24 5 0 52 2 15 10 500 10 24 3 0 43 2 57 Table 2 VENDOR/ VALUE I DC DCR HEIGHT PART NUMBER ( mH) (Amps) (Ohms) (mm)MAX Sumida CDRH8D28-4R7 4.7 3.4 0.019 3 CDRH8D28-7R3 7.3 2.8 0.030 3 CDRH8D43-100 10 4 0.029 4.5 CDRH8D43-150 15 2.9 0.042 4.5 CEI122-100 10 3.4 0.029 3 CEI122(H)-150 15 3.6 0.071 3 CDRH104R-150 15 3.6 0.037 4 CDRH104R-220 22 2.9 0.054 4 CDRH124-330 33 2.9 0.066 4.5 Coiltronics UP2B-6R8 6.8 3.6 0.020 6 UP2B-100 10 3.3 0.027 6 UP3B-220 22 3.7 0.049 6.8 UP3B-330 33 3.0 0.069 6.8 Coilcraft DO1813P-472 4.7 2.6 0.054 5 DS3316P-472 4.7 3.2 0.054 5.08 DS3316P-682 6.8 2.8 0.075 5.08 DO3316P-103 10 3.8 0.038 5.21 DO3316P-153 15 3.0 0.046 5.21 there are no helpful guidelines to calculate when the magnetic field radiation will be a problem.

APPLICATIO S I FOR ATIOWU UU To calculate actual peak switch current with a given set of conditions, use: II I VV V VV LfV SW PEAK OUT P OUT OUT F IN OUT F IN () =+ +- () () ( ) ( ) I L- P () ± Reduced Inductor Value and Discontinuous Mode If the smallest inductor value is of most importance to a converter design, in order to reduce inductor size/cost, discontinuous mode may yield the smallest inductor solu- tion. The maximum output load current in discontinuous mode, however, must be calculated and is defined later in this section. Discontinuous mode is entered when the output load current is less than one-half of the inductor ripple current (I LP-P). In this mode, inductor current falls to zero before the next switch turn on (see Figure 8). Buck converters will be in discontinuous mode for output load current given by: IOUT Discontinuous Mode The inductor value in a buck converter is usually chosen large enough to keep inductor ripple current (I LP-P) low; this is done to minimize output ripple voltage and maxi- mize output load current. In the case of large inductor values, as seen in the equation above, discontinuous mode will be associated with “light loads.” When choosing small inductor values, however, discon- tinuous mode will occur at much higher output load currents. The limit to the smallest inductor value that can be chosen is set by the LT3431 peak switch current (I and the maximum output load current required, given by: Example: For VIN = 12V, VOUT = 5V, VF = 0.52V, f = 500kHz and L = 2.2mH. IOUT(MAX) Discontinuous Mode IOUT(MAX) = 1.66A Discontinuous Mode What has been shown here is that if high inductor ripple current and discontinuous mode operation can be toler- ated, small inductor values can be used. If a higher output load current is required, the inductor value must be increased. If I OUT(MAX) no longer meets the discontinuous mode criteria, use the IOUT(MAX) equation for continuous mode; the LT3431 is designed to operate well in both modes of operation, allowing a large range of inductor values to be used. Short-Circuit Considerations For a ground short-circuit fault on the regulated output, the maximum input voltage for the LT3431 is typically limited to 21V. If a greater input voltage is required, increasing the resistance in series with the inductor may suffice (see short-circuit calculations at the end of this section). Alternatively, the LT3430 can be used since it is identical to the LT3431 but runs at a lower frequency of 200kHz, allowing higher sustained input voltage capability during output short-circuit. The LT3431 is a current mode controller. It uses the V C node voltage as an input to a current comparator which turns off the output switch on a cycle-by-cycle basis as peak current is reached. The internal clamp on the V C node, nominally 2V, then acts as an output switch peak current limit. This action becomes the switch current limit specification. The maximum available output power is then determined by the switch current limit. A potential controllability problem could occur under short-circuit conditions. If the power supply output is short circuited, the feedback amplifier responds to the low output voltage by raising the control voltage, V C, to its peak current limit value. Ideally, the output switch would be turned on, and then turned off as its current exceeded the value indicated by V C. However, there is finite response < +() ( ± ± ) () ( ) ( ) () VV V VV Vf L OUT F IN OUT F IN2 = () I If L V VV V VV P PI N OUT F IN OUT F () ( ) () ( ± ± ) ILP-P 3 500 10 4 7 10 12 2 50 5 2 1 250 5 2 (. ) ( ± ± . ) IOUT(MAX) Discontinuous Mode

voltage drop, the potential exists for a loss of control.

  • ·£ + where: f = switching frequency t ON = switch minimum on time VF = diode forward voltage VIN = Input voltage I • R = inductor I • R voltage drop If this condition is not observed, the current will not be limited at IPK, but will cycle-by-cycle ratchet up to some higher value. Using the nominal LT3431 clock frequency of 500KHz, a VIN of 12V and a (VF + I • R) of say 0.6V, the maximum tON to maintain control would be approximately 100ns, an unacceptably short time. The solution to this dilemma is to slow down the oscilla- tor when the FB pin voltage is abnormally low thereby indicating some sort of short-circuit condition. Oscillator fre quency is unaffected until FB voltage drops to about 2/3 of its normal value. Below this point the oscillator fre- quency decreases roughly linearly down to a limit of about 100kHz. This lower oscillator frequency during short- circuit conditions can then maintain control with the effective minimum on time. Even with frequency foldback, however, the LT3431 will not survive a permanent output short at the absolute maximum voltage rating of V IN = 60V; this is defined solely by internal semiconductor junction breakdown effects. For the maximum input voltage allowed during an output short to ground, the previous equation defining minimum on-time can be used. Assuming V F (D1 catch diode) = 0.52V at 2.5A (short-circuit current is folded back to typical switch current limit • 0.5), I (inductor) • DCR = 2.5A
  • 0.027 = 0.068V (L = UP2B-100), typical f = 100kHz (folded back) and typical minimum on-time = 275ns, the maximum allowable input voltage during an output short to ground is typically: V VIN(MAX) = 21V Increasing the DCR of the inductor will increase the maximum VIN allowed during an output short to ground but will also drop overall efficiency during normal opera- tion. It is recommended that for [V IN/(VOUT + VF)] ratios > 4, a soft-start circuit should be used to control the output capacitor charge rate during start-up or during recovery from an output short circuit, thereby adding additional control over peak inductor current. See Buck Converter with Adjustable Soft-Start later in this data sheet. OUTPUT CAPACITOR The LT3431 will operate with either ceramic or tantalum output capacitors. The output capacitor is normally cho- sen by its effective series resistance (ESR), because this is what determines output ripple voltage. The ESR range for typical LT3431 applications using a tantalum output capacitor is 0.05W to 0.2W . A typical output capacitor is an AVX type TPS, 100mF at 10V, with a guaranteed ESR less than 0.1W . This is a “D” size surface mount solid tantalum capacitor. TPS capacitors are specially constructed and tested for low ESR, so they give the lowest ESR for a given volume. The value in microfarads is not particularly criti- cal, and values from 22mF to greater than 500mF work well, but you cannot cheat mother nature on ESR. If you find a tiny 22mF solid tantalum capacitor, it will have high ESR, and output ripple voltage will be terrible. Table 3 shows some typical solid tantalum surface mount capacitors.

Table 3. Surface Mount Solid Tantalum Capacitor ESR

APPLICATIO S I FOR ATIOWU UU Many engineers have heard that solid tantalum capacitors are prone to failure if they undergo high surge currents. This is historically true, and type TPS capacitors are specially tested for surge capability, but surge ruggedness is not a critical issue with the output capacitor. Solid tantalum capacitors fail during very high turn-on surges, which do not occur at the output of regulators. High discharge surges, such as when the regulator output is dead shorted, do not harm the capacitors. Unlike the input capacitor, RMS ripple current in the output capacitor is normally low enough that ripple cur- rent rating is not an issue. The current waveform is triangular with a typical value of 250mARMS. The formula to calculate this is: Output capacitor ripple current (RMS): I VV V LfV RIPPLE RMS OUT IN OUT IN () = () -() () ( ) ( ) 02 9. Ceramic Capacitors Ceramic capacitors are generally chosen for their good high frequency operation, small size and very low ESR (effective series resistance). Their low ESR reduces out- put ripple voltage but also removes a useful zero in the loop frequency response, common to tantalum capaci- tors. To compensate for this, a resistor R C can be placed in series with the V C compensation capacitor C C. Care must be taken however, since this resistor sets the high frequency gain of the error amplifier, including the gain at the switching frequency. If the gain of the error amplifier is high enough at the switching frequency, output ripple voltage (although smaller for a ceramic output capacitor) may still affect the proper operation of the regulator. A filter capacitor C F in parallel with the R C/CC network is suggested to control possible ripple at the VC pin. An “All Ceramic” solution is possible for the LT3431 by choosing the correct compensation components for the given application. Example: For VIN = 8V to 20V, VOUT = 5V at 2A, the LT3431 can be stabilized, provide good transient response and maintain very low output ripple voltage using the follow- ing component values: (refer to the first page of this data sheet for component references) C3 = 2.2mF, R C = 1.5k, CC = 15nF, C F = 220pF and C1 = 47 mF. See Application Note 19 for further detail on techniques for proper loop compensation. INPUT CAPACITOR Step-down regulators draw current from the input supply in pulses. The rise and fall times of these pulses are very fast. The input capacitor is required to reduce the voltage ripple this causes at the input of LT3431 and force the switching current into a tight local loop, thereby minimiz- ing EMI. The RMS ripple current can be calculated from: II V V V VRIPPLE RMS OUT OUT IN OUT IN() = () ±/ Ceramic capacitors are ideal for input bypassing. At 500kHz switching frequency, the energy storage requirement of the input capacitor suggests that values in the range of 2.2mF to 10mF are suitable for most applications. If opera- tion is required close to the minimum input required by the output of the LT3431, a larger value may be required. This is to prevent excessive ripple causing dips below the minimum operating voltage resulting in erratic operation. Depending on how the LT3431 circuit is powered up you may need to check for input voltage transients. The input voltage transients may be caused by input voltage steps or by connecting the LT3431 converter to an already powered up source such as a wall adapter. The sudden application of input voltage will cause a large surge of current in the input leads that will store energy in the parasitic inductance of the leads. This energy will cause the input voltage to swing above the DC level of input power source and it may exceed the maximum voltage rating of input capacitor and LT3431. The easiest way to suppress input voltage transients is to add a small aluminum electrolytic capacitor in parallel with the low ESR input capacitor. The selected capacitor needs to have the right amount of ESR in order to critically dampen the resonant circuit formed by the input lead inductance and the input capacitor. The typical values of ESR will fall in the range of 0.5W to 2W and capacitance will fall in the range of 5mF to 50mF.

APPLICATIO S I FOR ATIOWU UU If tantalum capacitors are used, values in the 22 mF to 470mF range are generally needed to minimize ESR and meet ripple current and surge ratings. Care should be taken to ensure the ripple and surge ratings are not exceeded. The AVX TPS and Kemet T495 series are surge rated. AVX recommends derating capacitor operating voltage by 2:1 for high surge applications. CATCH DIODE Highest efficiency operation requires the use of a Schottky type diode. DC switching losses are minimized due to its low forward voltage drop, and AC behavior is benign due to its lack of a significant reverse recovery time. Schottky diodes are generally available with reverse voltage ratings of up to 60V and even 100V, and are price competitive with other types. The use of so-called “ultrafast” recovery diodes is gener- ally not recommended. When operating in continuous mode, the reverse recovery time exhibited by “ultrafast” diodes will result in a slingshot type effect. The power internal switch will ramp up V IN current into the diode in an attempt to get it to recover. Then, when the diode has finally turned off, some tens of nanoseconds later, the VSW node voltage ramps up at an extremely high dV/dt, per- haps 5 to even 10V/ns! With real world lead inductances, the VSW node can easily overshoot the VIN rail. This can result in poor RFI behavior and if the overshoot is severe enough, damage the IC itself. The suggested catch diode (D1) is an International Recti- fier 30BQ060 Schottky. It is rated at 3A average forward current and 60V reverse voltage. Typical forward voltage is 0.52V at 3A. The diode conducts current only during switch off time. Peak reverse voltage is equal to regulator input voltage. Average forward current in normal opera- tion can be calculated from: I IV V V D AVG OUT IN OUT IN = () This formula will not yield values higher than 3A with maximum load current of 3A. BOOST␣ PIN␣ For most applications, the boost components are a 0.22mF capacitor and a MMSD914TI diode. The anode is typically connected to the regulated output voltage to generate a voltage approximately V OUT above VIN to drive the output stage. However, the output stage discharges the boost capacitor during the on time of the switch. The output driver requires at least 3V of headroom throughout this period to keep the switch fully saturated. If the output voltage is less than 3.3V, it is recommended that an alternate boost supply is used. The boost diode can be connected to the input, although, care must be taken to prevent the 2 · V IN boost voltage from exceeding the BOOST pin absolute maximum rating. The additional voltage across the switch driver also increases power loss, reducing efficiency. If available, an independent supply can be used with a local bypass capacitor. A 0.22mF boost capacitor is recommended for most appli- cations. Almost any type of film or ceramic capacitor is suitable, but the ESR should be <1W to ensure it can be fully recharged during the off time of the switch. The capacitor value is derived from worst-case conditions of 1840ns on time, 75mA boost current and 0.7V discharge ripple. The boost capacitor value could be reduced under less demanding conditions, but this will not improve circuit operation or efficiency. Under low input voltage and low load conditions, a higher value capacitor will reduce discharge ripple and improve start-up operation. SHUTDOWN FUNCTION AND UNDERVOLTAGE LOCKOUT Figure 4 shows how to add undervoltage lockout (UVLO) to the LT3431. Typically, UVLO is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. UVLO prevents the regulator from operating at source voltages where these problems might occur.

3431 F04

Figure 4. Undervoltage Lockout

3431 F06

6 BOOST

Figure 6. Suggested Layout

3431 F05

Figure 5. High Speed Switching Path

Switch loss: P RI V V tI V fSW SW OUT OUT IN EFF OUT IN= () ( ) + () ( ) ( ) 12(/ ) Boost current loss: P VI V BOOST OUT OUT IN = () 36/ Quiescent current loss: PV VQ IN OUT= () + ()0 0015 0 003.. RSW = Switch resistance (» 0.15) hot tEFF = Effective switch current/voltage overlap time = (tr + tf + tIr + tIf) tr = (VIN/1.2)ns tf = (VIN/1.1)ns tIr = tIf = (IOUT/0.05)ns f = Switch frequency Example: with VIN = 12V, VOUT = 5V and IOUT = 2A P W PW PW SW BOOST Q =+ = =+ = ... ()( / ) . (. ) (. ) . 01 5 2 5 101 10 1 2 2 12 500 10 02 5 06 1 08 6 52 3 6 01 2 12 0 0015 5 0 003 0 033 2 93 Total power dissipation in the IC is given by: PTOT = PSW + PBOOST + PQ Thermal resistance for the LT3431 package is influenced by the presence of internal or backside planes. TSSOP (Exposed Pad) Package: With a full plane under the TSSOP package, thermal resistance (qJA) will be about 45°C/W. To calculate die temperature, use the proper thermal resistance number for the desired package and add in worst-case ambient temperature: T J = TA + (qJA • PTOT) When estimating ambient, remember the nearby catch diode and inductor will also be dissipating power: P VV V I V DIODE F IN OUT LOAD IN = ( )( ± )( ) VF = Forward voltage of diode (assume 0.52V at 2A) 06 1 Notice that the catch diode’s forward voltage contributes a significant loss in the overall system efficiency. A larger, lower VF diode can improve efficiency by several percent. PINDUCTOR = (ILOAD)2(RIND) RIND = Inductor DC resistance (assume 0.1W ) PINDUCTOR (2)2(0.1) = 0.4W Typical thermal resistance of the board is 5°C/W. Taking the catch diode and inductor power dissipation into ac- count and using the example calculations for LT3431 dissipation, the LT3431 die temperature will be estimated as: T J = TA + (qJA • PTOT) + [5 • (PDIODE + PINDUCTOR)] With the TSSOP package (qJA = 45°C/W), at an ambient temperature of 50°C: Die temperature can peak for certain combinations of VIN, VOUT and load current. While higher V IN gives greater switch AC losses, quiescent and catch diode losses, a lower VIN may generate greater losses due to switch DC losses. In general, the maximum and minimum VIN levels should be checked with maximum typical load current for calculation of the LT3431 die temperature. If a more accurate die temperature is required, a measurement of the SYNC pin resistance (to GND) can be used. The SYNC pin resistance can be measured by forcing a voltage no greater than 0.5V at the pin and monitoring the pin current over temperature in an oven. This should be done with minimal device power (low V IN and no switching (VC = 0V)) in order to calibrate SYNC pin resistance with ambient (oven) temperature. APPLICATIO S I FOR ATIOWU UU

  • ( / )·= 36 2 Typically VC2 (the boost voltage across the capacitor C2) equals VOUT. This is because diodes D1 and D2 can be considered almost equal, where: VC2 = VOUT – VFD2 – (–VFD1) = VOUT. Hence the equation used for boost circuitry power dissipa- tion given in the previous Thermal Calculations section is stated as: P VI V V DISS BOOST OUT SW OUT IN
  • ( / )·= 36 Here it can be seen that Boost power dissipation increases as the square of Vout. It is possible, however, to reduce VC2 below Vout to save power dissipation by increasing the voltage drop in the path of D2. Care should be taken that V C2 does not fall below the minimum 3.3V Boost voltage required for full saturation of the internal power switch. For output voltages of 5V, VC2 is approximately 5V. During switch turn on, VC2 will fall as the boost capacitor C2 is dicharged by the boost pin. In a previous BOOST Pin section, the value of C2 was designed for a 0.7V droop in V C2 = V DROOP. Hence, an output voltage as low as 4V would still allow the minimum 3.3V for the boost function using the C2 capacitor calculated. If a target output voltage of 12V is required, however, an excess of 8V is placed across the boost capacitor which is not required for the boost function, but still dissipates additional power. What is required is a voltage drop in the path of D2 to achieve minimal power dissipation while still maintaining mini- mum boost voltage across C2. A zener, D4, placed in series with D2 (see Figure 9), drops voltage to C2. Example : The BOOST pin power dissipation for a 20V input to 12V output conversion at 2A is given by : PWBOOST ==12 2 36 12 04·( / )· . If a 7V zener D4 is placed in series with D2, then power dissipation becomes : PWBOOST ==12 2 36 5 0 167·( / )· . For an FE package with thermal resistance of 45 °C/W, ambient temperature savings would be, T (AMBIENT) sav- ings = 0.233W • 45°C/W = 11°C. The 7V zener should be sized for excess of 0.233W operaton. The tolerances of the zener should be considered to ensure minimum V C2 ex- ceeds 3.3V + VDROOP. APPLICATIO S I FOR ATIOWU UU CF

3431 F09

Figure 9. BOOST Pin, Diode Selection ground, see the section Short-Circuit Considerations.

dissipation is given in the Thermal Calculations section. son for tantalum vs ceramic output capacitors, Figure 3). circuits, read the Layout Considerations section first. inductor. The basic regulator loop is shown in Figure 10. amplifier and the power stage. Figure 10. Model for Loop Response

3431 F10

Figure 11. Overall Loop Response

3431 F11

Figure 12. Dual Source Supply with 25mA Reverse Leakage unacceptably large negative transients on the FB pin. Application Notes 19 and 76. 30mA will be pulled via the SW pin from the second supply. When using RC, the maximum value has two limitations.

3431 F12

normally. R3 is transient protection for the base of Q1. used for sequencing multiple regulator outputs.

3431 F13

Figure 13. Buck Converter with Adjustable Soft-Start

Figure 14a. Dual Polarity Output Converter with all Components Under 3mm Height VIN BOOST GND V C SHDN SYNC SW BIAS FB LT3431EFE CF 220pFCC 10nF RC 1.5k 15.4k 4.99k CDRH6D28-100 10µH CDRH6D28-100 10µH 10µF 6.3V 0805 X5R CER 22µF 6.3V X5R CER 2.2µF 50V CER V OUT1 VOUT2† –5V AT 0.9A* VOUT1 5V AT 1.5A* VIN 9V TO 16V 36V TRANSIENT B140A B140A 0.22µF MMSD914T1 22µF 6.3V X5R CER

3431 F14a

† FOR LOAD CURRENT LESS THAN 25mA, A PRELOAD OF 200Ω SHOULD BE USED TO IMPROVE LOAD REGULATION. * SEE FIGURE 14c FOR V OUT1, VOUT2 LOAD CURRENT RELATIONSHIP VOUT2 LOAD CURRENT (mA) 100 EFFICIENCY ( %)

3431 F14d

VOUT1 AT 1.5AVOUT1 AT 500mA VIN = 12V Figure 14b. VOUT2 (–5V) Maximum Allowable Load Current vs VOUT1 (5V) Load Current Figure 14c. VOUT2 (–5V) Output Voltage vs Load Current APPLICATIO S I FOR ATIOWU UU Figure 14d. Dual Polarity Output Converter Efficiency VOUT1 LOAD CURRENT (mA) VOUT2 LOAD CURRENT (mA) 3431F14b 1200 1000 800 600 400 200 0 500 1000 1500 2000 VIN = 16V VIN = 12V VIN = 9V VOUT2 LOAD CURRENT (mA) |VOUT2| (V) 200 400 1000

3431 F14c

5.30 5.25 5.20 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 4.70 VOUT1 AT 500mA VOUT1 AT 1A VOUT1 AT 1.5A VIN = 12V

proper feedback voltage for the chip. ensuring that peak switch current rating is not exceeded. load current is higher, use the continuous mode formula.

3431 F15

  • INCREASE L1 FOR HIGHER CURRENT APPLICATIONS.

Figure 15. Positive-to-Negative Converter

APPLICATIO S I FOR ATIOWU UU For a load current of 0.5A, this says that discontinuous mode can be used and the minimum inductor needed is found from: LHMIN == m21 2 05 500 10 3 () ( . ) (·) ( ) In practice, the inductor should be increased by about 30% over the calculated minimum to handle losses and variations in value. This suggests a minimum inductor of 3.5mH for this application. Ripple Current in the Input and Output Capacitors Positive-to-negative converters have high ripple current in the input capacitor. For long capacitor lifetime, the RMS value of this current must be less than the high frequency ripple current rating of the capacitor. The following for- mula will give an approximate value for RMS ripple cur- rent. This formula assumes continuous mode and large inductor value. Small inductors will give somewhat higher ripple current, especially in discontinuous mode. The exact formulas are very complex and appear in Application Note 44, pages 29 and 30. For our purposes here I have simply added a fudge factor (ff). The value for ff is about 1.2 for higher load currents and L ‡15mH. It increases to about 2.0 for smaller inductors at lower load currents. Capacitor I ff I V V RMS OUT OUT IN = () ( ) ff = 1.2 to 2.0 The output capacitor ripple current for the positive-to- negative converter is similar to that for a typical buck regulator—it is a triangular waveform with peak-to-peak value equal to the peak-to-peak triangular waveform of the inductor. The low output ripple design in Figure 15 places the input capacitor between V IN and the regulated negative output. This placement of the input capacitor significantly reduces the size required for the output capacitor (versus placing the input capacitor between VIN and ground). The peak-to-peak ripple current in both the inductor and output capacitor (assuming continuous mode) is: IP-P P-P == + DC V fL DC Duty Cycle VV VV V I RMS I IN OUT F OUT IN F COUT The output ripple voltage for this configuration is as low as the typical buck regulator based predominantly on the inductor’s triangular peak-to-peak ripple current and the ESR of the chosen capacitor (see Output Ripple Voltage in Applications Information). Diode Current Average diode current is equal to load current. Peak diode current will be considerably higher. Peak diode current: Continuous Mode I VV V VV LfV V Discontinuous Mode IV Lf OUT IN OUT IN IN OUT IN OUT OUT OUT + + () ( ) ( ) () ( ) ( ) () ( ) () ( ) Keep in mind that during start-up and output overloads, average diode current may be much higher than with normal loads. Care should be used if diodes rated less than 1A are used, especially if continuous overload conditions must be tolerated.

16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663, Exposed Pad Variation BB) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. FE16 (BB) TSSOP 0203 0.09 – 0.20 (.0036 – .0079) 0° – 8° 0.45 – 0.75 (.018 – .030) 4.30 – 4.50* (.169 – .177) 6.40 BSC 13 4 5 6 7 8 10 9 4.90 – 5.10* (.193 – .201) 16 1514 13 12 11 1.10 (.0433) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 2.94 (.116) 0.195 – 0.30 (.0077 – .0118) 2RECOMMENDED SOLDER PAD LAYOUT 0.45 –0.05

0.65 BSC

4.50 –0.10 6.60 –0.10 1.05 –0.10 2.94 (.116) 3.58 (.141) 3.58 (.141) MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE SEE NOTE 4 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT

LT/TP 0303 2K • PRINTED IN USA ª LINEAR TECHNOLOGY CORPORATION 2003 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1074/LT1074HV 4.4A (I OUT), 100kHz, High Efficiency V IN = 7.3V to 45/64V, VOUT = 2.21V, IQ = 8.5mA, ISD = 10mA, Step-Down DC/DC Converter DD-5/7, TO220-5/7 Packages LT1076/LT1076HV 1.6A (I OUT), 100kHz, High Efficiency V IN = 7.3V to 45/64V, VOUT = 2.21V, IQ = 8.5mA, ISD = 10mA, Step-Down DC/DC Converter DD-5/7, TO220-5/7 Packages LT1616 25V, 500mA (I OUT), 1.4MHz, High Efficiency V IN = 3.6V to 25V, VOUT = 1.25V, IQ = 1.9mA, ISD = <1mA, Step-Down DC/DC Converter ThinSOT Package LT1676 60V, 440mA (I OUT), 100kHz, High Efficiency V IN = 7.4V to 60V, VOUT = 1.24V, IQ = 3.2mA, ISD = 2.5mA, Step-Down DC/DC Converter S8 Package LTC1701/LTC1701B 700mA (I OUT), 1MHz, High Efficiency V IN = 2.5V to 5V, VOUT = 1.25V, IQ = 135mA, ISD = <1mA, Step-Down DC/DC Converter ThinSOT Package LT1765 25V, 2.75A (I OUT), 1.25MHz, High Efficiency V IN = 3V to 25V, VOUT = 1.2V, IQ = 1mA, ISD = 15mA, Step-Down DC/DC Converter S8, TSSOP16E Packages LT1766 60V, 1.2A (I OUT), 200kHz, High Efficiency V IN = 5.5V to 60V, VOUT = 1.2V, IQ = 2.5mA, ISD = 25mA, Step-Down DC/DC Converter TSSOP16/E Package LT1767 25V, 1.2A (I OUT), 1.25MHz, High Efficiency V IN = 3V to 25V; VOUT = 1.2V, IQ = 1mA, ISD = 6mA, Step-Down DC/DC Converter MS8/E Packages LT1776 40V, 550mA (I OUT), 200kHz, High Efficiency V IN = 7.4V to 40V; VOUT = 1.24V, IQ = 3.2mA, ISD = 30mA, Step-Down DC/DC Converter N8, S8 Packages LTC1875 1.5A (I OUT), 550kHz, Synchronous V IN = 2.7V to 6V; VOUT = 0.8V, IQ = 15mA, ISD = <1mA, Step-Down DC/DC Converter TSSOP16 Package LTC1877 600mA (I OUT), 550kHz, Synchronous V IN = 2.7V to 10V; VOUT = 0.8V, IQ = 10mA, ISD = <1mA, Step-Down DC/DC Converter MS8 Package LTC1879 1.2A (I OUT), 550kHz, Synchronous V IN = 2.7V to 10V; VOUT = 0.8V, IQ = 15mA, ISD = <1mA, Step-Down DC/DC Converter TSSOP16 Package LT1956 60V, 1.2A (I OUT), 500kHz, High Efficiency V IN = 5.5V to 60V, VOUT = 1.2V, IQ = 2.5mA, ISD = 25mA, Step-Down DC/DC Converter TSSOP16/E Package LTC3404 600mA (I OUT), 1.4MHz, Synchronous V IN = 2.7V to 6V, VOUT = 0.8V, IQ = 10mA, ISD = <1mA, Step-Down DC/DC Converter MS8 Package LTC3405/LTC3405A 300mA (I OUT), 1.5MHz, Synchronous V IN = 2.7V to 6V, VOUT = 0.8V, IQ = 20mA, ISD = <1mA, Step-Down DC/DC Converter ThinSOT Package LTC3406/LTC3406B 600mA (I OUT), 1.5MHz, Synchronous V IN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20mA, ISD = <1mA, Step-Down DC/DC Converter ThinSOT Package LTC3411 1.25A (I OUT), 4MHz, Synchronous V IN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60mA, ISD = <1mA, Step-Down DC/DC Converter MS Package LTC3412 2.5A (I OUT), 4MHz, Synchronous V IN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60mA, ISD = <1mA, Step-Down DC/DC Converter TSSOP16E Package LT3430 60V, 2.75A (I OUT), 200kHz, High Efficiency V IN = 5.5V to 60V, VOUT = 1.2V, IQ = 2.5mA, ISD = 30mA, Step-Down DC/DC Converter TSSOP16E Package ThinSOT is a trademark of Linear Technology Corporation. Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com