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Rev. 0For more information www.analog.com Document Feedback TYPICAL APPLICATION FEATURES DESCRIPTION 26V, 9A Low-IQ CC/CV Monolithic Buck-Boost Converter The LT®3120 is a high efficiency 26V monolithic buck- boost converter . Extensive feature integration and very low resistance internal power switches minimize the total solution footprint for even the most demanding applica - tions. A proprietary 4-switch PWM architecture provides seamless low noise operation from input voltages above, equal to, or below the output voltage. External frequency programming as well as synchroniza- tion using an internal PLL enable operation over a wide switching frequency range of 400kHz to 2MHz. The wide 2.5V to 26V input range is well suited for operation from unregulated power sources including battery stacks and backup capacitors. After start-up, operation is possible with input voltages as low as 500mV. Other features include, output short-circuit protection, thermal overload protection, less than 3µA shutdown cur- rent, power good indicator , Burst Mode operation, and maximum power point control. The LT3120 is offered in thermally enhanced 28-lead 4mm × 5mm LQFN package. Wide Input Range 750kHz 5V Regulator
APPLICATIONS
n Input Voltage Range: 2.5V to 26V n 0.8V to 24V Output Voltage Range n High Output Current n 6.5A with VOUT = 5V, VIN > 6V n 3A with VOUT = 5V, VIN = 3V n 6.5A with VOUT = 12V, VIN > 14V n 4 A with VOUT = 12V, VIN = 9V n Ultralow Noise Buck-Boost Architecture n Programmable Output Current Limit n Programmable Frequency Range: 400kHz to 2MHz n Accurate Enable Comparator Threshold n Burst Mode® Operation, No-Load IQ = 35µA n Current Mode Control n External Clock Synchronization n Maximum Power Point Control n 28-Lead 4mm × 5mm LQFN Package n RF Power Supply n USB Power Delivery n System Backup Power Supply n 1-Cell to 5-Cell Lithium Battery Powered Products n Wide Input Range Power Supply n Lead Acid to 12V Regulator All registered trademarks and trademarks are the property of their respective owners. Efficiency, VOUT = 5V, fSW = 750kHz PWM Burst Mode OPERATION V IN = 3V V IN = 12V V IN = 20V OUTPUT CURRENT (A) 100µ 10m 100m 100 EFFICIENCY (%)
3120 TA01
3.3µH 0.22µF 0.22µF 4.7µF 105k 10µF 22nF 536k 102k 56.2k 680pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 150µF VIN VOUT 2.5V to 26V VIN = 2.5V; IOUT =1.25A; EFFICIENCY = 85% VIN = 6.0V; IOUT = 6.5A; EFFICIENCY = 86%
3120 TA01a
Rev. 0 For more information www.analog.com PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS SW1 – 0.3V) to (SW1 + 6V) SW2 – 0.3V) to (SW2 + 6V) VOUT – 0.3V) to (PVOUT + 6V) Operating Junction Temperature (Note 2) LT3 C to 150°C C to 150°C Maximum Reflow (Package Body) Temperature ...26 0°C (Note 1) 9 10 TOP VIEW LQFN PACKAGE 28-LEAD (4mm × 5mm) LGA TJMAX = 150°C, θJA = 20°C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB 11 12 13 28 27 26 25 24 1BST3 PVOUT GND PVOUT ISP ISN PGOOD PROG GND PVIN PVIN PVIN GND V IN EN/UVLO SYNC/MODE PGND BST2 SW2 SW2 SW1 SW1 BST1 FB VC GND MPPC V CC RT 8 15 ORDER INFORMATION PART NUMBER PAD OR BALL FINISH PART MARKING PACKAGE TYPE MSL RATING TEMPERATURE RANGE (SEE NOTE 2)DEVICE FINISH CODE LT3120JV#PBF Au (RoHS) 3120 e4 LQFN (Laminate Package with QFN Footprint) 3 –40°C to 150°C
- Contact the factory for parts specified with wider operating temperature ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.
- Recommended LGA and BGA PCB Assembly and Manufacturing Procedures
- LGA and BGA Package and Tray Drawings
Rev. 0For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating temperature range, otherwise specifications are at TA = 25°C. VIN = PVIN = 12V, PVOUT = 5V unless otherwise stated. PARAMETER CONDITIONS MIN TYP MAX UNITS Input Operating Voltage After Start-Up (Note 4) l 2.5 0.5 V V Output Operating Range l 0.8 24 V VCC Undervoltage Lockout Threshold V CC Rising VCC Falling l l 2.2 2.35 2.25 2.4 V V V CC Undervoltage Lockout Hysteresis 100 mV Input Current in Shutdown EN/UVLO = 0V 3 µA Input Current in Sleep FB = 0.9V 30 µA Oscillator Frequency RT = 76.8kΩ l 900 1000 1100 kHz Oscillator Frequency Range l 400 2000 kHz SYNC/MODE Frequency Range l 400 2000 kHz SYNC/MODE Logic Threshold l 0.3 0.7 1.1 V SYNC/MODE Minimum Pulse Width Minimum Low or High Duration 100 ns Soft-Start Duration 6 ms Feedback Voltage l 787 779 795 795 803 811 V V FB Pin Input Current 1 50 nA Error Amplifier Transconductance 120 µs EN/UVLO Pin Input Logic Threshold l 0.3 0.8 1.0 V EN/UVLO Pin Comparator Threshold Rising Rising, –40°C ≤ TJ ≤ 125°C l 1.169 1.169 1.205 1.258 1.241 V V EN/UVLO Pin Hysteresis Current 250 nA EN/UVLO Pin Hysteresis Voltage 90 mV PROG Pin Current V ISP – VISN = 25mV VISP – VISN = 10mV 47.5 52.5 µA µA PROG Pin Threshold l 779 795 811 V MPPC Pin Threshold l 774 795 822 V PGOOD Threshold Percent of FB Voltage Falling l –9.5 –8 –6.5 % PGOOD Hysteresis Percent of FB Voltage 1.2 % PGOOD Pull-Down Resistance 100 250 Ω PGOOD Leakage VPGOOD = 24V 1 40 nA Inductor Current Limit Limit on Average (Not Peak) Inductor Current l 8.25 9.5 A Burst Mode Inductor Current Limit Limit on Average (Not Peak) Inductor Current 1 A Maximum Duty Cycle Percentage of Period SW2 is Low in Boost Mode, R T = 76.8kΩ (Note 4) l 91 95 % SW1, SW2 Minimum Low Time (Note 4) 70 ns
Rev. 0 For more information www.analog.com PARAMETER CONDITIONS MIN TYP MAX UNITS N-Channel Switch Resistance Switch A (PV IN to SW1) Switch B (SW1 to PGND) Switch C (SW2 to PGND) Switch D (SW2 to PV OUT) mΩ mΩ mΩ mΩ N-Channel Switch Leakage PV IN = PVOUT = 24V; SW1 = SW2 = 0V 1 10 µA VCC Regulation Voltage l 3.6 3.73 3.86 V VCC Dropout Voltage ICC = 50mA, VIN = 3.6V 100 mV VCC Current Limit 100 mA VCC Reverse Current VCC = 5V, VIN = 3V 5 µA ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating temperature range, otherwise specifications are at TA = 25°C. VIN = PVIN = 12V, PVOUT = 5V unless otherwise stated. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3120J is guaranteed to meet performance specifications over the –40°C to 150°C operating junction temperature ranges. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note 3: Minimum input voltage is governed by the V CC UVLO threshold. If VCC is maintained through external bootstrapping, the part will continue to operate until power transfer to the output is no longer possible. Note 4: Switch timing measurements are made in an open-loop test configuration. Timing in the application may vary somewhat from these values due to differences in the switch pin voltage during the non-overlap durations when switch pin voltage is influenced by the magnitude and direction of the inductor current.
Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Maximum Reverse Current During MPPC Control (VMPPC < 0.83) Line Regulation Load Regulation Power Switch Resistance vs Temperature Power Switch Resistance vs V CC EN/UVLO Pin Hysteresis Current vs Temperature EN/UVLO Pin Accurate Threshold vs Temperature EN/UVLO Pin Logic Thresholds vs Temperature EN/UVLO Pin Current vs EN/UVLO Pin Voltage LOAD = 1A SYNC/MODE = HIGH INPUT VOL TAGE (V) –1.0 –0.8 –0.6 –0.4 –0.2 0.0 0.2 0.4 0.6 0.8 1.0 CHANGE IN V OUT (%)
3120 G02
LOAD CURRENT (A) –0.5 –0.4 –0.3 –0.2 –0.1 0.0 0.1 0.2 0.3 0.4 0.5 CHANGE IN V OUT (%)
3120 G03
TEMPERATURE ( –60 –30 120 150 220 225 230 235 240 245 250 255 260 HYSTERESIS CURRENT (nA)
3120 G06
TEMPERATURE ( –60 –30 120 150 1.05 1.10 1.15 1.20 1.25 1.30 1.35 THRESHOLD VOL TAGE (V)
3120 G07
TEMPERATURE ( –60 –30 120 150 450 530 610 690 770 850 THRESHOLD VOL TAGE (mV)
3120 G08
V OUT = 5V f SW = 1MHz INPUT VOL TAGE (V) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 REVERSE CURRENT (mA)
3120 G01
TEMPERATURE (°C) –60 –30 120 150 SWITCH RESISTANCE (m/uni03A9)
3120 G04
V CC VOL TAGE (V) 2.5 3.5 SWITCH RESISTANCE (m/uni03A9)
3120 G05
VOL TAGE (V) EN/UVLO PIN CURRENT (µA)
3120 G09
Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS VCC UVLO Threshold vs Temperature Oscillator Frequency vs RT Oscillator Frequency vs VIN Oscillator Frequency vs Temperature FB Voltage vs Temperature PROG Pin Voltage vs Temperature MPPC Pin Voltage vs Temperature SW1, SW2 Minimum Low Time vs V CC RISING FALLING TEMPERATURE ( –60 –30 120 150 2.20 2.22 2.24 2.26 2.28 2.30 2.32 2.34 2.36 2.38 2.40 THRESHOLD VOL TAGE (V)
3120 G10
RT PIN RESISTOR (k/uni03A9) 110 140 170 200 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 OSCILLATOR FREQUENCY (MHz)
3120 G11
TEMPERATURE ( –60 –30 120 150 –0.8 –0.5 –0.2 0.1 0.4 0.7 1.0 CHANGE FROM 25 C (%)
3120 G13
TEMPERATURE ( –60 –30 120 150 –0.4 –0.3 –0.2 –0.1 0.0 0.1 CHANGE FROM 25 C (%)
3120 G14
TEMPERATURE ( –60 –30 120 150 CHANGE FROM 25 C (%)
3120 G16
V CC VOL TAGE (V) 2.5 3.5 4.5 –20 –10 CHANGE (%)
3120 G17
INPUT VOL TAGE (V) –2.0 –1.5 –1.0 –0.5 0.5 1.0 CHANGE FROM VIN = 12V (%)
3120 G12
TEMPERATURE (°C) –60 –30 120 150 –0.7 –0.5 –0.3 –0.1 0.1 0.3 CHANGE FROM 25°C (%)
3120 G15
Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Efficiency, VOUT = 3.3V, fSW = 500kHz Efficiency, VOUT = 3.3V, fSW = 1MHz Efficiency, VOUT = 3.3V, fSW = 2MHz Efficiency, VOUT = 5V, fSW = 500kHz Efficiency, VOUT = 5V, fSW = 1MHz Efficiency, VOUT = 5V, fSW = 2MHz Efficiency, VOUT = 12V, fSW = 500kHz Efficiency, VOUT = 12V, fSW = 1MHz Efficiency, VOUT = 12V, fSW = 2MHz PWM Burst Mode OPERATION V IN = 2.6V V IN = 5V V IN = 12V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G18
OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G19
V IN = 2.6V V IN = 5V V IN = 12V PWM Burst Mode OPERATION V IN = 2.6V V IN = 5V V IN = 12V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G20
V IN = 3V V IN = 5V V IN = 12V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G21
V IN = 3V V IN = 5V V IN = 12V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G22
V IN = 3V V IN = 5V V IN = 12V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G23
V IN = 5V V IN = 15V V IN = 12V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G24
V IN = 5V V IN = 12V V IN = 15V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G25
V IN = 5V V IN = 12V V IN = 15V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G26
Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Efficiency, VOUT = 15V, fSW = 500kHz Efficiency, VOUT = 15V, fSW = 1MHz Efficiency, VOUT = 15V, fSW = 2MHz Efficiency, VOUT = 20V, fSW = 500kHz Efficiency, VOUT = 20V, fSW = 1MHz Efficiency, VOUT = 20V, fSW = 2MHz Efficiency, VOUT = 24V, fSW = 500kHz Efficiency, VOUT = 24V, fSW = 1MHz Efficiency, VOUT = 24V, fSW = 2MHz PWM V IN = 12 V IN = 16 V IN = 26 OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G27
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G28
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G29
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G30
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G31
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100u 10m 100m 100 EFFICIENCY (%)
3120 G32
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G33
OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G34
V IN = 12V V IN = 16V V IN = 26V OUTPUT CURRENT (A) 100/uni03BC 10m 100m 100 EFFICIENCY (%)
3120 G35
V IN = 12V V IN = 16V V IN = 26V
Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Temperature Rise vs Load Current Temperature Rise vs Load Current Temperature Rise vs Load Current Temperature Rise vs Load Current Temperature Rise vs Load Current Temperature Rise vs Load Current Maximum Output Current, VOUT = 5V Maximum Output Current, V OUT = 12V Maximum Output Current, V OUT = 20V V OUT = 5V f SW = 750kHz DC2815A DEMO BOARD V IN = 5V V IN = 12V V IN = 20V LOAD CURRENT (A) 100 TEMPERATURE RISE (
3120 G36
V OUT = 5V f SW = 2MHz DC2815A DEMO BOARD LOAD CURRENT (A) 120 150 TEMPERATURE RISE (
3120 G37
V IN = 5V V IN = 12V V IN = 20V V OUT = 12V f SW = 750kHz DC2815A DEMO BOARD LOAD CURRENT (A) 100 125 TEMPERATURE RISE (
3120 G38
V IN = 5V V IN = 12V V IN = 20V V OUT = 12V f SW = 2MHz DC2815A DEMO BOARD LOAD CURRENT (A) 120 150 TEMPERATURE RISE (
3120 G39
V IN = 5V V IN = 12V V IN = 20V V OUT = 20V f SW = 750kHz DC2815A DEMO BOARD V IN = 12V V IN = 20V V IN = 25V LOAD CURRENT (A) 120 150 TEMPERATURE RISE (
3120 G40
V OUT = 20V f SW = 2MHz DC2815A DEMO BOARD LOAD CURRENT (A) 1.5 2.5 3.5 120 150 TEMPERATURE RISE (
3120 G41
V IN = 12V V IN = 20V V IN = 25V DC2815A DEMO BOARD 100Hz PULSE LOAD 20% DUTY CYCLE STANDBY LOAD = 0.25A PULSED LOAD CONTINUOUS LOAD 750kHz 2MHz INPUT VOL TAGE (V) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 OUTPUT CURRENT (A)
3120 G42
INPUT VOL TAGE (V) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 OUTPUT CURRENT (A)
3120 G43
20% DUTY CYCLE STANDBY LOAD = 0.25A PULSED LOAD CONTINUOUS LOAD 750kHz 2MHz INPUT VOL TAGE (V) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 OUTPUT CURRENT (A)
3120 G44
20% DUTY CYCLE STANDBY LOAD = 0.25A PULSED LOAD CONTINUOUS LOAD 750kHz 2MHz
Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Burst Mode Operation No-Load Input Current PWM Mode No-Load Input Current PWM Mode Operation 0.5A to 5A Load Step, V IN = 12V, VOUT = 5V Burst Mode Operation 0.5A to 5A Load Step, V IN = 12V, VOUT = 5V V OUT = 5V V OUT = 12V V OUT = 20V INPUT VOL TAGE (V) 100 150 200 250 300 INPUT CURRENT (/uni03BCA)
3120 G45
V OUT = 5V V OUT = 12V V OUT = 15V V OUT = 20V INPUT VOL TAGE (V) 100 INPUT CURRENT (mA)
3120 G46
200µs/DIV V OUT 250mV/DIV
3120 G47
200µs/DIV INDUCTOR CURRENT 5A/DIV OUTPUT CURRENT 5A/DIV V OUT 250mV/DIV
3120 G48
V OUT Ripple, VOUT = 5V PWM Light Load Operation, V OUT = 5V 2µs/DIV V SW1 10V/DIV V SW2 5V/DIV V OUT 50mV/DIV I L 1A/DIV
3120 G49
2µs/DIV SW1 10V/DIV SW2 5V/DIV INDUCTOR CURRENT 1A/DIV
3120 G50
Rev. 0For more information www.analog.com PIN FUNCTIONS BST3 (Pin 1): Flying Capacitor Pin for Output Current Sense Amplifier . This pin must be connected to PV OUT through a 22nF capacitor . PVOUT (Pins 2, 4): Output Voltage Power Connection. These pins are connected to switch D of the buck-boost converter . Connect a low ESR capacitor between these pins and GND using the lowest impedance path possible. GND (Pins 3, 11, 18, 22, Exposed Pad Pin 29): Ground Connection. These pins should be connected to the board ground using the shortest and widest connections pos - sible. High via density should be used under the exposed pad to maximize heat transfer away from the part. ISP (Pin 5): Current Sense Positive Input. Connect this pin to the IC side of the output current sense resistor . If cur- rent sense is not being used, connect this pin to PVOUT. ISN (Pin 6): Current Sense Negative Input. Connect this pin to the VOUT side of the output current sense resistor . If current sense is not being used, connect this pin to PVOUT. PGOOD (Pin 7): Open Drain Output Indicator . When FB drops too far below its regulated voltage this output pulls to ground. Connect a pull-up resistor from this pin to a posi- tive supply. Refer to the Operation section for more detail. PROG (Pin 8): Output Average Current Limit Set Point. A resistor should be connected between this pin and GND to program the maximum average output current. The output current from this pin can also be used as an analog output current indicator . To disable this function, the pin should be connected to VCC. FB (Pin 9): Feedback Voltage Input. A resistive divider connected to this pin sets the output voltage for the buck- boost converter . The nominal FB voltage is 0.795V. VC (Pin 10): Error Amplifier Output. A frequency compen- sation network must be connected between this pin and GND to stabilize the voltage control loop. MPPC (Pin 12): Maximum Power Point Control Pin Setpoint. Connect this pin to a resistive divider from VIN to GND to set the input regulation voltage. When not being used, the MPPC pin should be tied to VCC. VCC (Pin 13): Internal Regulator Output Voltage. This pin is the output of the internal low voltage linear regulator used to supply the control circuitry. A 4.7µF capacitor should be connected between this pin and GND using the shortest trace possible. An additional external load of up to 10mA may be drawn from this output. RT (Pin 14): Oscillator Frequency Programming Pin. Connect a resistor between this pin and GND to set the buck-boost converter switching frequency. SYNC/MODE (Pin 15): Automatic Burst Mode Operation/ PWM Mode Control Pin and Synchronization Input. Forcing this pin high causes the IC to operate in fixed frequency PWM mode at all loads using the internal oscillator at the frequency set by the RT Pin. Forcing this pin low, causes the IC to enable Burst Mode operation at light loads to maximize efficiency. Clocking this pin will cause the part to synchronize to the clock for frequencies higher than the frequency pro- grammed by the RT Pin. When using this pin for synchroni- zation, a minimum input pulse width of 100ns must be used. EN/UVLO (Pin 16): Input to Enable and Disable the IC and Set Custom Input UVLO Threshold. The EN/UVLO pin can be driven by external logic signals to enable and disable the IC. In addition, the voltage on this pin can be set by a resis- tive divider connected to the input voltage to provide an accurate undervoltage lockout threshold. The IC is enabled if the EN/UVLO pin voltage exceeds 1.215V nominally. VIN (Pin 17): Input Voltage Pin for Internal VCC Regulator . PVIN (Pins 19, 20, 21): Input Voltage Power Connection. These pins are connected to switch A of the buck-boost converter . Connect a 10µF or larger capacitor between these pins and GND using the lowest impedance path possible. BST1 (Pin 23): Flying Capacitor Pin for SW1. This pin must be connected to SW1 through a 0.22µF capacitor . This pin is used to generate the gate drive rail for power switch A. SW1 (Pins 24, 25): Buck-Boost Converter Power Switch Pin. These pins should be connected to one side of the buck-boost inductor . SW2 (Pins 26, 27): Buck-Boost Converter Power Switch Pin. These pins should be connected to one side of the buck-boost inductor . BST2 (Pin 28): Flying Capacitor Pin for SW2. This pin must be connected to SW2 through a 0.22µF capacitor . This pin is used to generate the gate drive rail for power switch D. The capacitance on this node should be 10 times greater than that used between BST3 and PVOUT .
Rev. 0 For more information www.analog.com BLOCK DIAGRAM AD GND B C PVIN 2124 SW1 SW2 264 GND BST2 SOFT-START RAMP PVOUT 26 5 PGOODPROG VIN VCC BST1 BST2 REVERSE BLOCKING LDO BANDGAP REFERENCE OVERTEMPERATUREOSCILLATOR MODE SELECTION 0.795V 0.9V 1.205V PWM CHIP ENABLE FB 0.795V VC RT14 SYNC/MODE (PWM)15 1.205V GND 2.35V VCCUVLO + EN/UVLO 3120 BD 22181129 3 CURRENT LIMIT 0.795V ZERO CURRENT 12.6A BST1 MPPC 12 + 0.795V 736mV FB 2/uni03BCA/mV BST3 ISN ISP
capacitors and further simplify application circuit design. operation is enabled, with a current of only 30µA (typical). Figure 1. Power Stage Schematic
3120 F01
every cycle independent of the input and output voltages. duty cycle to maintain regulation of the output voltage.
solution size and optimum power conversion efficiency. 5V, it will sink a small current as given by Equation 1. raising the EN/UVLO pin voltage away from the threshold.
3120 F02
well as the 90mV hysteresis of the EN/UVLO comparator . by scaling the values of both resistors. Figure 2. Accurate EN/UVLO Pin Comparator
be driven from the output rail through a Schottky diode. of the active control loop (FB or MPPC). Figure 3. Inner Average Current Loop Diagram
3120 F03
the advantages inherent to peak current mode control. tween the output of the error amplifiers (VC pin) and GND. DC errors in the output voltage. Figure 4. FB and VC Pin Configuration
3120 F04
the voltage loop and reduce the commanded current level. favor of the compensation for the loop which is in control. the SW1 and SW2 pins on a cycle-by-cycle basis.
current levels beyond the capability of the IC. average current loop responding. from discharging the output storage element. sients and output voltage overshoot on initial power-up. to the programmed minimum voltage.
3120 F05
Figure 5. MPPC Pin Configuration limit that can be used to control current to the output load. resistor from PROG to ground. voltage on the PROG pin reaches 795mV. The current output from the PROG pin is equal to Equation 2.
Rev. 0For more information www.analog.com The value for RSEN should be selected to limit the maximum voltage between ISP and ISN to 25mV at current limit. For current monitoring applications, the values for R SEN and RPROG should be selected to not exceed 700mV on the PROG pin. When current sensing is not used, the ISP and ISN pins should be tied to PV OUT and the PROG pin should be tied to VCC. Burst Mode OPERATION When the SYNC/MODE pin is held low, the LT3120 is configured for Burst Mode operation. As a result, the buck- boost DC/DC converter will operate with continuous PWM switching until the output current drops to low levels at which point the converter will automatically transition to power saving Burst Mode operation. When operating in Burst Mode operation, the LT3120 will go into a sleep state when the output voltage achieves its nominal regulation level. The sleep state halts PWM switching and powers down all nonessential functions of the IC, reducing the quiescent current of the LT3120 to just 30µA (typical). This greatly improves overall power conversion efficiency for light loads. Since the converter is not switching in sleep, the output voltage will slowly decay at a rate determined by the output load resistance and the output capacitor value. When the output voltage has decayed by a small amount, the LT3120 will wake and initiate PWM switching operation until the output voltage on V OUT is restored to the previous level. If the load is very light, the LT3120 may only need to switch for a few cycles to restore V OUT and will sleep for extended periods of time, significantly improv- ing efficiency. If the load is suddenly increased above the burst transition threshold, the part will automatically enter continuous PWM operation until the load is once again reduced. Note that Burst Mode operation is inhibited until soft-start is completed and V OUT has reached regulation. Burst Mode operation is also inhibited when the MPPC loop is in control. OPERATION POWER GOOD INDICATOR The LT3120 provides an open-drain PGOOD output that pulls low if VOUT falls more than 8% (typical) below its pro- grammed value. When VOUT rises to within 6.8% (typical) of its programmed value, the internal PGOOD pull-down will turn off and PGOOD will go high if an external pull- up resistor has been provided. An internal filter prevents nuisance trips of PGOOD due to short transients on V OUT. Note that PGOOD can be pulled up to any voltage, as long as the absolute maximum rating of 27V is not exceeded. The PGOOD function is active when the EN/UVLO pin volt- age is above the logic enable threshold of 0.8V (typical). When the EN/UVLO pin voltage is below 0.8V (typical) and the VCC supply is still present, the PGOOD pull-down will be enabled. THERMAL CONSIDERATIONS The power switches in the LT3120 are designed to oper- ate continuously with currents up to the internal current limit thresholds. Operating at high current levels results in significant heat generated within the IC. In addition, in many applications the V CC regulator is operated with large input-to-output voltage differentials resulting in significant additional power dissipation in the pass element. As a result, careful consideration must be given to the thermal environment of the IC in order to optimize efficiency and ensure that the LT3120 is able to provide its full-rated output current. Specifically, the exposed thermal pad of the LQFN must be soldered to the PC board. The PC board should be designed to maximize the conduction of heat out of the IC package, maximizing vias from the thermal pad connection to a large area of exposed copper . Additional benefit can be realized through the use of thinner printed circuit boards, and higher layer counts with internal layers tied to the thermal vias. These steps minimize thermal resistance of the PCB, allowing for operation over a wider temperature range and greater output current levels. If the die temperature exceeds approximately 165°C, the IC will enter overtemperature shutdown and all switching will be inhibited. The part will remain disabled until the die cools by approximately 10°C. The soft-start circuit is re-initialized in over temperature shutdown to provide a smooth recovery when the fault condition is removed.
Figure 7. Diode-OR of Input Supply and VOUT Powers VCC Regulator a 4.7µF low ESR ceramic capacitor is a good choice. through the shortest traces possible. R2 are the values of the resistor divider resistors. R1 and R2 are the values of the voltage divider . Figure 6. Bootstrapping VCC from VOUT Figure 8. Setting the Input UVLO and Hysteresis
3120 F08
addition of an additional resistor RH, as shown in Figure 9. and the hysteresis is given by Equation 6. Figure 9. Increasing Input UVLO Hysteresis
3120 F09
interfere with operation of the hysteresis. be found in Typical Performance Characteristics section. is generally higher in boost mode than in buck mode. voltage ripple is dominated by the inductor current ripple.
Rev. 0 For more information www.analog.com APPLICATIONS INFORMATION Input Capacitor Selection PVIN pins carry the full inductor current and provides power to internal control circuits in the IC. To minimize input voltage ripple and ensure proper operation of the IC, a low ESR bypass capacitor with a value of at least 10µF should be located as close to this pin as possible. The traces connecting this capacitor to PV IN and the ground plane should be made as short as possible. The V IN pin provides power to the V CC regulator and other internal circuitry. If the PCB trace connecting VIN to PVIN is long, it may be necessary to add an additional small value bypass capacitor near the V IN pin. When powered through long leads or from a high ESR power source, a larger value bulk input capacitor may be required. In such applications, a 47µF to 100µF electrolytic capacitor in parallel with a 1µF ceramic capacitor generally yields a high performance, low cost solution. When powered through an inductive connection such as a long cable, the inductance of the power source and the input bypass capacitor form a high-Q resonant LC filter . In such applications, hot-plugging into a powered source can lead to a significant voltage overshoot, even up to twice the nominal input source voltage. Care must be taken in such situations to ensure that the absolute maximum input voltage rating of the LT3120 is not violated. See Analog Devices Application Note 88 for solutions to increase damp- ing in the input filter and minimize this voltage overshoot. Inductor Selection The choice of inductor used in LT3120 application circuits influences the maximum deliverable output current, the converter bandwidth, the magnitude of the inductor current ripple and the overall converter efficiency. The inductor must have a low DC series resistance, when compared to the internal switch resistance (25mΩ), or output current capability and efficiency will be compromised. Larger in- ductor values reduce inductor current ripple but may not increase output current capability as is the case with peak current mode control. Larger value inductors also tend to have a higher DC series resistance for a given case size, which will have a negative impact on efficiency. Larger values of inductance will also lower the right half plane zero (RHPZ) frequency when operating in boost mode, which can compromise loop stability. Nearly all LT3120 application circuits deliver the best performance with an inductor value between 1.5µH and 15µH. Buck mode only applications can use the larger inductor values as they are unaffected by the RHPZ, while mostly boost applications generally require inductance on the lower end of this range depending on how large the step-up ratio is. Regardless of inductor value, the saturation current rating should be selected such that it is greater than the worst-case average inductor current plus half of the ripple current. The peak-to-peak inductor current ripple for each opera- tional mode can be calculated using Equation 10, where fSW is the programmed switching frequency, L is the inductance and tLOW is the switch pin minimum low time, typically 70ns. ΔIL P-P( ) BUCK( ) ≅VOUT L VIN −VOUT VIN ⎟ 1 fSW −tLOW ΔIL P-P( ) BOOST( ) ≅VIN L VOUT −VIN VOUT ⎟ 1 fSW −tLOW (10) It should be noted that the worst-case peak-to-peak in - ductor ripple current occurs when the duty cycle in buck mode is minimum (highest VIN) and in boost mode when the duty cycle is 50% (VOUT ≅ 2 • VIN). As an example, if V IN (minimum) = 2.5V and V IN (maxi- mum) = 15V, VOUT = 5V, fSW = 1MHz and L = 4.7µH, the peak-to-peak inductor ripples at the voltage extremes (15V VIN for buck and 2.5V VIN for boost). See Equation 11. ΔIL P-P( ) BUCK( ) ≅ 5V 4.7µH 15V −5V 15V ⎝⎜ ⎞ ⎠⎟•930ns=659mA ΔIL P-P( ) BOOST( ) ≅ 2.5V 4.7µH 5V −2.5V ⎝⎜ ⎞ ⎠⎟•930ns=247mA (11)
Rev. 0For more information www.analog.com One half of this inductor ripple current must be added to the highest expected average inductor current in order to select the proper saturation current rating for the inductor . Programming the Output Voltage The output voltage is set via the external resistive divider comprised of resistors R TOP and RBOT as shown in Figure 4. The resistor divider values determine the output regulation voltage according to Equation 12. VOUT = 0.795V• 1+ RTOP RBOT (12) Programming the MPPC Voltage T he LT3120 includes an MPPC function to optimize performance when operating from current limited input sources. Using an external voltage divider from V IN, the MPPC function takes control of the average inductor cur- rent when necessary to maintain a minimum input voltage V MPPC, as programmed by the user . (See Figure 5). VMPPC = 0.795V• 1+ R5 ⎝⎜ ⎞ (13) Thi s is useful for such applications as photovoltaic powered converters, since the maximum power transfer point occurs when the photovoltaic panel is operated at approximately 75% of its open-circuit voltage. For example, when operat- ing from a photovoltaic panel with an open-circuit voltage of 10V, the maximum power transfer point will be when the panel is loaded such that its output voltage is about 7.5V. When using the MPPC function, the input capacitor should be sized between 100µF and 470µF. Resistor R6 should be chosen between 50k and 250k. Lower values will result in smaller undershoot of the MPPC tracking point during line and load transient conditions, but will draw more current from the input supply. For this example, a value of 100kΩ will be used. The value of R5 can then be determined us- ing Equation 14 to set the desired input MPPC voltage. R5= VMPPC 0.795V −1⎛ ⎝⎜ ⎞ ⎠⎟•R6 = 7.5V 0.795V −1⎛ ⎝⎜ ⎞ ⎠⎟•100kΩ = 843kΩ ≅845kΩ (14) Using these resistor values, the MPPC function is pro - grammed to control the maximum input current so as to maintain VIN at a minimum of 7.56V. Note that if the pho- tovoltaic panel can provide more power than the LT3120 can draw or the load requires, the input voltage will rise above the programmed MPPC point. Higher input voltages do not present a problem so long as the input voltage does not exceed the maximum operating input voltage. For photovoltaic panel applications, it may be also desir- able to use the programmable EN/UVLO feature to disable the part when V IN drops too low due to lack of sufficient light. Using the EN/UVLO pin provides a well-controlled behavior when the input power source is dropping out by halting switching to prevent discharge of the output. This custom input UVLO voltage should be programmed to be below the MPPC tracking voltage with sufficient margin to ensure the part does not disable under transient conditions. The MPPC loop requires compensation to maintain stability of the input voltage regulation loop. This can be accomplished by means of a pole-zero pair on the MPPC pin created with a series RC network in parallel with the lower MPPC resistor R6 as shown in Figure 5. The pole and zero locations should be selected to create a low frequency pole at or below approximately 360Hz and a zero at a frequency that is scaled based on the size of the input capacitor . Equation 15 determines the values for the compensation capacitor C C2, and zero resistor RC2. CC2 = 1 2π•R6 •360Hz RC2 = CIN 2π•CC2 (15) Using the divider values from the previous example and a 220µF input capacitor , the value of the compensation components can be calculated as shown in Equation 16. CC2 = 1 2π•100kΩ•360Hz = 4.42nF ≅4.3nF RC2 = 220µF 2π•4.3nF = 8.14kΩ≅ 8.25kΩ (16) APPLICATIONS INFORMATION
calculated using Equation 17. maintain wide bandwidth and good transient response. treated like a voltage controlled current source (VCCS). LOAD) and output capacitor (COUT). in gain, like a zero, but a decrease in phase, like a pole. Figure 10. Simplified Representation of Control
3120 F10
level, which equals the output current level in buck mode.
Rev. 0For more information www.analog.com APPLICATIONS INFORMATION by the efficiency divided by the boost ratio (see Equation 21 and Equation 22). Refer to the typical curves for ef - ficiency information. GCS(OUT) =13.6A / V (Buck Mode) (21) GCS(OUT) = 13.6A / V • VIN 2VOUT
- Eff (Boost Mode) (22) Frequency dependent terms that affect the loop gain are given by Equation 23 through Equation 26. Output Load Pole (P1) fP1 = 2 2π•RLOAD •COUT (23) Error Amplifier Compensation (P2, Z1) fP2 = 1 2π•REACC Hz (close to DC) (24) fZ1 = 1 2π•RZ •CC Hz (25) Right Half Plane Zero fRHPZ = VIN 2 •RLOAD VOUT 2 •2π•L Hz (26) In some cases it may not be possible to achieve sufficient loop bandwidth and phase margin using a simple RC net- work connected to the VC pin. In these cases additional compensation may be required. This is accomplished by the addition of a feed forward RC network in parallel with the top resistor of the feedback divider . A small feed forward capacitor alone may be sufficient in some applications. A common situation that may require a feed forward net- work is when the converter is operating in boost mode and the closed loop crossover frequency (fCC) is close the Right Half Plane Zero. This may be done in order to reduce output capacitance requirements by increasing the loop bandwidth. Due to the additional phase loss introduced by the RHPZ, a simple RC compensation network on the VC pin may not be able to provide sufficient phase boost to stabilize the loop. Compensation Example This section will demonstrate how to derive and select the compensation components for a 5V output supplying 3A from an input voltage as low as 3V. The compensation is designed for the worse case boost mode operation which typically represents the worse case stability. Designing compensation for most other applications is simply a matter of substituting in different values to the equations given in the example and reviewing the resulting Bode Plot, adjusting as needed. Since the compensation design procedure uses a simplified model of the LT3120, results should be checked using time domain step response tests to validate the effectiveness of the compensation chosen. It is assumed that values and types for capacitors and the inductor will be selected based on the guidance given elsewhere in this data sheet. Particular attention should be paid to voltage biasing effects on capacitors used for input and output bypassing. Similarly, it is assumed that inductor values and current ratings are selected based on application requirements. Example Operating Conditions: VIN = 3V to 20V VOUT = 5V ILOAD(MAX) = 3A COUT = 150µF L = 2.2µH fSW = 1MHz First it is necessary to determine the lowest frequency for fRHPZ (see Equation 27). This will determine the maximum bandwidth that can safely be configured for the converter while operating in boost mode. fRHPZ = VIN 2 •RLOAD VOUT 2 •2π•L = 43.4kHz (27) In order to ensure sufficient safety margin, the closed loop crossover frequency (f CC) should be sufficiently below the RHPZ frequency to account for variability of the internal components of the IC as well as variability of external influences on the converter response at the cost of possibly higher loop bandwidth. If sufficient phase margin exists at the crossover frequency, a higher loop
Rev. 0 For more information www.analog.com APPLICATIONS INFORMATION bandwidth may be realizable while still maintaining stabil- ity and good transient response. In this example, we will use cross over frequency equal to one sixth of the RHPZ frequency (see Equation 28). fCC = fRHPZ 7 ≅6.2kHz (28) The RHPZ will have a negligible effect on the gain at the loop crossover , however it will have a phase contribution that must be considered (see Equation 29). ϕRHPZ = –1• tan–1 fcc fRHPZ ⎝⎜ ⎞ ⎠⎟ = –8.1° (29) Since the converter will be operating in boost mode, the GCS term must be scaled to represent the commanded output current. Looking in the Typical Curves section, we find the efficiency to be roughly 80%. Using this information, the effective output current gain can be calculated using Equation 30. GCS(OUT) = GCS • VIN 2VOUT
- Eff⎛ ⎠⎟ = 3.265A V (30) Using this information, the gain and phase contributions from the output filter are calculated using Equation 31. GOUT = GCS(OUT) • RLOAD fCC fP1 = 1.098 ϕP1 = –1• tan–1 fcc fP1 1273 ⎝⎜ ⎞ ⎠⎟ = –78.4° (31) Choosing a phase margin of 50 degrees, the required phase boost from the compensation network is determined by summing together the phase contributions that were calculated in Equation 31. A phase contribution of –90° is assumed for P2. ϕZ1 = 50 –ϕP2 – ϕP1– ϕRHPZ –180 = 46.5° (32) The compensation network gain is used to adjust the loop gain to crossover at the desired frequency. Using the feedback divider gain and output gain, the compensation network gain is calculated using Equation 33 GCOMP = VREF VOUT
- GOUT = 5.727 (33) The compensation network resistor is then found using the error amplifier transconductance and the required compensation gain found in Equation 33. RZ = GCOMP gm = 5.727 120µs = 47.7kΩ (34) With the value of R Z now known, the compensation ca- pacitor can be chosen to place the zero Z1 in the correct location. CP1 = tan ϕZ1( ) 2π• fCC •RZ = 565pF (35) Selecting standard value components, values of R Z = 47.5kΩ and CP1 = 560pF are used. PCB Layout Considerations The LT3120 buck-boost converter switches large currents at high frequencies. Special attention should be paid to the PC board layout to ensure a stable, noise-free and efficient application circuit. Figure 11 shows a representative PCB to outline some of the primary considerations. A few key guidelines are provided below. The parasitic inductance and resistance of all circulat- ing high current paths should be minimized. This can be accomplished by keeping the routes to all bold com- ponents in Figures 11 as short and as wide as possible. Capacitor ground connections should via down to the ground plane by way of the shortest route possible. The bypass capacitors on PVIN, PVOUT and VCC should be placed as close to the IC as possible and should have the shortest possible paths to ground.
3120 F11
- The exposed pad is the electrical ground connection
power handling capabilities of the IC. sectional area of the high frequency current loops.
- To prevent large circulating currents in the ground
- Keep the routes connecting to the high impedance,
Figure 11. PCB Layout
Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS 500kHz Wide Input Regulator 3.3V APPLICATION EXAMPLES 1MHz Wide Input Regulator 4.7µH 0.22µF 0.22µF 4.7µF 158k 10µF 22nF 316k 100k 21k 3300pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 220µF VIN VOUT 2.5V TO 26V 3.3V VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 92% VIN = 4V; IOUT = 6.5A; EFFICIENCY = 81%
3120 TA03
2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 22nF 316k 100k 34.8k 1000pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 150µF VIN VOUT 2.5V TO 26V 3.3V VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 90% VIN = 4V; IOUT = 6.5A; EFFICIENCY = 81%
3120 TA04
Rev. 0For more information www.analog.com 2MHz Wide Input Regulator 500kHz Wide Input Regulator with VCC Boot Strap Option 3.3V APPLICATION EXAMPLES TYPICAL APPLICATIONS 1.5µH 0.22µF 0.22µF 4.7µF 34.8k 10µF 22nF 316k 100k 64.9k 390pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 150µF VIN VOUT 2.5V TO 26V 3.3V VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 86% VIN = 5V; IOUT = 4.5A; EFFICIENCY = 83%
3120 TA05
4.7µH 0.22µF 0.22µF 4.7µF 158k 10µF 220µF 316k 100k 30.1k 3300pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 22nF VOUT 3.3V AT 5A, VIN > 4V 3.3V AT 1A, VIN = 1.6V VIN 1.3V TO 26V STARTS AT 2.5V
3120 TA06
VIN = 1.6V; IOUT = 1A; EFFICIENCY = 85% VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 92% VIN = 4V; IOUT = 5A; EFFICIENCY = 87%
Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS 5V APPLICATION EXAMPLES 500kHz Wide Input Regulator 1MHz Wide Input Regulator 4.7µH 0.22µF 0.22µF 4.7µF 158k 10µF 22nF 536k 102k 46.4k 1800pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 220µF VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 88% VIN = 6V; IOUT = 6.5A; EFFICIENCY = 87%
3120 TA07
2.5V TO 26V VOUT 536k 102k 2.2µH 0.22µF 0.22µF 4.7µF 76.8k 22nF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 150µF 68.1k 680pF 10µF VIN
3120 TA08
VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 85% VIN = 5V; IOUT = 6.5A; EFFICIENCY = 86% VOUT
Rev. 0For more information www.analog.com TYPICAL APPLICATIONS 5V APPLICATION EXAMPLES 2MHz Wide Input Regulator 1MHz Wide Input Regulator with VCC Boot Strap Option 2.2µH 0.22µF 0.22µF 4.7µF 34.8k 10µF 22nF 536k 102k 68.1k 680pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 150µF VIN VOUT 2.5V TO 26V VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 75% VIN = 6V; IOUT = 6.5A; EFFICIENCY = 81%
3120 TA09
2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 22nF 536k 102k 73.2k 1000pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 150µF 250k VIN VOUT 1.5V TO 26V 2.5V TO START
3120 TA10
VIN = 1.6V; IOUT = 1A; EFFICIENCY = 73% VIN = 2.5V; IOUT = 1.25A; EFFICIENCY = 88% VIN = 6V; IOUT = 6.5A; EFFICIENCY = 85%
Rev. 0 For more information www.analog.com 500kHz Wide Input Regulator 1MHz Wide Input Regulator TYPICAL APPLICATIONS 12V APPLICATION EXAMPLES 4.7µH 0.22µF 0.22µF 4.7µF 158k 10µF 100µF 1370k 97.6k 102k 1.2nF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 22nF VIN VOUT 2.5V TO 26V 12V
3120 TA11
VIN = 2.5V; IOUT = 0.5A; EFFICIENCY = 82% VIN = 13V; IOUT = 6.5A; EFFICIENCY = 92% 2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 22nF 1370k 97.6k 143k 390pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 68µF VIN VOUT 2.5V TO 26V 12V VIN = 2.5V; IOUT = 0.5A; EFFICIENCY = 81% VIN = 13V; IOUT = 6.5A; EFFICIENCY = 92%
3120 TA12
1.5µH 0.22µF 0.22µF 4.7µF 34.8k 10µF 22nF 1370k 97.6k 165k 470pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 47µF VIN VOUT 2.5V TO 26V 12V VIN = 2.5V; IOUT = 0.25A; EFFICIENCY = 78% VIN = 13V; IOUT = 5A; EFFICIENCY = 89%
3120 TA13
Rev. 0For more information www.analog.com 1MHz Narrow Input Regulator 1MHz 12V Line Conditioner 1MHz 20V Line Conditioner TYPICAL APPLICATIONS 12V APPLICATION EXAMPLES 2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 47µF 1370k 97.6k 100k 180pF 1210k 200k VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 22nF VIN VOUT 9V TO 15V 12V VIN = 9V; IOUT = 3A; EFFICIENCY = 93% VIN = 13V; IOUT = 6.5A; EFFICIENCY = 91% ENABLE AT VIN > 8.5V
3120 TA14
2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 22nF 1370k 97.6k 59k 1000pF 47µF 1210k 200k VIN VOUT 4.5V to 26V 12V VIN PVIN VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 VIN = 9V; IOUT = 1.25A; EFFICIENCY = 95% VIN = 13V; IOUT = 6.5A; EFFICIENCY = 92%
3120 TA19
2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 22nF 1020k 42.2k 90.9k 470pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 47µF 1.13M 107k VIN VOUT 14V to 26V 20V VIN = 14V; IOUT = 4A; EFFICIENCY = 90% VIN = 21V; IOUT = 6.5A; EFFICIENCY = 92%
3120 TA20
Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS 750kHz, 12V Regulator with Input Supply Run Down 3.3µH 0.22µF 0.22µF 4.7µF 105k 22nF 1370k 97.6k 80k 2200pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 47µF 10µF 1210k 2.8M 249k VIN VOUT 2.5V TO 26V 12V
3120 TA15
ENABLE = 7V DISABLE = 2V 1µF 500kHz 20V Wide Input Regulator 4.7µH 0.22µF 0.22µF 4.7µF 158k 10µF 22nF 1020k 42.2k 162k 1000pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 47µF VIN VOUT 2.5V to 26V 20V VIN = 2.5V; IOUT = 0.25A; EFFICIENCY = 82% VIN = 21V; IOUT = 6.5A; EFFICIENCY = 94%
3120 TA21
Rev. 0For more information www.analog.com 15V, 1MHz Regulator with Output Current Monitoring Selectable 12V or 3.3V Output Regulator TYPICAL APPLICATIONS 2.2µH 0.22µF 0.22µF 4.7µF 76.8k 22nF 1820k 102k 150k 680pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 47µF 5mΩ 1µF 10k 10µF 1000k 1nF (OPTIONAL) VIN 2.5V to 26V VOUT ADC /uni03BCC 100mV/A OUTPUT CURRENT GPIO POWER GOOD INDICATOR 15V
3120 TA16
3.3µH 0.22µF 0.22µF 100µF 500k 4.7µF 10µF 76.8k 60k 1200pF 1400k 442k 127k VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 22nF 634k 200k VIN GPIO GPIO VIN 5V TO 26V VOUT SELECTABLE VOUT SELECT 12V 3.3V BURST PWM VOUT = 3.3V/12V , IOUT = 2A
3120 TA17
VIN = 5V; VOUT = 3.3V; IOUT = 1.25A; EFFICIENCY = 93% VIN = 5V; VOUT = 12V; IOUT = 1.25A; EFFICIENCY = 90% VIN = 13V; VOUT = 12V; IOUT = 6.5A; EFFICIENCY = 91%
Rev. 0 For more information www.analog.com 1MHz, 2.5A Wide Input Lead Acid Charger 3.3µH 0.22µF 0.22µF 10µF 4.7µF 10µF 76.8k 36.5k 2.2nF 2000k 127k NTC 68k 221k VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 16.2k 22nF VIN TEMPERATURE COMPENSATION 6-CELL LEAD-ACID BATTERY 10mΩ 2.5A LIMIT 10µF
3120 TA18
Rev. 0For more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 28-Lead (5mm × 4mm × 0.74mm) (Reference L TC DWG # 05-08-1603 Rev Ø) DETAIL B A PACKAGE TOP VIEW PAD “A1” CORNER Y X aaa Z2× PACKAGE BOTTOM VIEW SEE NOTES E D b e e b D1DETAIL B SUBSTRATE MOLD CAP // bbb Z Z DETAIL A DETAIL C SUGGESTED PCB LAYOUT TOP VIEW 0.0000 0.0000 0.2500 0.2500 0.7500 0.7500 1.2500 1.2500 1.7500 1.7500 1.2500 0.7500 0.2500 0.2500 1.2500 0.7500 PIN 1 NOTCH 0.20 × 45° 23 28 14 9 aaa Z 2× M X Y Z ccc MXY Z ccc 3.65 2.65 0.25 ±0.05 0.70 ±0.05 5.50 ±0.05 4.50 ±0.05 ddd Z 28× 28b e SYMBOL A L b D E e aaa bbb ccc ddd eee fff MIN 0.65 0.01 0.30 0.22 NOM 0.74 0.02 0.40 0.25 4.00 5.00 2.65 3.65 0.50 0.24 0.50 MAX 0.83 0.03 0.50 0.28 0.10 0.10 0.10 0.10 0.15 0.08 DIMENSIONS Z DETAIL C DETAIL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. PRIMARY DATUM -Z- IS SEATING PLANE METAL FEATURES UNDER THE SOLDER MASK OPENING NOT SHOWN SO AS NOT TO OBSCURE THESE TERMINALS AND HEAT FEATURES DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE M X Y Z eee M Zfff L e/2 PACKAGE OUTLINE 0.275 0.275 NOTES SUBSTRATE THK MOLD CAP HT LQFN 28 0118 REV Ø TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1”
Rev. 0 For more information www.analog.com www.analog.com ANALOG DEVICES, INC. 2021 www.analog.com RELATED PARTS TYPICAL APPLICATION 1MHz, 2A LED Output with 15V Clamp Voltage PART NUMBER DESCRIPTION COMMENTS LTC3112 15V, 2.5A Synchronous Buck-Boost VIN = 2.7V to 15V, VOUT = 2.5V to 14V, IQ = 40μA, ISD < 1μA, DFN and TSSOP Packages LTC3122 15V, 2.5A Synchronous Step-Up DC/DC Converter with Output Disconnect VIN = 1.8V to 5.5V, VOUT = 2.2V to 15V, IQ = 25μA, ISD < 1μA, DFN and MSOP Packages LTC3124 15V, 5A 2-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect V IN = 1.8V to 5.5V, VOUT = 2.5V to 15V, IQ = 25μA, ISD < 1μA, DFN and TSSOP Packages LTC3119 18V, 5A Synchronous Buck-Boost VIN = 2.5V to 18V, VOUT = 0.8V to 18V, IQ = 35μA, ISD < 3μA, QFN and TSSOP Packages LTC3115-1/ LTC3115-2 40V, 2A Synchronous Buck-Boost V IN = 2.7V to 40V, VOUT = 2.7V to 40V, IQ = 30μA, ISD < 3μA, DFN and TSSOP Packages LT3942 36V, 2A Synchronous Buck-Boost Converter and LED Driver V IN = 3V to 36V, VOUT = 0V to 36V, 4mm × 5mm QFN-28 Package LT8390/ LT8390A High Efficiency, 2MHz, Synchronous, 4-Switch Buck-Boost Controller V IN = 4V to 60V, ISD ≤ 1µA, TSSOP-28E and 4mm × 5mm QFN-28 Packages 2.2µH 0.22µF 0.22µF 4.7µF 76.8k 10µF 22nF 1780k 100k 63.4k 1800pF VIN PVIN SYNC/MODE VCC ISP GND VC FB PVOUT SW1 SW2 BST1 BST2 RT PGOOD EN/UVLO PROG MPPC BST3 ISN L T3120 1µF 909k 102k 10mΩ 47µF 20k VIN 12V TO 26V 2A/15V CLAMPED ON OFF