LT1940LEFE

LT1940LEFE LINEAR_DIMENSIONS | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 20

Technical content

FEATURES

n Wall Transformer Regulation n Distributed Power Regulation n DSL Modems n Cable Modems n Wide Input Voltage Range LT1940: 3.6V to 25V LT1940L: 3.6V to 7V n Two 1.4A Output Switching Regulators with Internal Power Switches n Constant 1.1MHz Switching Frequency n Anti-Phase Switching Reduces Ripple n Independent Shutdown/Soft-Start Pins n Independent Power Good Indicators Ease Supply Sequencing n Uses Small Inductors and Ceramic Capacitors n Small 16-Lead Thermally Enhanced TSSOP Surface Mount Package Dual Monolithic 1.4A, 1.1MHz Step-Down Switching Regulator The LT 1940 is a dual current mode PWM step-down DC/DC converter with internal 2A power switches. Both con- verters are synchronized to a single 1.1MHz oscillator and run with opposite phases, reducing input ripple current. The output voltages are set with external resistor dividers, and each regulator has independent shutdown and soft-start circuits. Each regulator generates a power-good signal when its output is in regulation, easing power supply se- quencing and interfacing with microcontrollers and DSPs. The LT1940’s 1.1MHz switching frequency allows the use of tiny inductors and capacitors, resulting in a very small dual 1.4A output solution. Constant frequency and ceramic capacitors combine to produce low, predictable output ripple voltage. With its wide input range of 3.6V to 25V, the LT1940 regulates a wide variety of power sources, from 4-cell batteries and 5V logic rails to unregulated wall trans- formers, lead acid batteries and distributed-power supplies. The LT1940L is intended to operate from regulated 5V supplies. A current mode PWM architecture provides fast transient response with simple compensation components and cycle-by-cycle current limiting. Frequency foldback and thermal shutdown provide additional protection. , LTC and LT are registered trademarks of Linear Technology Corporation. Figure 1. 3.3V and 5V Dual Output Step-Down Converter with Output Sequencing (LT1940)

1940 F01

1940 F01b

Operating Temperature Range (Note 2) ...–40°C to 85°C ORDER PART NUMBER TJMAX = 125°C, qJA = 45°C/W, qJC = 10°C/W LT1940EFE LT1940LEFE ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W (Note 1) ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBOOST = 8V unless otherwise noted. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Operating Voltage l 3.4 3.6 V Quiescent Current Not Switching 3.8 4.8 mA Shutdown Current V RUNSS = 0V 30 45 mA Feedback Voltage 1.230 1.250 1.270 V 0°C to 70°C l 1.225 1.250 1.270 V –40°C to 85°C l 1.215 1.250 1.270 V FB Pin Bias Current V FB = 1.25V, VC = 0.4V l 240 1200 nA Reference Line Regulation LT1940: V IN 5V to 25V 0.005 %/V LT1940L: VIN 4V to 7V 0.005 %/V Error Amp GM 330 uMhos Error Amp Voltage Gain 180 VC Source Current V FB = 1V 42 mA VC Sink Current V FB = 1.5V 60 mA VC Pin to Switch Current Gain 2.4 A/V VC Switching Threshold 0.75 V VC Clamp Voltage 1.8 V Switching Frequency V FB = 1.1V 1 1.1 1.25 MHz l 0.95 1.1 1.35 MHz Switching Phase 150 180 210 Deg Maximum Duty Cycle l 78 88 % Frequency Shift Threshold on FB f SW = 1MHz 0.5 V Consult LTC Marketing for parts specified with wider operating temperature ranges. FE PACKAGE 16-LEAD PLASTIC TSSOP EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO PCB TOP VIEW BOOST1 SW1 V IN VIN VIN VIN SW2 BOOST2 FB1 VC1 PG1 RUN/SS1 RUN/SS2 PG2 V FB2 FE PART MARKING 1940EFE 1940LEFE

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1940E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBOOST = 8V unless otherwise noted. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Foldback Frequency V FB = 0V 150 kHz Switch Current Limit Note 3 1.8 2.4 3.2 A Switch VCESAT ISW = 1A 210 320 mV Switch Leakage Current 10 mA Minimum Boost Voltage Above Switch (Note 4) I SW = 1A 1.8 2.5 V BOOST Pin Current I SW = 1A 20 30 mA RUN/SS Current 2.3 mA RUN/SS Threshold 0.3 0.6 V PG Threshold Offset V FB Rising 90 125 160 mV PG Voltage Output Low V FB = 1V, IPG = 250mA 0.22 0.4 V PG Pin Leakage V PG = 2V 0.1 1 mA Note 3: Current limit is guaranteed by design and/or correlation to static test. Slope compensation reduces current limit at high duty cycle. Note 4: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. TYPICAL PERFOR A CE CHARACTERISTICSUW Efficiency, VOUT = 3.3V Efficiency, VOUT = 5V LOAD CURRENT (A) EFFICIENCY (%) 0.5 1.0

1940 G01

1.5 VOUT = 1.8V L = 2.2µH (SUMIDA CR43-2R2) TA = 25°C VIN = 5V LOAD CURRENT (A) EFFICIENCY (%) 100 0.5 1.0

1940 G02

1.5 VOUT = 3.3V L = 3.3µH (SUMIDA CR43-3R3) TA = 25°C VIN = 5V VIN = 18V VIN = 12V LOAD CURRENT (A) EFFICIENCY (%) 100 0.5 1.0

1940 G03

1.5 VOUT = 5V L = 4.7µH (SUMIDA CR43-4R7) TA = 25°C VIN = 8V VIN = 18V VIN = 12V Efficiency, VOUT = 1.8V

Current Limit vs Duty Cycle VOUT vs Temperature Frequency Foldback IRUN/SS vs Temperature TYPICAL PERFOR A CE CHARACTERISTICSUW DUTY CYCLE (%) CURRENT LIMIT (A) TYPICAL

1940 G08

3.0 2.5 2.0 1.5 1.0 0.5 MINIMUM –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) VOUT (V)

1940 G09

3.40 3.35 3.30 3.25 3.20 CHANNEL 1, FIGURE 1, VIN = 12V SWITCH CURRENT (A) BOOST CURRENT (mA) 2.0

1940 G07

0.5 1.0 1.5 Frequency vs Temperature Boost Pin Current TEMPERATURE (°C) –50 FREQUENCY (MHz) 1.3 1.2 1.1 1.0 0.9 –25 0 25 50

1940 G10

FEEDBACK VOLTAGE (V) SWITCHING FREQUENCY (MHz) 1.4 1.2 1.0 0.8 0.6 0.4 0.2

1940 G11

TEMPERATURE (°C) –50 RUN/SS CURRENT (µA) 0.5 1.0 1.5 2.0 3.0 –25 02 5 5 0

1940 G12

2.5 Maximum Load Current, VOUT = 1.8V Switch VCESAT Maximum Load Current, VOUT = 3.3V SW CURRENT (A) SWITCH VOLTAGE (mV) 200 300 2.0

1940 G06

0.5 1.0 1.5 400 TA = 25°C INPUT VOLTAGE (V)* LOAD CURRENT (A) 1.4 1.6 12 14

1940 G04

1.2 1.0 842 6 10 16 1.8 L = 2.2µH L = 1.5µH L = 1µH INPUT VOLTAGE (V)* LOAD CURRENT (A) 1.4 1.6

1940 G05

1.2 1.0 5 10 15 25 1.8 L = 4.7µH L = 3.3µH L = 2.2µH SLOPE COMPENSATION REQUIRES L > 2.2µH FOR VIN < 7 WITH VOUT = 3.3V *Maximum VIN is 7V for LT1940L.

BOOST1, BOOST2 (Pins 1, 8): The BOOST pins are used to provide drive voltages, higher than the input voltage, to the internal bipolar NPN power switches.Tie through a diode from V OUT or from VIN. SW1, SW2 (Pins 2, 7): The SW pins are the outputs of the internal power switches. Connect these pins to the induc- tors, catch diodes and boost capacitors. V IN (Pins 3, 4, 5, 6): The VIN pins supply current to the LT1940’s internal regulator and to the internal power switches. These pins must be tied to the same source, and must be locally bypassed. FB1, FB2 (Pins 9, 16): The LT1940 regulates each feed- back pin to 1.25V. Connect the feedback resistor divider taps to these pins. V C1, VC2 (Pins 10, 15): The VC pins are the outputs of the internal error amps. The voltages on these pins control the peak switch currents. These pins are normally used to compensate the control loops, but can also be used to override the loops. Pull these pins to ground with an open drain to shut down each switching regulator. PG1, PG2 (Pins 11, 14): The Power Good pins are the open collector outputs of an internal comparator. PG remains low until the FB pin is within 10% of the final regulation voltage. As well as indicating output regulation, the PG pins can be used to sequence the two switching regulators. These pins can be left unconnected. The PG outputs are valid when V IN is greater than 2.4V and either of the RUN/SS pins is high. The PG comparators are disabled in shutdown. RUN/SS1, RUN/SS2 (Pins 12, 13): The RUN/SS pins are use to shut down the individual switching regulators and the internal bias circuits. They also provide a soft-start function. To shut down either regulator, pull the RUN/SS pin to ground with an open drain or collector. Tie a capacitor from these pins to ground to limit switch current during start-up. If neither feature is used, leave these pins unconnected. GND (Pin 17): The Exposed Pad of the package provides both electrical contact to ground and good thermal con- tact to the printed circuit board. The Exposed Pad must be soldered to the circuit board for proper operation. RUN/SS Thresholds vs Temperature 1.4 1.2 1.0 0.8 0.6 0.4 0.2 RUNN/SS THRESHOLDS (V) TEMPERATURE (°C) –50 25 75

1940 G13

–25 0 50 100 125 TO SWITCH TO RUN LOAD CURRENT (mA) MINIMUM INPUT VOLTAGE (V) 6.0 5.5 5.0 4.5 4.0 3.5 3.0 10 100 1000

1940 G14

TA = 25°C DBOOST = BAT54 LOAD CURRENT (mA) MINIMUM INPUT VOLTAGE (V) 7.5 7.0 6.5 6.0 5.5 5.0 4.5 10 100 1000 TA = 25°C DBOOST = BAT54 BOOST DIODE TIED TO INPUT Minimum Input Voltage, VOUT = 3.3V Minimum Input Voltage, VOUT = 5V TYPICAL PERFOR A CE CHARACTERISTICSUW

LT1940; refer to the Block Diagram.

1940 F02

will begin to operate until its RUN/SS pin reaches ~0.8V. Figure 2. Block Diagram of the LT1940 with Associated External Components (One of Two Switching Regulators Shown)

Each switcher contains an independent oscillator. This slave oscillator is normally synchronized to the master oscillator. However, during start-up, short-circuit or over- load conditions, the FB pin voltage will be near zero and an internal comparator gates the master oscillator clock signal. This allows the slave oscillator to run the regulator at a lower frequency. This frequency foldback behavior helps to limit switch current and power dissipation under fault conditions. The switch driver operates from either the input or from the BOOST pin. An external capacitor and diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to fully saturate the internal bipolar NPN power switch for efficient operation. A power good comparator trips when the FB pin is at 90% of its regulated value. The PG output is an open collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. Power good is valid when the LT1940 is enabled (either RUN/SS pin is high) and V IN is greater than ~2.4V. duty cycle of the power switch, the feedback loop controls the peak current in the switch during each cycle. This current mode control improves loop dynamics and pro- vides cycle-by-cycle current limit. The Block Diagram shows only one of the two switching regulators. A pulse from the slave oscillator sets the RS flip-flop and turns on the internal NPN bipolar power switch. Current in the switch and the external inductor begins to increase. When this current exceeds a level determined by the voltage at V C, current comparator C1 resets the flip-flop, turning off the switch. The current in the inductor flows through the external Schottky diode, and begins to decrease. The cycle begins again at the next pulse from the oscillator. In this way the voltage on the V C pin controls the current through the inductor to the output. The internal error amplifier regulates the output voltage by continually adjusting the VC pin voltage. The threshold for switching on the VC pin is 0.75V, and an active clamp of 1.8V limits the output current. The VC pin is also clamped to the RUN/SS pin voltage. As the internal current source charges the external soft-start capacitor, the current limit increases slowly. APPLICATIO S I FOR ATIOWU UU FB Resistor Network The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the 1% resistors according to: R1 = R2(VOUT/1.25 – 1) R2 should be 10.0kW or less to avoid bias current errors. Reference designators refer to the Block Diagram in Figure␣ 2. Input Voltage Range The minimum input voltage is determined by either the LT1940’s minimum operating voltage of ~3.5V, or by its maximum duty cycle. The duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: DC = (V OUT + VD)/(VIN – VSW + VD) where VD is the forward voltage drop of the catch diode (~0.4V) and VSW is the voltage drop of the internal switch (~0.3V at maximum load). This leads to a minimum input voltage of: V INMIN = (VOUT + VD)/DCMAX - VD + VSW with DCMAX = 0.78. A more detailed analysis includes inductor loss and the dependence of the diode and switch drop on operating current. A common application where the maximum duty cycle limits the input voltage range is the conversion of 5V to 3.3V. The maximum load current that the LT1940 can deliver at 3.3V depends on the accuracy of the 5V input supply. With a low loss inductor (DCR less than 80mW ), the LT1940 can deliver 1A for V IN > 4.7V and 1.4A for VIN > 4.85V.

APPLICATIO S I FOR ATIOWU UU (VOUT/VIN < 0.5), there is a minimum inductance required to avoid subharmonic oscillations. See AN19. The discus- sion below assumes continuous inductor current. The current in the inductor is a triangle wave with an average value equal to the load current. The peak switch current is equal to the output current plus half the peak-to- peak inductor ripple current. The LT1940 limits its switch current in order to protect itself and the system from overload faults. Therefore, the maximum output current that the LT1940 will deliver depends on the current limit, the inductor value, and the input and output voltages. L is chosen based on output current requirements, output voltage ripple requirements, size restrictions and effi- ciency goals. When the switch is off, the inductor sees the output voltage plus the catch diode drop. This gives the peak-to- peak ripple current in the inductor: DI L = (1 – DC)(VOUT + VD)/(L • f) where f is the switching frequency of the LT1940 and L is the value of the inductor. The peak inductor and switch current is ISWPK = ILPK = IOUT + DIL/2. To maintain output regulation, this peak current must be less than the LT1940’s switch current limit ILIM. ILIM is at least 1.8A at low duty cycle and decreases linearly to 1.5A at DC = 0.8. The maximum output current is a function of the chosen inductor value: I OUTMAX = ILIM – DIL/2 = 1.8A • (1 – 0.21 • DC) – DIL/2 If the inductor value is chosen so that the ripple current is small, then the available output current will be near the switch current limit. One approach to choosing the inductor is to start with the simple rule given above, look at the available inductors, and choose one to meet cost or space goals. Then use these equations to check that the LT1940 will be able to deliver the required output current. Note again that these equations assume that the inductor current is continuous. Discontinuous operation occurs when I OUT is less than DIL/2 as calculated above. The maximum input voltage is determined by the absolute maximum ratings of the VIN and BOOST pins and by the minimum duty cycle DCMIN = 0.15: VINMAX = (VOUT + VD)/DCMIN – VD + VSW. This limits the maximum input voltage to ~14V with VOUT = 1.8V and ~19V with VOUT = 2.5V. Note that this is a restriction on the operating input voltage; the circuit will tolerate transient inputs up to the absolute maximum rating. For the LT1940L, the maximum input voltage is 7V. Inductor Selection and Maximum Output Current A good first choice for the inductor value is: L = (V OUT + VD)/1.2 where VD is the voltage drop of the catch diode (~0.4V) and L is in mH. With this value the maximum load current will be ~1.4A, independent of input voltage. The inductor’s RMS current rating must be greater than your maximum load current and its saturation current should be about 30% higher. To keep efficiency high, the series resistance (DCR) should be less than 0.1 W . Table 1 lists several vendors and types that are suitable. Of course, such a simple design guide will not always result in the optimum inductor for your application. A larger value provides a slightly higher maximum load current, and will reduce the output voltage ripple. If your load is lower than 1.4A, then you can decrease the value of the inductor and operate with higher ripple current. This allows you to use a physically smaller inductor, or one with a lower DCR resulting in higher efficiency. Be aware that if the inductance differs from the simple rule above, then the maximum load current will depend on input voltage. There are several graphs in the Typical Performance Character- istics section of this data sheet that show the maximum load current as a function of input voltage and inductor value for several popular output voltages. Also, low inductance may result in discontinuous mode operation, which is okay, but further reduces maximum load current. For details of maximum output current and discontinuous mode operation, see Linear Technology Application Note 44. Finally, for duty cycles greater than 50%

the input capacitor considerations in more detail. switching current into a tight local loop, minimizing EMI. current will always be less than 0.7A. sourced from the local input capacitor. Table 1. Inductors.

is likely to see high surge currents when the input source is applied, tantalum capacitors should be surge rated. The manufacturer may also recommend operation below the rated voltage of the capacitor. Be sure to place the 1 mF ceramic as close as possible to the VIN and GND pins on the IC for optimal noise immunity. A final caution is in order regarding the use of ceramic capacitors at the input. A ceramic input capacitor can combine with stray inductance to form a resonant tank circuit. If power is applied quickly (for example by plug- ging the circuit into a live power source) this tank can ring, doubling the input voltage and damaging the LT1940. The solution is to either clamp the input voltage or dampen the tank circuit by adding a lossy capacitor in parallel with the ceramic capacitor. For details, see AN88. Output Capacitor Selection For 5V and 3.3V outputs with greater than 1A output, a 10mF 6.3V ceramic capacitor (X5R or X7R) at the output results in very low output voltage ripple and good transient response. For lower voltages, 10 mF is adequate but in- creasing C OUT to 15 mF or 22 mF will improve transient performance. Other types and values can be used; the following discusses tradeoffs in output ripple and tran- sient performance. The output capacitor filters the inductor current to gener- ate an output with low voltage ripple. It also stores energy in order satisfy transient loads and to stabilize the LT1940’s control loop. Because the LT1940 operates at a high frequency, you don’t need much output capacitance. Also, the current mode control loop doesn’t require the pres- ence of output capacitor series resistance (ESR). For these reasons, you are free to use ceramic capacitors to achieve very low output ripple and small circuit size. Estimate output ripple with the following equations: V RIPPLE = DIL/(8f COUT) for ceramic capacitors, and VRIPPLE = DIL ESR for electrolytic capacitors (tantalum and aluminum); where DIL is the peak-to-peak ripple current in the induc- tor. The RMS content of this ripple is very low, and the RMS current rating of the output capacitor is usually not of concern. Another constraint on the output capacitor is that it must have greater energy storage than the inductor; if the stored energy in the inductor is transferred to the output, you would like the resulting voltage step to be small compared to the regulation voltage. For a 5% overshoot, this require- ment becomes C OUT > 10L(ILIM/VOUT)^2. Finally, there must be enough capacitance for good tran- sient performance. The last equation gives a good starting point. Alternatively, you can start with one of the designs in this data sheet and experiment to get the desired performance. This topic is covered more thoroughly in the section on loop compensation. The high performance (low ESR), small size and robust- ness of ceramic capacitors make them the preferred type for LT1940 applications. However, all ceramic capacitors are not the same. As mentioned above, many of the higher value capacitors use poor dielectrics with high tempera- ture and voltage coefficients. In particular, Y5V and Z5U types lose a large fraction of their capacitance with applied voltage and temperature extremes. Because the loop stability and transient response depend on the value of C OUT, you may not be able to tolerate this loss. Use X7R and X5R types. You can also use electrolytic capacitors. The ESRs of most aluminum electrolytics are too large to deliver low output ripple. Tantalum and newer, lower ESR organic electro- lytic capacitors intended for power supply use are suit- able, and the manufacturers will specify the ESR. The choice of capacitor value will be based on the ESR required for low ripple. Because the volume of the capacitor deter- mines its ESR, both the size and the value will be larger than a ceramic capacitor that would give you similar ripple performance. One benefit is that the larger capacitance may give better transient response for large changes in load current. Table 2 lists several capacitor vendors. APPLICATIO S I FOR ATIOWU UU

Table 2. Low-ESR Surface Mount Capacitors Absolute Maximum Ratings section. Figure 3. Generating the Boost Voltage

1940 F03

BAT-54) for the lowest start-up voltage. test the stability using a transient load. output current proportional to the voltage at the V C pin. amplifier output current, resulting in two poles in the loop. output capacitor ESR or from a resistor in series with CC. Figure 4. Model for Loop Response

1940 F05

The RUN/SS (Run/Soft-Start) pins are used to place the individual switching regulators and the internal bias cir- cuits in shutdown mode. They also provide a soft-start function. To shut down either regulator, pull the RUN/SS pin to ground with an open-drain or collector. If both RUN/SS pins are pulled to ground, the LT1940 enters its shutdown mode with both regulators off and quiescent current reduced to ~30mA. Internal 2mA current sources pull up on each pin. If either pin reaches ~0.5V, the internal bias circuits start and the quiescent current increases to ~3.5mA. If a capacitor is tied from the RUN/SS pin to ground, then the internal pull-up current will generate a voltage ramp on this pin. This voltage clamps the V C pin, limiting the peak switch current and therefore input current during start up. A good value for the soft-start capacitor is COUT/10,000, where COUT is the value of the output capacitor. The RUN/SS pins can be left floating if the shutdown feature is not used. They can also be tied together with a single capacitor providing soft-start. The internal current sources will charge these pins to ~2.5V. The RUN/SS pins provide a soft-start function that limits peak input current to the circuit during start-up. This helps to avoid drawing more current than the input source can supply or glitching the input supply when the LT1940 is enabled. The RUN/SS pins do not provide an accurate delay to start or an accurately controlled ramp at the output voltage, both of which depend on the output capacitance and the load current. However, the power good indicators can be used to sequence the two outputs, as described below. Power Good Indicators The PG pin is the open collector output of an internal comparator. PG remains low until the FB pin is within 10% of the final regulation voltage. Tie the PG pin to any supply with a pull-up resistor that will supply less than 250 mA. Note that this pin will be open when the LT1940 is placed in shutdown mode (both RUN/SS pins at ground) regard- less of the voltage at the FB pin. Power good is valid when the LT1940 is enabled (either RUN/SS pin is high) and V IN is greater than ~2.4V. Output Sequencing The PG and RUN/SS pins can be used to sequence the two outputs. Figure 5 shows several circuits to do this. In each case channel 1 starts first. Note that these circuits se- quence the outputs during start-up. When shut down the two channels turn off simultaneously. In Figure 5a, a larger capacitor on RUN/SS2 delays chan- nel 2 with respect to channel 1. The soft-start capacitor on RUN/SS2 should be at least twice the value of the capacitor on RUN/SS1. A larger ratio may be required, depending on the output capacitance and load on each channel. Make sure to test the circuit in the system before deciding on final values for these capacitors. The circuit in Figure 5b requires the fewest components, with both channels sharing a single soft-start capacitor. The power good comparator of channel 1 disables channel 2 until output 1 is in regulation. For independent control of channel 2, use the circuit in Figure 5c. The capacitor on RUN/SS1 is smaller than the capacitor on RUN/SS2. This allows the LT1940 to start up and enable its power good comparator before RUN/SS2 gets high enough to allow channel 2 to start switching. Channel 2 only operates when it is enabled with the external control signals and output 1 is in regulation. The circuit in Figure 5a leaves both power good indicates free. However, the circuits in Figures 5b and 5c have another advantage. As well as sequencing the two outputs at start-up, they also disable channel 2 if output 1 falls out of regulation (due to a short circuit or a collapsing input voltage). Finally, be aware that the circuit in Figure 5d does not work, because the power good comparators are disabled in shutdown. When the system is placed in shutdown mode by pulling down on RUN/SS1, then output 1 will go low, PG1 will pull down on RUN/SS2, and the LT1940 will enter its low current shutdown state. This disables PG1, and RUN/SS2 ramps up again to enable the LT1940. The circuit will oscillate and pull extra current from the input. APPLICATIO S I FOR ATIOWU UU

will be held high when the input to the LT1940 is absent. LT1940 and the system from a shorted or reversed input. Figure 5. Several Methods of Sequencing the Two Outputs. Channel 1 Starts First. Figure 6. Diode D4 Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. shows the high-di/dt paths in the buck regulator circuit.

1940 F06

LT1940. Place additional vias near the catch diodes. Thermal Considerations section. Figure 8. A Good PCB Layout Ensures Proper Low EMI Operation Figure 7. Subtracting the Current when the Switch is ON (a) From the Current when the Switch is OFF (b) Reveals the Path Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane.

1940 F07

switches enough current to get its boost capacitor charged. ated from either SW pin that will service both BOOST pins. in the Typical Applications section shows how to do this. VOUT2 high when there is no load current. supply using a buck regulator. Figure 9. This circuit can be used when VOUT1 is greater than 1.25V and VOUT2 is less than 1.25V.

1940 F09

5V/3.3V with Tantalum Output Capacitors VIN 7V TO 25V BOOST1 SW1 FB1 V PG1 RUN/SS1 BOOST2 SW2 FB2 V PG2 RUN/SS2 LT1940 VIN GND

1940 TA03

47µF 10V 100µF 6.3V 4.7µF 0.1µF 0.1 µF 20k 220pF 10.0k 10.0k 16.5k 100k 30.1k 100k 4.7µH 3.3µH

5 GOOD3V3

1.2A OUT1 3.3V 1.2A 10.0k 1nF 1nF D1, D2: MICROSEMI UPS140 OR ON SEMI MBRM140 D3, D4: CENTRAL CMDSH-3 L1: SUMIDA CDRH4D28-3R3 L2: SUMIDA CDRH4D28-4R7 C1: AVX TPSC107M010R0150 C2: AVX TPSC476M010R0350 C3: TAIYO YUDEN TMK325BJ475ML TYPICAL APPLICATIO SU VIN 4.7V TO 14V

1940 TA01

10µF 22µF 4.7µF 0.1µF 0.1 µF 15k 220pF 20k 10.0k 10.0k 100k 16.5k 3.3µH 2.2µH POWER GOOD OUT2 3.3V (1.4A FOR V IN > 5V) OUT1 1.8V 1.4A 22.6k 1nF D1, D2: MICROSEMI UPS120 D3, D4: CENTRAL CMDSH-3 L1: SUMIDA CR43-2R2 L2: SUMIDA CR43-3R3 C1: TAIYO YUDEN JMK316BJ226ML C2: TAIYO YUDEN JMK316BJ106ML C3: TAIYO YUDEN EMK316BJ475ML BOOST1 SW1 FB1 V RUN/SS1 RUN/SS2 BOOST2 SW2 FB2 V PG1 PG2 LT1940 V IN GND 3.3V and 1.8V Outputs with Sequencing Start-Up Waveforms VIN 2V/DIV VOUT1 2V/DIV VOUT2 2V/DIV POWER GOOD 2V/DIV 50µs/DIV

1940 TA01b

3.3V, –5V Low Ripple, Low Profile 12V to 3.3V/2.4A Maximum Height = 2.1mm VIN 10V TO 25V BOOST1 SW1 FB1 V PG1 RUN/SS1 BOOST2 SW2 FB2 V PG2 RUN/SS2 LT1940 VIN GND

1940 TA05

10µF 10µF 10µF 4.7µF 0.1µF 0.1 µF 1µF 20k 330pF 15k 10.0k 16.5k 30.1k 100k 4.7µH 3.3µH PGOOD OUT2 600mA OUT3 –5V 300mA OUT1 3.3V 1.4A 10.0k D3A 1nF 2.2nF D3B D5 47k –5V LOAD SHOULD BE LESS THAN 1/2 5V LOAD (SEE DESIGN NOTE 100). C1, C2, C4: TAIYO YUDEN JMK316BJ106ML C3: TAIYO YUDEN TMK325BJ475ML D1, D2: MICROSEMI UPS140 OR ON SEMI MBRM140 D3: BAT-54A D5: ON SEMI MBR0530 L1: SUMIDA CR43-3R3 L2: COILTRONICS CTX5-1A TYPICAL APPLICATIO SU VIN 6V TO 16V RUN/SS1 RUN/SS2 PG1 PG2 V VC2 FB1 FB2 BOOST1 SW1 BOOST2 SW2 LT1940 V IN GND C1 22µF 4.7µF 0.1µF 0.1µF 6.8k 16.5k 100k 4.1µH 4.1µH OUT2 3.3V 2.4A D3B D3A 10.0k 680pF 330pF 1nF D1, D2: MICROSEMI UPS120 D3: BAT-54A L1, L2: SUMIDA CDRH5D18-4R1 C1: TAIYO YUDEN JMK316BJ226ML C3: TAIYO YUDEN EMK325BJ475MN PGOOD

1940 TA06

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. TYPICAL APPLICATIO SU 19V REGULATED INPUT BOOST2 SW2 FB2 V PG2 RUN/SS2 BOOST1 SW1 FB1 V PG1 RUN/SS1 LT1940 VIN GND

1940 TA08

4.7µF 0.1µF 0.1 µF 20k 1.5nF 10k 10.7k 30.1k 100k 15µH 4.7µH –5V 3mA 25V 3mA 1.2A 10k 1nF 1nF D4A D4B D5B D622µF 0.022µF 10µF10µF 1µF D1, D2: ON SEMI MBRM140T3 D3: CENTRAL CMPD914 D4, D5: BAT-54S 220pF220pF 1µF 22Ω 22Ω 22Ω C10 1µF 13V 300mA D5A D6, D7: 6.2V ZENER L1: SUMIDA CDRH4D28-4R7 L2: SUMIDA CDRH5D28-150 TFT LCD Supply 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BA FE16 (BA) TSSOP 0203 0.09 – 0.20 (.0036 – .0079) 0° – 8° 0.45 – 0.75 (.018 – .030) 4.30 – 4.50* (.169 – .177) 6.40 BSC 13 4 5 6 7 8 10 9 4.90 – 5.10* (.193 – .201) 16 1514 13 12 11 1.10 (.0433) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 2.74 (.108) 2.74 (.108) 0.195 – 0.30 (.0077 – .0118) MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN RECOMMENDED SOLDER PAD LAYOUT 3. DRAWING NOT TO SCALE 0.45 –0.05

0.65 BSC

4.50 –0.10 6.60 –0.10 1.05 –0.10 2.74 (.108) 2.74 (.108) SEE NOTE 4 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com ª LINEAR TECHNOLOGY CORPORATION 2001 LT/TP 0204 1K REV A • PRINTED IN USA RELATED PARTS TYPICAL APPLICATIO U PART NUMBER DESCRIPTION COMMENTS LT1765 25V, 2.75A (I OUT), 1.25MHz, V IN: 3V to 25V, VOUT(MIN): 1.20V, IQ: 1mA, ISD: 15mA High Efficiency Step-Down DC/DC Converter S8, TSSOP16E Package LT1766 60V, 1.2A (I OUT), 200kHz, V IN: 5.5V to 60V, VOUT(MIN): 1.2V, IQ: 2.5mA, ISD: 25mA High Efficiency Step-Down DC/DC Converter TSSOP16/TSSOP16E Package LT1767 25V, 1.2A (I OUT), 1.25MHz, V IN: 3V to 25V, VOUT(MIN): 1.2V, IQ: 1mA, ISD: 6mA High Efficiency Step-Down DC/DC Converter MS8, MS8E Package LT1944 Dual Output 350mA I SW, Constant Off-Time, V IN: 1.2V to 15V, VOUT(MAX): 34V, IQ: 20mA, ISD: <1mA, High Efficiency Step-Up DC/DC Converter MS Package LT1944-1 Dual Output 150mA I SW, Constant Off-Time, V IN: 1.2V to 15V, VOUT(MAX): 34V, IQ: 20mA, ISD: <1mA, High Efficiency Step-Up DC/DC Converter MS Package LT1945 Dual Output, Pos/Neg, 350mA I SW, Constant Off-Time, V IN: 1.2V to 15V, VOUT(MAX): –34V, IQ: 20mA, ISD: <1mA, High Efficiency Step-Up DC/DC Converter MS Package Package LT1956 60V, 1.2A (I OUT), 500kHz, V IN: 5.5V to 60V, VOUT(MIN): 1.2V, IQ: 2.5mA, ISD: 25mA High Efficiency Step-Down DC/DC Converter TSSOP16/TSSOP16E Package LTC3407 Dual 600mA, 1.5MHz, Synchronous Step-Down Regulator V IN: 2.5V to 5.5V, VOUT(MIN): 0.6V, IQ: 40mA, MSE Package LTC3411 1.25A (I OUT), 4MHz, V IN: 2.5V to 5.5V, VOUT(MIN): 0.8V, IQ: 60mA, ISD: <1mA Synchronous Step-Down DC/DC Converter MS Package LTC3412 2.5A (I OUT), 4MHz, V IN: 2.5V to 5.5V, VOUT(MIN): 0.8V, IQ: 60mA, ISD: <1mA Synchronous Step-Down DC/DC Converter TSSOP16E Package LT3430 60V, 2.75A (I OUT), 200kHz, V IN: 5.5V to 60V, VOUT(MIN): 1.20V, IQ: 2.5mA, ISD: 25mA High Efficiency Step-Down DC/DC Converter TSSOP16E Package LTC3701 Two Phase,Dual, 500kHz, Constant Frequency, V IN: 2.5V to 10V, VOUT(MIN): 0.8V, IQ: 460mA, ISD: 9mA Current Mode, High Efficiency Step-Down SSOP-16 Package DC/DC Controller Low Ripple, Low Profile 5V to 3.3V/2.4A Maximum Height = 1.4mm VIN 4.8V TO 7V RUN/SS1 RUN/SS2 PG1 PG2 V VC2 FB1 FB2 BOOST1 SW1 BOOST2 SW2 LT1940L V IN GND C1 20µF 2.2µF 0.1µF 0.1µF 4.7k 16.5k 100k 3.3µH 3.3µH OUT2 3.3V 2.4A D4A D3A D4B D3B 10k 1500pF 330pF 1nF 0.47µF D1, D2: MICROSEMI UPS120 D3, D4: BAT-54S L1, L2: COILCRAFT LPO1704-332M PGOOD

1940 TA07

C1: 2X TAIYO YUDEN JMK212BJ106ML C3: 2X TAIYO YUDEN EMK212BJ105MN