LT1812

LT1812 LINER | Alldatasheet

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Technical content

3mA, 100MHz, 750V/ms Operational Amplifier with Shutdown n 100MHz Gain Bandwidth n 750V/ms Slew Rate n 3.6mA Maximum Supply Current n 50mA Supply Current in Shutdown n 8nV/ÖHz Input Noise Voltage n Unity-Gain Stable n 1.5mV Maximum Input Offset Voltage n 4mA Maximum Input Bias Current n 400nA Maximum Input Offset Current n 40mA Minimum Output Current, VOUT = –3V n –3.5V Minimum Input CMR, VS = –5V n 30ns Settling Time to 0.1%, 5V Step n Specified at –5V, Single 5V Supplies n Operating Temperature Range: – 40°C to 85°C n Wideband Amplifiers n Buffers n Active Filters n Video and RF Amplification n Cable Drivers n Data Acquisition Systems The LT 1812 is a low power, high speed, very high slew rate operational amplifier with excellent DC performance. The LT1812 features reduced supply current, lower input offset voltage, lower input bias current and higher DC gain than other devices with comparable bandwidth. A power saving shutdown feature reduces supply current to 50mA. The circuit topology is a voltage feedback amplifier with the slewing characteristics of a current feedback amplifier. The output drives a 100W load to –3.5V with –5V supplies. On a single 5V supply, the output swings from 1.1V to 3.9V with a 100W load connected to 2.5V. The amplifier is stable with a 1000pF capacitive load which makes it useful in buffer and cable driver applications. The LT1812 is manufactured on Linear Technology’s advanced low voltage complementary bipolar process. The dual version is the LT1813. For higher supply voltage single, dual and quad operational amplifiers with up to 70MHz gain bandwidth, see the LT1351 through LT1365 data sheets. 4MHz, 4th Order Butterworth Filter Filter Frequency Response FREQUENCY (MHz) 0.1 –50VOLTAGE GAIN (dB) –40 –30 –20 –10 1 10 100

1812 TA02

–60 –70 –80 –90 VS = –5V VIN = 600mVP-P PEAKING < 0.12dB LT1812220pF VIN 665Ω 232Ω 47pF232Ω LT1812470pF

1812 TA01

562Ω 274Ω 22pF274Ω , LTC and LT are registered trademarks of Linear Technology Corporation.

FEATURES

(Note 1) Differential Input Voltage (Transient Only, Note 2) ... –3V Operating Temperature Range (Note 8) ... – 40°C to 85°C Specified Temperature Range Consult factory for Military grade parts. TJMAX = 150°C, qJA = 80°C/ W (NOTE 9) ORDER PART NUMBER LT1812CS8 LT1812IS8 S8 PART MARKING 1812 1812I SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage (Note 4) 0.4 1.5 mV IOS Input Offset Current 30 400 nA IB Input Bias Current – 0.9 –4 mA en Input Noise Voltage Density f = 10kHz 8 nV/ ÖHz in Input Noise Current Density f = 10kHz 1 pA/ ÖHz RIN Input Resistance V CM = –3.5V 3 10 M W Differential 1.5 M W CIN Input Capacitance 2p F VCM Input Voltage Range (Positive) 3.5 4.2 V Input Voltage Range (Negative) – 4.2 – 3.5 V CMRR Common Mode Rejection Ratio V CM = –3.5V 75 85 dB Minimum Supply Voltage –1.25 –2V PSRR Power Supply Rejection Ratio V S = – 2V to – 5.5V 78 97 dB AVOL Large-Signal Voltage Gain V OUT = –3V, RL = 500W 1.5 3.0 V/mV VOUT = –3V, RL = 100W 1.0 2.5 V/mV VOUT Maximum Output Swing R L = 500W , 30mV Overdrive –3.80 – 4.0 V RL = 100W , 30mV Overdrive –3.35 – 3.5 V IOUT Maximum Output Current V OUT = –3V, 30mV Overdrive –40 –60 mA ISC Output Short-Circuit Current V OUT = 0V, 1V Overdrive (Note 3) – 75 –110 mA SR Slew Rate A V = – 1 (Note 5) 500 750 V/ ms FPBW Full Power Bandwidth 3V Peak (Note 6) 40 MHz GBW Gain Bandwidth Product f = 200kHz 75 100 MHz tr, tf Rise Time, Fall Time A V = 1, 10% to 90%, 0.1V, RL = 100W 2n s OS Overshoot A V = 1, 0.1V, RL = 100W 25 % tPD Propagation Delay A V = 1, 50% VIN to 50% VOUT, 0.1V, RL = 100W 2.8 ns ts Settling Time 5V Step, 0.1%, A V = – 1 30 ns THD Total Harmonic Distortion f = 1MHz, V OUT = 2VP-P, AV = 2, RL = 500W –76 dB Differential Gain V OUT = 2VP-P, AV = 2, RL = 150W 0.12 % Differential Phase V OUT = 2VP-P, AV = 2, RL = 150W 0.07 DEG ROUT Output Resistance A V = 1, f = 1MHz 0.4 W TA = 25°C, VS = –5V, VCM = 0V unless otherwise noted. TOP VIEW SHDN VOUT NC NC –IN +IN V S8 PACKAGE 8-LEAD PLASTIC SO ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage (Note 4) 0.5 2.0 mV IOS Input Offset Current 30 400 nA IB Input Bias Current –1.0 –4 mA en Input Noise Voltage Density f = 10kHz 8 nV/ ÖHz in Input Noise Current Density f = 10kHz 1 pA/ ÖHz RIN Input Resistance V CM = 1.5V to 3.5V 3 10 M W Differential 1.5 M W CIN Input Capacitance 2p F VCM Input Voltage Range (Positive) 3.5 4 V Input Voltage Range (Negative) 1 1.5 V CMRR Common Mode Rejection Ratio V CM = 1.5V to 3.5V 73 82 dB AVOL Large-Signal Voltage Gain V OUT = 1.5V to 3.5V, RL = 500W 1.0 2.0 V/mV VOUT = 1.5V to 3.5V, RL = 100W 0.7 1.5 V/mV VOUT Maximum Output Swing (Positive) R L = 500W , 30mV Overdrive 3.9 4.1 V RL = 100W , 30mV Overdrive 3.7 3.9 V Maximum Output Swing (Negative) R L = 500W , 30mV Overdrive 0.9 1.1 V RL = 100W , 30mV Overdrive 1.1 1.3 V IOUT Maximum Output Current V OUT = 3.5V or 1.5V, 30mV Overdrive –25 –40 mA ISC Output Short-Circuit Current V OUT = 2.5V, 1V Overdrive (Note 3) –55 –80 mA SR Slew Rate A V = –1 (Note 5) 200 350 V/ ms FPBW Full Power Bandwidth 1V Peak (Note 6) 55 MHz GBW Gain Bandwidth Product f = 200kHz 65 94 MHz tr, tf Rise Time, Fall Time A V = 1, 10% to 90%, 0.1V, RL = 100W 2.1 ns OS Overshoot A V = 1, 0.1V, RL = 100W 25 % tPD Propagation Delay A V = 1, 50% VIN to 50% VOUT, 0.1V, RL = 100W 3n s ts Settling Time 2V Step, 0.1%, A V = –1 30 ns THD Total Harmonic Distortion f = 1MHz, V OUT = 2VP-P, AV = 2, RL = 500W –75 dB Differential Gain V OUT = 2VP-P, AV = 2, RL = 150W 0.22 % Differential Phase V OUT = 2VP-P, AV = 2, RL = 150W 0.21 DEG ROUT Output Resistance A V = 1, f = 1MHz 0.45 W ISHDN SHDN Pin Current SHDN > V – + 2.0V (On) 0 –1 mA SHDN < V– + 0.4V (Off) –50 –20 mA IS Supply Current SHDN > V – + 2.0V (On) 2.7 3.6 mA SHDN < V– + 0.4V (Off) 20 50 mA TA = 25°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ISHDN SHDN Pin Current SHDN > V – + 2.0V (On) 0 –1 mA SHDN < V– + 0.4V (Off) –100 – 50 mA IS Supply Current SHDN > V – + 2.0V (On) 3 3.6 mA SHDN < V– + 0.4V (Off) 50 100 mA TA = 25°C, VS = –5V, VCM = 0V unless otherwise noted.ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage (Note 4) 2 mV DVOS/DT Input Offset Voltage Drift (Note 7) 10 15 mV/°C IOS Input Offset Current 500 nA IB Input Bias Current –5 mA 0°C £ TA £ 70°C, VS = –5V, VCM = 0V unless otherwise noted.

0°C £ TA £ 70°C. VS = –5V, VCM = 0V unless otherwise noted.ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCM Input Voltage Range (Positive) 3.5 V Input Voltage Range (Negative) –3.5 V CMRR Common Mode Rejection Ratio V CM = –3.5V 73 dB Minimum Supply Voltage –2V PSRR Power Supply Rejection Ratio V S = –2V to –5.5V 76 dB AVOL Large-Signal Voltage Gain V OUT = – 3V, RL = 500W 1.0 V/mV VOUT = – 3V, RL = 100W 0.7 V/mV VOUT Maximum Output Swing R L = 500W , 30mV Overdrive – 3.70 V RL = 100W , 30mV Overdrive – 3.25 V IOUT Maximum Output Current V OUT = –3V, 30mV Overdrive – 35 mA ISC Output Short-Circuit Current V OUT = 0V, 1V Overdrive (Note 3) – 60 mA SR Slew Rate A V = –1 (Note 5) 400 V/ ms GBW Gain Bandwidth Product f = 200kHz 65 MHz ISHDN SHDN Pin Current SHDN > V – + 2.0V (On) –1.5 mA SHDN < V– + 0.4V (Off) –150 mA IS Supply Current SHDN > V – + 2.0V (On) 4.6 mA SHDN < V– + 0.4V (Off) 150 mA 0°C £ TA £ 70°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted. VOS Input Offset Voltage (Note 4) 2.5 mV DVOS/DT Input Offset Voltage Drift (Note 7) 10 15 mV/°C IOS Input Offset Current 500 nA IB Input Bias Current –5 mA VCM Input Voltage Range (Positive) 3.5 V Input Voltage Range (Negative) 1.5 V CMRR Common Mode Rejection Ratio V CM = 1.5V to 3.5V 71 dB AVOL Large-Signal Voltage Gain V OUT = 1.5V to 3.5V, RL = 500W 0.7 V/mV VOUT = 1.5V to 3.5V, RL = 100W 0.5 V/mV VOUT Maximum Output Swing (Positive) R L = 500W , 30mV Overdrive 3.8 V RL = 100W , 30mV Overdrive 3.6 V Maximum Output Swing (Negative) R L = 500W , 30mV Overdrive 1.2 V RL = 100W , 30mV Overdrive 1.4 V IOUT Maximum Output Current V OUT = 3.5V or 1.5V, 30mV Overdrive – 20 mA ISC Output Short-Circuit Current V OUT = 2.5V, 1V Overdrive (Note 3) – 45 mA SR Slew Rate A V = –1 (Note 5) 150 V/ ms GBW Gain Bandwidth Product f = 200kHz 55 MHz ISHDN SHDN Pin Current SHDN > V – + 2.0V (On) –1.5 mA SHDN < V– + 0.4V (Off) – 75 mA IS Supply Current SHDN > V – + 2.0V (On) 4.5 mA SHDN < V– + 0.4V (Off) 75 mA –4 0°C £ TA £ 85°C. VS = –5V, VCM = 0V unless otherwise noted (Note 8). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage (Note 4) 3 mV DVOS/DT Input Offset Voltage Drift (Note 7) 10 30 mV/°C IOS Input Offset Current 600 nA IB Input Bias Current –6 mA VCM Input Voltage Range (Positive) 3.5 V Input Voltage Range (Negative) –3.5 V CMRR Common Mode Rejection Ratio V CM = –3.5V 72 dB

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Supply Voltage –2V PSRR Power Supply Rejection Ratio V S = –2V to –5.5V 75 dB AVOL Large-Signal Voltage Gain V OUT = – 3V, RL = 500W 0.8 V/mV VOUT = – 3V, RL = 100W 0.6 V/mV VOUT Maximum Output Swing R L = 500W , 30mV Overdrive – 3.60 V RL = 100W , 30mV Overdrive – 3.15 V IOUT Maximum Output Current V OUT = –3V, 30mV Overdrive – 30 mA ISC Output Short-Circuit Current V OUT = 0V, 1V Overdrive (Note 3) – 55 mA SR Slew Rate A V = –1 (Note 5) 350 V/ ms GBW Gain Bandwidth Product f = 200kHz 60 MHz ISHDN SHDN Pin Current SHDN > V – + 2.0V (On) –2 mA SHDN < V– + 0.4V (Off) –200 mA IS Supply Current SHDN > V – + 2.0V (On) 5 mA SHDN < V– + 0.4V (Off) 200 mA Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: Differential inputs of –3V are appropriate for transient operation only, such as during slewing. Large sustained differential inputs can cause excessive power dissipation and may damage the part. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 4: Input offset voltage is pulse tested and is exclusive of warm-up drift. Note 5: Slew rate is measured between –2V on the output with –3V input for –5V supplies and 2V P-P on the output with a 3VP-P input for single 5V supplies. Note 6: Full power bandwidth is calculated from the slew rate: FPBW = SR/2pVP. Note 7: This parameter is not 100% tested. Note 8: The LT1812C is guaranteed to meet specified performance from 0°C to 70°C. The LT1812C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LT1812I is guaranteed to meet specified performance from –40°C to 85°C. Note 9: qJA is specified for a 2500mm2 board covered with 2 oz copper on both sides. Thermal resistance varies, depending upon the amount of PC board metal attached to the device. For this package in particular, power is dissipated primarily through Pin 4, which should therefore, have a good thermal connection to a copper plane. –4 0°C £ TA £ 85°C. VS = –5V, VCM = 0V unless otherwise noted (Note 8). –4 0°C £ TA £ 85°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Note 8). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage (Note 4) 3.5 mV DVOS/DT Input Offset Voltage Drift (Note 7) 10 30 mV/°C IOS Input Offset Current 600 nA IB Input Bias Current –6 mA VCM Input Voltage Range (Positive) 3.5 V Input Voltage Range (Negative) 1.5 V CMRR Common Mode Rejection Ratio V CM = 1.5V to 3.5V 70 dB AVOL Large-Signal Voltage Gain V OUT = 1.5V to 3.5V, RL = 500W 0.6 V/mV VOUT = 2.0V to 3.0V, RL = 100W 0.4 V/mV VOUT Maximum Output Swing (Positive) R L = 500W , 30mV Overdrive 3.7 V RL = 100W , 30mV Overdrive 3.5 V Maximum Output Swing (Negative) R L = 500W , 30mV Overdrive 1.3 V RL = 100W , 30mV Overdrive 1.5 V IOUT Maximum Output Current V OUT = 3.5V or 1.5V, 30mV Overdrive – 17 mA ISC Output Short-Circuit Current V OUT = 2.5V, 1V Overdrive (Note 3) – 40 mA SR Slew Rate A V = –1 (Note 5) 125 V/ ms GBW Gain Bandwidth Product f = 200kHz 50 MHz ISHDN SHDN Pin Current SHDN > V – + 2.0V (On) –2 mA SHDN < V– + 0.4V (Off) –100 mA IS Supply Current SHDN > V – + 2.0V (On) 5 mA SHDN < V– + 0.4V (Off) 100 mA

TYPICAL PERFOR A CE CHARACTERISTICS UW Supply Current vs Temperature Input Common Mode Range vs Supply Voltage Input Bias Current vs Common Mode Voltage TEMPERATURE (°C) –50 –25 SUPPLY CURRENT (mA) 0 50 75

1812 G01

VS = –5V VS = –2.5V SUPPLY VOLTAGE (– V) INPUT COMMON MODE RANGE (V) 1.0 1.5 2.0 – 2.0 –1.5 2 4 5

1812 G02

0.5 –1.0 – 0.5 1 3 6 7 TA = 25°C ∆VOS < 1mV INPUT COMMON MODE VOLTAGE (V) – 5.0 INPUT BIAS CURRENT (µA) –1.0 – 0.5 TA = 25°C VS = – 5V 5.0

1812 G03

–1.5 – 2.0 – 2.5 0 2.5 Input Bias Current vs Temperature Input Noise Spectral Density Open-Loop Gain vs Resistive Load TEMPERATURE (°C) –50 –0.6 –0.4 25 75

1812 G04

–0.8 –1.0 –25 0 50 100 125 –1.2 –1.4 –0.2INPUT BIAS CURRENT (µA) VS = –5V VS = –2.5V FREQUENCY (Hz) 10 100 in 100 0.1 1k 10k 100k

1812 G05

TA = 25°C VS = – 5V AV = 101 RS = 10k en INPUT VOLTAGE NOISE (nV/√Hz) INPUT CURRENT NOISE (pA/√Hz) LOAD RESISTANCE (Ω ) 100 OPEN-LOOP GAIN (dB) 62.5 65.0 67.5 70.0 75.0 1k 10k

1812 G06

72.5 TA = 25°C VS = – 5V VS = – 2.5V Open-Loop Gain vs Temperature Output Voltage Swing vs Supply Voltage Output Voltage Swing vs Load Current TEMPERATURE (°C) –50 OPEN-LOOP GAIN (dB) 70.0 72.5 75.0 25 75

1812 G07

67.5 65.0 –25 0 50 100 125 62.5 60.0 VS = – 5V VO = – 3V RL = 500Ω RL = 100Ω OUTPUT CURRENT (mA) –60 OUTPUT VOLTAGE SWING (V) – 2.0 –1.0 –1.5 – 0.5

1812 G09

2.0 1.0 1.5 0.5 –40 –20 0 40 60 VS = – 5V VIN = 30mV 85°C 25°C –4 0°C SUPPLY VOLTAGE (– V) OUTPUT VOLTAGE SWING (V)1.0 1.5 2.0 – 2.0 –1.5 2 4 5

1812 G08

0.5 –1.0 – 0.5 1 3 6 7 TA = 25°C VIN = 30mV RL = 100Ω RL = 100Ω RL = 500Ω RL = 500Ω

TYPICAL PERFOR A CE CHARACTERISTICS UW Output Short-Circuit Current vs Temperature Settling Time vs Output Step Output Impedance vs Frequency TEMPERATURE (°C) –50 OUTPUT SHORT-CIRCUIT CURRENT (mA) 110 115 120 25 75

1812 G10

–25 0 50 100 125 SOURCE SINK VS = – 5V SETTLING TIME (ns) OUTPUT STEP (V) 10 20 25

1812 G11

TA = 25°C VS = – 5V AV = –1 RF = 500Ω CF = 3pF 0.1% SETTLING FREQUENCY (Hz) 10k 100k

0.001 OUTPUT IMPEDANCE (Ω )

0.1 100 1M 10M 100M

1812 G12

0.01

10 AV = 100

AV = 10 AV = 1 TA = 25°C VS = – 5V Gain and Phase vs Frequency Shutdown Supply Current vs Temperature Gain Bandwidth and Phase Margin vs Temperature FREQUENCY (Hz)

10 GAIN (dB)20

1812 G13

–10 PHASE (DEG) 100 120 –20 –40 PHASEGAIN –5V –5V –2.5V –2.5V TA = 25°C AV = –1 RF = RG = 500Ω TEMPERATURE (°C) –50 25 75

1812 G14

–25 0 50 100 125 60SHUTDOWN SUPPLY CURRENT (µA) VSHDN = V– + 0.4V VS = –5V VS = –2.5V TEMPERATURE (°C) –50 –25 GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 115 0 50 75

1812 G15

VS = – 5V GBW VS = –2.5V PHASE MARGIN VS = –2.5V PHASE MARGIN VS = –5V RL = 500Ω Gain vs Frequency Gain vs Frequency Gain vs Frequency FREQUENCY (Hz) GAIN (dB) 10M 100M 500M

1812 G16

–10 –12 –14 TA = 25°C AV = 1 NO RL VS = –2.5V VS = –5V FREQUENCY (Hz) GAIN (dB) 10M 100M 500M

1812 G17

VS = –5V TA = 25°C AV = 2 RL = 100Ω VS = –2.5V FREQUENCY (Hz) GAIN (dB) 10M 100M 200M

1812 G18

TA = 25°C AV = –1 VS = –5V RF = RG = 500Ω NO RL CL= 1000pF CL= 500pF CL= 200pF CL= 100pF CL= 50pF CL= 0

TYPICAL PERFOR A CE CHARACTERISTICS UW Gain Bandwidth and Phase Margin vs Supply Voltage Power Supply Rejection Ratio vs Frequency Common Mode Rejection Ratio vs Frequency SUPPLY VOLTAGE (–V) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG)

1812 G19

TA = 25°C GBW RL = 500Ω GBW RL = 100Ω PHASE MARGIN RL = 100Ω PHASE MARGIN RL = 500Ω FREQUENCY (Hz) 1k 10k 100k POWER SUPPLY REJECTION RATIO (dB) 1M 10M 100M

1812 G20

–PSRR +PSRR TA = 25°C AV = 1 VS = –5V FREQUENCY (Hz) 1k 10k 100k COMMON MODE REJECTION RATIO (dB) 1M 10M 100M

1812 G21

TA = 25°C VS = –5V Slew Rate vs Supply Voltage Slew Rate vs Supply Voltage Slew Rate vs Input Level SUPPLY VOLTAGE (–V)

200 SLEW RATE (V/µs)

1812 G22

TA =25°C AV = –1 VIN = VS(TOTAL)/2 RF = RG = RL = 500W SR+ SR– SUPPLY VOLTAGE (–V)

1812 G23

TA =25°C AV = –1 VIN = –1V RF = RG = RL = 500W SR– SR+ INPUT LEVEL (VP-P)

1812 G24

TA =25°C AV = –1 VS = –5V RF = RG = RL = 500W SR– SR+ Slew Rate vs Temperature Total Harmonic Distortion + Noise vs Frequency Undistorted Output Swing vs Frequency FREQUENCY (Hz) 100k OUTPUT VOLTAGE (VP-P) 1M 10M 100M

1812 G27

AV = – 1 AV = 1 TA = 25°C VS = – 5V RL = 100Ω 2% MAX DISTORTION FREQUENCY (Hz) 10 100 0.001 0.002 0.005TOTAL HARMONIC DISTORTION + NOISE (%) 0.01 1k 10k 100k

1812 G26

AV = –1 AV = 1 TA = 25°C VS = – 5V VO = 2VP-P RL = 500Ω TEMPERATURE (°C) –50 SLEW RATE (V/µs)800 1000 1200 25 75

1812 G25

–25 0 50 100 125 200 SR– VS = –5V SR+ VS = –5V SR– VS = –2.5V SR+ VS = –2.5V

TYPICAL PERFOR A CE CHARACTERISTICS UW 2nd and 3rd Harmonic Distortion vs Frequency Differential Gain and Phase vs Supply Voltage Capacitive Load Handling FREQUENCY (Hz) –100 –70 –80 –90 –30 –40 –50 –60

1812 G28

HARMONIC DISTORTION (dB) 100k 10M1M TA = 25°C AV = 2 VS = – 5V VO = 2VP-P 2ND HARMONIC 3RD HARMONIC R L = 100Ω 2ND HARMONIC RL = 500Ω 3RD HARMONIC TOTAL SUPPLY VOLTAGE (V) DIFFERENTIAL PHASE (DEG) DIFFERENTIAL GAIN (%) 0.25 TA = 25°C 0.10 8 10

1812 G29

0.15 0.20 0.05 0.25 0.10 0.15 0.20 0.05 6 12 DIFFERENTIAL GAIN RL = 150Ω DIFFERENTIAL PHASE RL = 150Ω DIFFERENTIAL PHASE RL = 1k DIFFERENTIAL GAIN RL = 1k CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000 10000

1812 G30

TA = 25°C VS = –5V AV = 1 AV = –1 Small-Signal Transient, AV = –1 Small-Signal Transient, AV = 1 Small-Signal Transient, AV = 1, CL = 1000pF

1812 G33

Large-Signal Transient, A V = –1 Large-Signal Transient, AV = 1 Large-Signal Transient, AV = 1, CL = 1000pF

1812 G36

1812 G321812 G31

1812 G34 1812 G35

Layout and Passive Components The LT1812 amplifier is more tolerant of less than ideal layouts than other high speed amplifiers. For maximum performance (for example, fast settling) use a ground plane, short lead lengths and RF-quality bypass capacitors (0.01mF to 0.1mF). For high drive current applications, use low ESR bypass capacitors (1mF to 10mF tantalum). The parallel combination of the feedback resistor and gain setting resistor on the inverting input combine with the input capacitance to form a pole that can cause peaking or even oscillations. If feedback resistors greater than 2k are used, a parallel capacitor of value C F > RG • CIN/RF should be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is 1 and a large feedback resistor is used, C F should be greater than or equal to CIN. An example would be an I-to-V converter. Input Considerations Each of the LT1812 amplifier inputs is the base of an NPN and PNP transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. Because of variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current does not depend on beta matching and is well controlled. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized. The inputs can withstand differential input voltages of up to 3V without damage and need no clamping or source resis- tance for protection. The device should not be used as a comparator because with sustained differential inputs, excessive power dissi- pation may result. Capacitive Loading The LT1812 is stable with a 1000pF capacitive load, which is outstanding for a 100MHz amplifier. This is accom- plished by sensing the load induced output pole and adding compensation at the amplifier gain node. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response. Coaxial cable can be driven directly, but for best pulse fidelity, a resistor of value equal to the characteristic impedance of the cable (i.e., 75W ) should be placed in series with the output. The other end of the cable should be terminated with the same value resistor to ground. Slew Rate The slew rate is proportional to the differential input voltage. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 5V output step in a gain of 10 has a 0.5V input step, whereas in unity gain there is a 5V input step. The LT1812 is tested for slew rate in a gain of –1. Lower slew rates occur in higher gain configurations. Shutdown The LT1812 has a shutdown pin (SHDN, Pin 8) for conserving power. When this pin is open or biased at least 2V above the negative supply, the part operates normally. When pulled down to V –, the supply current drops to about 50mA. Typically, the turn-off delay is 1ms and the turn-on delay 0.5ms. The current out of the SHDN pin is also typically 50mA. In shutdown mode, the ampli- fier output is not isolated from the inputs, so the LT1812 shutdown feature cannot be used for multiplexing appli- cations. The 50mA typical shutdown current is exclusive of any output (load) current. In order to prevent load current (and maximize the power savings), either the load needs to be disconnected, or the input signal needs to be 0V. Even in shutdown mode, the LT1812 can still drive significant current into a load. For example, in an A V = 1 configuration, when driven with a 1V DC input, the LT1812 drives 2mA into a 100 W load. It takes about 500ms for the load current to reach this value. Power Dissipation The LT1812 combines high speed and large output drive in a small package. It is possible to exceed the maximum junction temperature under certain conditions. Maximum APPLICATIO S I FOR ATIOWU UU

junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) as follows: LT1812CS8: T J = TA + (PD • 80°C/W) (Note 9) Power dissipation is composed of two parts. The first is due to the quiescent supply current and the second is due to on-chip dissipation caused by the load current. The worst-case load induced power occurs when the output voltage is at 1/2 of either supply voltage (or the maximum swing if less than 1/2 supply voltage). Therefore P DMAX is: PDMAX = (V+ – V –)(ISMAX) + (V+/2)2/RL or PDMAX = (V+ – V –)(ISMAX) + (V+ – VOMAX)(VOMAX/RL) Example: LT1812CS8 at 70°C, VS = –5V, RL = 100W PDMAX = (10V)(4.5mA) + (2.5V)2/100W = 108mW TJMAX = 70°C + (108mW)(80°C/W) = 79°C Circuit Operation The LT1812 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feed- back amplifier. The operation of the circuit can be under- stood by referring to the Simplified Schematic. The inputs are buffered by complementary NPN and PNP emitter followers that drive a 300 W resistor. The input voltage appears across the resistor generating currents that are mirrored into the high impedance node. Complementary followers form an output stage that buffers the gain node from the load. The bandwidth is set by the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current available to charge the gain node capacitance. This current is the differential input voltage divided by R1, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. The RC network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. When driving capacitive loads (or a low value resistive load) the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance slows down the amplifier which improves the phase margin by moving the unity- gain cross away from the pole formed by the output impedance and the capacitive load. The zero created by the RC combination adds phase to ensure that the total phase lag does not exceed 180 degrees (zero phase margin) and the amplifier remains stable. In this way, the LT1812 is stable with up to 1000pF capacitive loads in unity gain, and even higher capacitive loads in higher closed-loop gain configurations. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1812 SS OUT +IN –IN BIAS CONTROL RB SHDN 300W CC RC C SCHEMATIC WWSI PLIFIED APPLICATIO S I FOR ATIOWU UU

PART NUMBER DESCRIPTION COMMENTS LT1360/LT1361/LT1362 Single/Dual/Quad 50MHz, 800V/ ms, C-Load TM Amplifiers 4mA Supply Current, 1mV Max V OS, 1mA Max IB LT1363/LT1364/LT1365 Single/Dual/Quad 70MHz, 1000V/ ms C-Load Amplifiers 50mA Output Current, 1.5mV Max V OS, 2mA Max IB LT1395/LT1396/LT1397 Single/Dual/Quad 400MHz Current Feedback Amplifiers 4.6mA Supply Current, 800V/ ms, 80mA Output Current LT1398/LT1399 Dual/Triple 300MHz Current Feedback Amplifiers 4.5mA Supply Current, 80mA Output Current, Shutdown LT1813 Dual 3mA, 100MHz, 750V/ ms Operational Amplifier Dual Version of the LT1812 C-Load is a trademark of Linear Technology Corporation. 1812f LT/TP 0200 4K • PRINTED IN USA ª LINEAR TECHNOLOGY CORPORATION 1 999 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear-tech.com PACKAGE DESCRIPTIONU 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.016 – 0.050 (0.406 – 1.270) 0.010 – 0.020 0°– 8° TYP 0.008 – 0.010 (0.203 – 0.254) SO8 1298 0.053 – 0.069 (1.346 – 1.752) 0.014 – 0.019 (0.355 – 0.483) TYP 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC 1 2 3 4 0.150 – 0.157** (3.810 – 3.988) 8 7 6 5 0.189 – 0.197* (4.801 – 5.004) 0.228 – 0.244 (5.791 – 6.197) DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE TYPICAL APPLICATIO U 470pF– VIN 2VP-P 2.5VDC 68Ω LT1812 LTC1420

12 BITS

1812 TA03

Single 5V Supply 10MS/s 12-Bit ADC Buffer