LT1812

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■ Wideband Amplifiers ■ Buffers ■ Active Filters ■ Data Acquisition Systems ■ Photodiode Amplifiers DAC I-to-V Converter Dual and Quad 25MHz, 600V /µs Op Amps The LT1358/LT1359 are dual and quad low power high speed operational amplifiers with outstanding AC and DC performance. The amplifiers feature much lower supply current and higher slew rate than devices with comparable bandwidth. The circuit topology is a voltage feedback amplifier with matched high impedance inputs and the slewing performance of a current feedback amplifier. The high slew rate and single stage design provide excellent settling characteristics which make the circuit an ideal choice for data acquisition systems. Each output drives a 500Ω load to ±12.5V with ±15V supplies and a 150Ω load to ±3V on ±5V supplies. The amplifiers are stable with any capacitive load making them useful in buffer applications. The LT1358/LT1359 are members of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation’s advanced bipolar complementary processing. For a single amplifier version of the LT1358/LT1359 see the LT1357 data sheet. For higher bandwidth devices with higher supply currents see the LT1360 through LT1365 data sheets. For lower supply current amplifiers see the LT1354 and LT1355/ LT1356 data sheets. Singles, duals, and quads of each amplifier are available. AV = –1 Large-Signal Response FEATURES DESCRIPTIO U APPLICATIO SU TYPICAL APPLICATIO U , LTC and LT are registered trademarks of Linear Technology Corporation. C-Load is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

135859 TA01

0.1µF5 k 6pF VOUT 565A-TYPE DAC INPUTS LT1358

135859 TA02

+ () +<51Ω ■ 25MHz Gain Bandwidth ■ 600V/µs Slew Rate ■ 2.5mA Maximum Supply Current per Amplifier ■ Unity-Gain Stable ■ C-Load TM Op Amp Drives All Capacitive Loads ■ 8nV/√Hz Input Noise Voltage ■ 600µV Maximum Input Offset Voltage ■ 500nA Maximum Input Bias Current ■ 120nA Maximum Input Offset Current ■ 20V/mV Minimum DC Gain, RL=1k ■ 115ns Settling Time to 0.1%, 10V Step ■ 220ns Settling Time to 0.01%, 10V Step ■ ±12.5V Minimum Output Swing into 500Ω ■ ±3V Minimum Output Swing into 150Ω ■ Specified at ±2.5V, ±5V, and ±15V ■ LT1358 is Available in 8-Pin PDIP and SO Packages ■ LT1359 is Available in 14-Pin PDIP, 14-Pin and 16-Pin SO Packages

Differential Input Voltage Operating Temperature Range (Note 7) ...–40 °C to 85°C ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W (Note 1) Specified Temperature Range (Note 8) ....–40 °C to 85°C Maximum Junction Temperature (See Below) D OUT A –IN A +IN A +IN B –IN B OUT B OUT C V – –IN D OUT D TOP VIEW A +IN D +IN C –IN C CB S PACKAGE 14-LEAD PLASTIC SO TJMAX = 150°C, θJA = 150°C/ W D 107 1OUT A –IN A +IN A +IN B –IN B OUT B OUT C 98NC NC V – –IN D OUT D TOP VIEW A +IN D +IN C –IN C CB S PACKAGE 16-LEAD PLASTIC SO D OUT A –IN A +IN A +IN B –IN B OUT B OUT C V – –IN D OUT D TOP VIEW A +IN D +IN C –IN C CB N PACKAGE 14-LEAD PDIP TJMAX = 150°C, θJA = 110°C/ W TJMAX = 150°C, θJA = 190°C/ W –IN A +IN A TOP VIEW S8 PACKAGE 8-LEAD PLASTIC SO OUT A OUT B V – –IN B +IN B A B –IN A +IN A TOP VIEW N8 PACKAGE 8-LEAD PDIP OUT A OUT B V – –IN B +IN B A B LT1359CS LT1359IS ORDER PART NUMBER LT1359CN LT1359IN *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. ORDER PART NUMBER Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ ORDER PART NUMBER LT1358CN8 LT1358IN8 LT1358CS8 LT1358IS8 ORDER PART NUMBER S8 PART MARKING 1358 1358I TJMAX = 150°C, θJA = 130°C/ W TJMAX = 150°C, θJA = 160°C/ W LT1359CS14 LT1359IS14 ORDER PART NUMBER

TA = 25°C, VCM = 0V unless otherwise noted.ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS V SUPPLY MIN TYP MAX UNITS VOS Input Offset Voltage ±15V 0.2 0.6 mV ±5V 0.2 0.6 mV ±2.5V 0.3 0.8 mV IOS Input Offset Current ±2.5V to ±15V 40 120 nA IB Input Bias Current ±2.5V to ±15V 120 500 nA en Input Noise Voltage f = 10kHz ±2.5V to ±15V 8 nV/ √Hz in Input Noise Current f = 10kHz ±2.5V to ±15V 0.8 pA/ √Hz RIN Input Resistance V CM = ±12V ±15V 35 80 M Ω Input Resistance Differential ±15V 6 M Ω CIN Input Capacitance ±15V 3 pF Input Voltage Range + ± 15V 12.0 13.4 V ± 5V 2.5 3.5 V ± 2.5V 0.5 1.1 V Input Voltage Range – ± 15V –13.2 –12.0 V ± 5V –3.3 –2.5 V ± 2.5V –0.9 –0.5 V CMRR Common Mode Rejection Ratio V CM = ±12V ± 15V 83 97 dB VCM = ±2.5V ± 5V 78 84 dB VCM = ±0.5V ± 2.5V 68 75 dB PSRR Power Supply Rejection Ratio V S = ±2.5V to ±15V 92 106 dB AVOL Large-Signal Voltage Gain V OUT = ±12V, RL = 1k ± 15V 20 65 V/mV VOUT = ±10V, RL = 500Ω ± 15V 7 25 V/mV VOUT = ±2.5V, RL = 1k ± 5V 20 45 V/mV VOUT = ±2.5V, RL = 500Ω ± 5V 7 25 V/mV VOUT = ±2.5V, RL = 150Ω ± 5V 1.5 6 V/mV VOUT = ±1V, RL = 500Ω ± 2.5V 7 30 V/mV VOUT Output Swing R L = 1k, VIN = ±40mV ± 15V 13.3 13.8 ±V RL = 500Ω, VIN = ±40mV ± 15V 12.5 13.0 ±V RL = 500Ω, VIN = ±40mV ± 5V 3.5 4.0 ±V RL = 150Ω, VIN = ±40mV ± 5V 3.0 3.3 ±V RL = 500Ω, VIN = ±40mV ± 2.5V 1.3 1.7 ±V IOUT Output Current V OUT = ±12.5V ± 15V 25 30 mA VOUT = ±3V ± 5V 20 25 mA ISC Short-Circuit Current V OUT = 0V, VIN = ±3V ± 15V 30 42 mA SR Slew Rate A V = –2, (Note 4) ± 15V 300 600 V/ µs ± 5V 150 220 V/ µs Full Power Bandwidth 10V Peak, (Note 5) ± 15V 9.6 MHz 3V Peak, (Note 5) ± 5V 11.7 MHz GBW Gain Bandwidth f = 200kHz, R L = 2k ± 15V 18 25 MHz ± 5V 15 22 MHz ± 2.5V 20 MHz tr, tf Rise Time, Fall Time A V = 1, 10%-90%, 0.1V ± 15V 8 ns ± 5V 9 ns Overshoot A V = 1, 0.1V ± 15V 27 % ± 5V 27 % Propagation Delay 50% V IN to 50% VOUT, 0.1V ± 15V 9 ns ± 5V 11 ns ts Settling Time 10V Step, 0.1%, A V = –1 ±15V 115 ns 10V Step, 0.01%, A V = –1 ± 15V 220 ns 5V Step, 0.1%, A V = –1 ± 5V 110 ns 5V Step, 0.01%, A V = –1 ± 5V 380 ns

SYMBOL PARAMETER CONDITIONS V SUPPLY MIN TYP MAX UNITS VOS Input Offset Voltage ±15V ● 0.8 mV ± 5V ● 0.8 mV ± 2.5V ● 1.0 mV Input VOS Drift (Note 6) ± 2.5V to ±15V ● 58 µV/°C IOS Input Offset Current ± 2.5V to ±15V ● 180 nA IB Input Bias Current ± 2.5V to ±15V ● 750 nA CMRR Common Mode Rejection Ratio V CM = ±12V ±15V ● 81 dB VCM = ±2.5V ± 5V ● 77 dB VCM = ±0.5V ± 2.5V ● 67 dB PSRR Power Supply Rejection Ratio V S = ±2.5V to ±15V ● 90 dB AVOL Large-Signal Voltage Gain V OUT = ±12V, RL = 1k ±15V ● 15 V/mV VOUT = ±10V, RL = 500Ω ±15V ● 5V / m V VOUT = ±2.5V, RL = 1k ± 5V ● 15 V/mV VOUT = ±2.5V, RL = 500Ω ± 5V ● 5V / m V VOUT = ±2.5V, RL = 150Ω ± 5V ● 1V / m V VOUT = ±1V, RL = 500Ω ± 2.5V ● 5V / m V VOUT Output Swing R L = 1k, VIN = ± 40mV ±15V ● 13.2 ± V RL = 500Ω, VIN = ± 40mV ±15V ● 12.2 ± V RL = 500Ω, VIN = ± 40mV ± 5V ● 3.4 ± V RL = 150Ω, VIN = ± 40mV ± 5V ● 2.8 ± V RL = 500Ω, VIN = ± 40mV ± 2.5V ● 1.2 ± V IOUT Output Current V OUT = ±12.2V ±15V ● 24.4 mA VOUT = ±2.8V ± 5V ● 18.7 mA ISC Short-Circuit Current V OUT = 0V, VIN = ± 3V ±15V ● 25 mA SR Slew Rate A V = – 2, (Note 4) ±15V ● 225 V/ µs ± 5V ● 125 V/ µs GBW Gain Bandwidth f = 200kHz, R L = 2k ±15V ● 15 MHz ± 5V ● 12 MHz Channel Separation V OUT = ± 10V, RL = 500Ω ±15V ● 98 dB IS Supply Current Each Amplifier ±15V ● 2.9 mA Each Amplifier ± 5V ● 2.8 mA ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted. Differential Gain f = 3.58MHz, A V = 2, RL = 1k ± 15V 0.1 % ± 5V 0.1 % Differential Phase f = 3.58MHz, A V = 2, RL = 1k ± 15V 0.50 Deg ± 5V 0.35 Deg RO Output Resistance A V = 1, f = 100kHz ± 15V 0.3 Ω Channel Separation V OUT = ±10V, RL = 500Ω ± 15V 100 113 dB IS Supply Current Each Amplifier ± 15V 2.0 2.5 mA Each Amplifier ± 5V 1.9 2.4 mA TA = 25°C, VCM = 0V unless otherwise noted.ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS V SUPPLY MIN TYP MAX UNITS

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Differential inputs of ±10V are appropriate for transient operation only, such as during slewing. Large, sustained differential inputs will cause excessive power dissipation and may damage the part. See Input Considerations in the Applications Information section of this data sheet for more details. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 4: Slew rate is measured between ±10V on the output with ±6V input for ±15V supplies and ±1V on the output with ±1.75V input for ±5V supplies. Note 5: Full power bandwidth is calculated from the slew rate measurement: FPBW = (SR)/2πV Note 6: This parameter is not 100% tested. Note 7. The LT1358C/LT1359C and LT1358I/LT1359I are guaranteed functional over the operating temperature range of –40°C to 85°C. Note 8: The LT1358C/LT1359C are guaranteed to meet specified performance from 0°C to 70°C. The LT1358C/LT1359C are designed, characterized and expected to meet specified performance from –40 °C to 85°C, but are not tested or QA sampled at these temperatures. The LT1358I/LT1359I are guaranteed to meet specified performance from –40 °C to 85°C. SYMBOL PARAMETER CONDITIONS V SUPPLY MIN TYP MAX UNITS VOS Input Offset Voltage ±15V ● 1.3 mV ± 5V ● 1.3 mV ± 2.5V ● 1.5 mV Input VOS Drift (Note 6) ± 2.5V to ±15V ● 58 µV/°C IOS Input Offset Current ± 2.5V to ±15V ● 300 nA IB Input Bias Current ± 2.5V to ±15V ● 900 nA CMRR Common Mode Rejection Ratio V CM = ±12V ±15V ● 80 dB VCM = ±2.5V ± 5V ● 76 dB VCM = ±0.5V ± 2.5V ● 66 dB PSRR Power Supply Rejection Ratio V S = ±2.5V to ±15V ● 90 dB AVOL Large-Signal Voltage Gain V OUT = ±12V, RL = 1k ±15V ● 10.0 V/mV VOUT = ±10V, RL = 500Ω ±15V ● 2.5 V/mV VOUT = ±2.5V, RL = 1k ±5V ● 10.0 V/mV VOUT = ±2.5V, RL = 500Ω ±5V ● 2.5 V/mV VOUT = ±2.5V, RL = 150Ω ±5V ● 0.6 V/mV VOUT = ±1V, RL = 500Ω ±2.5V ● 2.5 V/mV VOUT Output Swing R L = 1k, VIN = ±40mV ±15V ● 13.0 ±V RL = 500Ω, VIN = ±40mV ±15V ● 12.0 ±V RL = 500Ω, VIN = ±40mV ±5V ● 3.4 ±V RL = 150Ω, VIN = ±40mV ±5V ● 2.6 ±V RL = 500Ω, VIN = ±40mV ±2.5V ● 1.2 ±V IOUT Output Current V OUT = ±12V ±15V ● 24.0 mA VOUT = ±2.6V ±5V ● 17.3 mA ISC Short-Circuit Current V OUT = 0V, VIN = ±3V ±15V ● 24 mA SR Slew Rate A V = – 2, (Note 4) ±15V ● 180 V/ µs ±5V ● 100 V/ µs GBW Gain Bandwidth f = 200kHz, R L = 2k ±15V ● 14 MHz ±5V ● 11 MHz Channel Separation V OUT = ±10V, RL = 500Ω ±15V ● 98 dB IS Supply Current Each Amplifier ±15V ● 3.0 mA Each Amplifier ±5V ● 2.9 mA ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the temperature range – 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 8)

SUPPLY VOLTAGE (±V) SUPPLY CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 0.5 10501 5 2 0

135859 G01

–55 °C 25°C 125°C SUPPLY VOLTAGE (±V) COMMON MODE RANGE (V) 2.0 0.5 1.0 1.5 –1.0 –0.5 –2.0 –1.5 10501 5 2 0

135859 G02

TA = 25°C ∆VOS < 1mV INPUT COMMON MODE VOLTAGE (V) –200 INPUT BIAS CURRENT (nA) –100 400 300 200 100 –15 –10 0 10 15 5–5

135859 G03

VS = ±15V TA = 25°C IB = IB+ + IB– ———— TEMPERATURE (°C) INPUT BIAS CURRENT (nA) 150 100 450 400 300 350 200 250 –50 –25 25 100 125 50 750 VS = ±15V IB =⏐ ⏐ IB+ + IB– ————

135859 G04

FREQUENCY (Hz) INPUT VOLTAGE NOISE (nV/ Hz) 100 0.1 INPUT CURRENT NOISE (pA/ Hz) en 1k100 100k 10k

135859 G05

VS = ±15V TA = 25°C AV = 101 RS = 100k in LOAD RESISTANCE (Ω) OPEN-LOOP GAIN (dB) 100 100 10k

135859 G06

90 VS = ±5V

VS = ±15VTA = 25°C TEMPERATURE (°C) OPEN-LOOP GAIN (dB)95 101 100 –50 –25 25 100 125 50 750 VS = ±15V RL = 1k VO = ±12V

135859 G07

SUPPLY VOLTAGE (±V) OUTPUT VOLTAGE SWING (V) 10501 5 2 0

135859 G08

RL = 1k RL = 500Ω RL = 500Ω TA = 25°C RL = 1k OUTPUT CURRENT (mA) V– +0.5 OUTPUT VOLTAGE SWING (V)1.5 2.0 1.0 –0.5V+ –1.0 –1.5 –2.0 2.5 –2.5 –50 –40 –10 30 40 50 01 0 2 0–20–30

135859 G09

VS = ± 5V VIN = 100mV 85°C 85°C 25°C 25°C –40 °C –40 °C Open-Loop Gain vs Temperature Input Noise Spectral Density Input Bias Current vs Temperature Open-Loop Gain vs Resistive Load Output Voltage Swing vs Supply Voltage Output Voltage Swing vs Load Current Input Common Mode Range vs Supply Voltage Supply Current vs Supply Voltage and Temperature Input Bias Current vs Input Common Mode Voltage TYPICAL PERFOR A CE CHARACTERISTICS UW

TEMPERATURE (°C) OUTPUT SHORT-CIRCUIT CURRENT (mA) –50 –25 25 100 125 50 750

135859 G10

VS = ±5V SOURCE SINK SETTLING TIME (ns) –10 OUTPUT SWING (V) 50 150 250 200100

135859 G11

VS = ±15V AV = 1 10mV 10mV 1mV 1mV SETTLING TIME (ns) –10 OUTPUT SWING (V) 50 150 250 200100

135859 G12

VS = ±15V AV = –1 10mV 10mV 1mV 1mV FREQUENCY (Hz) 10k

0.01 OUTPUT IMPEDANCE (Ω)

0.1 100k 100M

135859 G13

100 AV = 100

AV = 10 AV = 1 VS = ±15V TA = 25°C –10 VOLTAGE MAGNITUDE (dB)

135859 G19

FREQUENCY (Hz) 100k 1M 100M 10M VS = ±15V TA = 25°C AV = –1 C = 1000pF C = 500pF C = 100pF C = 50pF C = 0 SUPPLY VOLTAGE (±V) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 10501 5 2 0

135859 G15

TA = 25°C PHASE MARGIN GAIN BANDWIDTH TEMPERATURE (°C)

18 GAIN BANDWIDTH (MHz)

PHASE MARGIN (DEG) –50 –25 25 100 125 50 750

135859 G16

VS = ± 5V GAIN BANDWIDTH VS = ± 5V PHASE MARGIN VS = ±15V GAIN BANDWIDTH V S = ±15V FREQUENCY (Hz) 100k –5 GAIN (dB) 1M 100M

135859 G17

±15V ±2.5V TA = 25°C AV = 1 RL = 2k ±5V FREQUENCY (Hz) 100k –5 GAIN (dB) 1M 100M

135859 G18

±15V ±2.5V TA = 25°C AV = –1 RF = RG = 2k ±5V Gain Bandwidth and Phase Margin vs Temperature Output Impedance vs Frequency Gain Bandwidth and Phase Margin vs Supply Voltage Frequency Response vs Capacitive Load Frequency Response vs Supply Voltage (A V = 1) Frequency Response vs Supply Voltage (A V = –1) Settling Time vs Output Step (Noninverting) Output Short-Circuit Current vs Temperature Settling Time vs Output Step (Inverting) TYPICAL PERFOR A CE CHARACTERISTICS UW

FREQUENCY (Hz) 10k –10 GAIN (dB) 100k 100M

135859 G14

PHASE (DEG) 120 100 VS = ±15V VS = ±5V VS = ±5V GAIN VS = ±15V PHASE TA = 25°C AV = –1 RF = RG = 2k FREQUENCY (Hz) POWER SUPPLY REJECTION RATIO (dB) 100 100k 1M1k 10k100 10M 100M

135859 G20

VS = ±15V TA = 25°C +PSRR –PSRR FREQUENCY (Hz) COMMON-MODE REJECTION RATIO (dB) 120 100 1k 100M 10M1M100k10k

135859 G21

VS = ±15V TA = 25°C SUPPLY VOLTAGE (±V) SLEW RATE (V/µs) 200 1000 800 600 400 01 5 105

135859 G22

TA = 25°C AV = –1 RF = RG = 2k SR = SR+ + SR– TEMPERATURE (°C) SLEW RATE (V/µs) 100 600 500 200 300 400 –50 –25 25 100 125 50 750

135859 G23

VS = ± 5V VS = ±15V SR+ + SR– AV = –2 INPUT LEVEL (VP-P) SLEW RATE (V/µs) 200 300 100 1000 900 800 700 400 600 500 0 8 16 20 12421 0 1 8 146

135859 G24

TA = 25°C VS = ±15V AV = –1 RF = RG = 2k SR = SR+ + SR– FREQUENCY (Hz) 0.0001TOTAL HARMONIC DISTORTION (%) 0.01 100 100k

135859 G25

0.001 10k AV = –1 AV = 1 TA = 25°C VO = 3VRMS RL = 2k FREQUENCY (Hz) 100k 1M OUTPUT VOLTAGE (VP-P) 10M

135859 G26

AV = –1 AV = 1 VS = ±15V RL = 2k AV = 1, 1% MAX DISTORTION AV = –1, 2% MAX DISTORTION FREQUENCY (Hz) 100k 1M OUTPUT VOLTAGE (VP-P) 10M

135859 G27

8 AV = –1

AV = 1 VS = ±5V RL = 2k 2% MAX DISTORTION Slew Rate vs Input Level Total Harmonic Distortion vs Frequency Undistorted Output Swing vs Frequency (±15V) Undistorted Output Swing vs Frequency (±5V) Slew Rate vs Supply Voltage Slew Rate vs Temperature Gain and Phase vs Frequency Common Mode Rejection Ratio vs Frequency Power Supply Rejection Ratio vs Frequency TYPICAL PERFOR A CE CHARACTERISTICS UW

FREQUENCY (Hz) 100k 200k 400k –90 –80 –70 –60 –50 –40HARMONIC DISTORTION (dB) –30 10M

135859 G28

VS = ±15V VO = 2VP-P RL = 2k AV = 2 3RD HARMONIC 2ND HARMONIC

135859 G29

FREQUENCY (Hz) 100k –120 CROSSTALK (dB) –40 1M 100M 10M –50 –60 –70 –80 –90 –100 –110 TA = 25°C VIN = 0dBm RL = 500Ω AV = 1 CAPACITIVE LOAD (F) 10p OVERSHOOT (%) 100

135859 G30

1000p 0.01 µ 100p 0.1 µ AV = 1 AV = –1 TA = 25°C VS = ±15V Small-Signal Transient (AV = 1) Small-Signal Transient V = –1) Small-Signal Transient V = –1, CL = 1000pF) Large-Signal Transient V = 1, CL = 10,000pF) Large-Signal Transient V = –1) Large-Signal Transient V = 1) 2nd and 3rd Harmonic Distortion vs Frequency Capacitive Load HandlingCrosstalk vs Frequency TYPICAL PERFOR A CE CHARACTERISTICS UW

135859 G31 135859 G32

135859 G36135859 G35

135859 G33

135859 G34

Layout and Passive Components The LT1358/LT1359 amplifiers are easy to use and toler- ant of less than ideal layouts. For maximum performance (for example, fast 0.01% settling) use a ground plane, short lead lengths, and RF-quality bypass capacitors (0.01µF to 0.1µF). For high drive current applications use low ESR bypass capacitors (1µF to 10µF tantalum). The parallel combination of the feedback resistor and gain setting resistor on the inverting input combine with the input capacitance to form a pole which can cause peaking or oscillations. If feedback resistors greater than 5k are used, a parallel capacitor of value C F > RG x CIN / RF should be used to cancel the input pole and optimize dynamic performance. For unity-gain applications where a large feedback resistor is used, C F should be greater than or equal to CIN. Capacitive Loading The LT1358/LT1359 are stable with any capacitive load. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and in the transient response. Coaxial cable can be driven directly, but for best pulse fidelity a resistor of value equal to the characteristic impedance of the cable (i.e., 75Ω) should be placed in series with the output. The other end of the cable should be terminated with the same value resistor to ground. Input Considerations Each of the LT1358/LT1359 inputs is the base of an NPN and a PNP transistor whose base currents are of opposite polarity and provide first-order bias current cancellation. Because of variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current does not depend on NPN/PNP beta matching and is well controlled. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized. The inputs can withstand transient differential input volt- ages up to 10V without damage and need no clamping or source resistance for protection. Differential inputs, how- ever, generate large supply currents (tens of mA) as required for high slew rates. If the device is used with sustained differential inputs, the average supply current will increase, excessive power dissipation will result and the part may be damaged. The part should not be used as a comparator, peak detector or other open-loop application with large, sustained differential inputs . Under normal, closed-loop operation, an increase of power dissipation is only noticeable in applications with large slewing outputs and is proportional to the magnitude of the differential input voltage and the percent of the time that the inputs are apart. Measure the average supply current for the application in order to calculate the power dissipation. APPLICATIO S I FOR ATIOWU UU

The LT1358/LT1359 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic. The inputs are buffered by complementary NPN and PNP emitter followers which drive a 500Ω resistor. The input voltage appears across the resistor generating currents which are mirrored into the high impedance node. Comple- mentary followers form an output stage which buffers the gain node from the load. The bandwidth is set by the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current available to charge the gain node capacitance. This current is the differential input voltage divided by R1, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 10V output step in a gain of 10 has only a 1V input step, whereas the same output step in unity gain has a 10 times greater input step. The curve of Slew Rate vs Input Level illustrates this relationship. The LT1358/LT1359 are tested for slew rate in a gain of –2 so higher slew rates can be expected in gains of 1 and –1, and lower slew rates in higher gain configurations. The RC network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. When driving a capacitive load (or a low value resistive load) the network is incompletely bootstrapped and adds to the compensa- tion at the high impedance node. The added capacitance slows down the amplifier which improves the phase margin by moving the unity-gain frequency away from the pole formed by the output impedance and the capacitive load. The zero created by the RC combination adds phase to ensure that even for very large load capacitances, the total phase lag can never exceed 180 degrees (zero phase margin) and the amplifier remains stable. Power Dissipation The LT1358/LT1359 combine high speed and large output drive in small packages. Because of the wide supply voltage range, it is possible to exceed the maximum junction temperature under certain conditions. Maximum junction temperature (T J) is calculated from the ambient temperature (TA) and power dissipation (PD) as follows: LT1358N8: T J = TA + (PD x 130°C/W) LT1358S8: T J = TA + (PD x 190°C/W) LT1359N: T J = TA + (PD x 110°C/W) LT1359S: T J = TA + (PD x 150°C/W) LT1359S14: TJ = TA + (PD x 160°C/W) Worst case power dissipation occurs at the maximum supply current and when the output voltage is at 1/2 of either supply voltage (or the maximum swing if less than 1/2 supply voltage). For each amplifier P DMAX is: PDMAX = (V+ – V–)(ISMAX) + (V+/2)2/RL Example: LT1358 in S8 at 70°C, VS = ±15V, RL = 500Ω PDMAX = (30V)(2.9mA) + (7.5V)2/500Ω = 200mW TJMAX = 70°C + (2 x 200mW)(190°C/W) = 146°C APPLICATIO S I FOR ATIOWU UU

135859 SS01

+IN –IN 500Ω CC RC C SCHE ATIC WWSI PLIFIED

0.100 (2.54) BSC 0.065 (1.651) TYP 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.020 (0.508) MIN0.018 ± 0.003 (0.457 ± 0.076) 0.125 (3.175) MIN 12 3 4 87 6 5 0.255 ± 0.015* (6.477 ± 0.381) 0.400* (10.160) MAX 0.009 – 0.015 (0.229 – 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.325 +0.035 –0.015 +0.889 –0.3818.255() *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) N14 1098 0.020 (0.508) MIN 0.125 (3.175) MIN 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) 0.065 (1.651) TYP 0.018 ± 0.003 (2.54) BSC 0.005 (0.125) MIN 0.255 ± 0.015* (6.477 ± 0.381) 0.770* (19.558) MAX 31 2 4 5 6 7 891011121314 0.009 – 0.015 (0.229 – 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.325 +0.035 –0.015 +0.889 –0.3818.255() *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) UPACKAGE DESCRIPTIO 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) N Package 14-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) Dimension in inches (millimeters) unless otherwise noted.

0.016 – 0.050 (0.406 – 1.270) 0.010 – 0.020 0°– 8° TYP 0.008 – 0.010 (0.203 – 0.254) SO8 1298 0.053 – 0.069 (1.346 – 1.752) 0.014 – 0.019 (0.355 – 0.483) TYP 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC 1 2 3 4 0.150 – 0.157** (3.810 – 3.988) 8 7 6 5 0.189 – 0.197* (4.801 – 5.004) 0.228 – 0.244 (5.791 – 6.197) DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE * DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.016 – 0.050 (0.406 – 1.270) 0.010 – 0.020 0° – 8° TYP 0.008 – 0.010 (0.203 – 0.254) 1 2 3 4 5 6 7 8 0.150 – 0.157** (3.810 – 3.988) 16 15 14 13 0.386 – 0.394* (9.804 – 10.008) 0.228 – 0.244 (5.791 – 6.197) 12 11 10 9 S16 1098 0.053 – 0.069 (1.346 – 1.752) 0.014 – 0.019 (0.355 – 0.483) TYP 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE * DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE UPACKAGE DESCRIPTIO Dimension in inches (millimeters) unless otherwise noted. S Package 16-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. UPACKAGE DESCRIPTIO N 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 14 13 .337 – .344 (8.560 – 8.738) NOTE 3 .228 – .244 (5.791 – 6.197) 12 11 10 9 5 6 7 N/2 .016 – .050 (0.406 – 1.270) .010 – .020 0° – 8° TYP .008 – .010 (0.203 – 0.254) S14 0502 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .245 MIN N

123 N / 2

.160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) S Package 14-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) Dimension in inches (millimeters) unless otherwise noted.

© LINEAR TECHNOLOGY CORPORATION 2005 LT/LT 1005 REV B • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com PART NUMBER DESCRIPTION COMMENTS LT1357 25MHz, 600V/ µs Op Amp Single Version of LT1358/LT1359 LT1361/LT1362 Dual and Quad 50MHz, 800V/ µs Op Amps Faster Version of LT1358/LT1359, V OS = 1mV, IS = 4mA/Amplifier LT1355/LT1356 Dual and Quad 12MHz, 400V/ µs Op Amps Lower Power Version of LT1358/LT1359, V OS = 0.8mV, IS = 1mA/Amplifier LT1812/LT1813/ Single/Dual/Quad 100MHz, 750V/ µs Op Amps 3.6mA/Amplifier, SOT-23, MSOP-8 and SSOP-16 Packages LT1814 RELATED PARTS

135859 TA03

TRIM R1 FOR COMMON-MODE REJECTION BW = 250kHz 20k 432Ω 20k V OUT + 1/2 LT1358 LT1358

135859 TA04

2.61k 5.11k 47pF 3.4k 100pF 1000pF VOUT 2.61k 5.62k3.4k 330pF LT1358 LT1358 TYPICAL APPLICATIO SU Instrumentation Amplifier 200kHz, 4th Order Butterworth Filter A R R R R R R RR RV =+ + ⎛ ⎠⎟ + +⎡ ⎦⎥=4 3 1 1 5 1044