LT1807

LT1806/LT1807 - 325MHz, Single/Dual, Rail-to-Rail Input and Output, Low Distortion, Low Noise Precision Op Amps

Document overview

• Manufacturer or author: Linear Technology Corporation
• PDF pages: 28

Technical content

DESCRIPTION

325MHz, Single/Dual, Rail-to-Rail Input and Output, Low Distortion, Low Noise Precision Op Amps The L T®1806/L T1807 are single/dual low noise rail-to-rail input and output unity-gain stable op amps that feature a 325MHz gain-bandwidth product, a 140V/μs slew rate and a 85mA output current. They are optimized for low voltage, high performance signal conditioning systems. The L T1806/L T1807 have a very low distortion of – 80dBc at 5MHz, a low input referred noise voltage of 3.5nV/√Hz and a maximum offset voltage of 550μV that allows them to be used in high performance data acquisition systems. The L T1806/L T1807 have an input range that includes both supply rails and an output that swings within 20mV of either supply rail to maximize the signal dynamic range in low supply applications. The L T1806/L T1807 maintain their performance for supplies from 2.5V to 12.6V and are specifi ed at 3V, 5V and ±5V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output. The L T1806 is available in an 8-pin SO package with the standard op amp pinout and a 6-pin TSOT-23 package. The L T1807 features the standard dual op amp pinout and is available in 8-pin SO and MSOP packages.These devices can be used as plug-in replacements for many op amps to improve input/output range and performance.

FEATURES

APPLICATIONS

n Low Voltage, High Frequency Signal Processing n Driving A/D Converters n Rail-to-Rail Buffer Amplifi ers n Active Filters n Video Line Driver n Gain-Bandwidth Product: 325MHz n Slew Rate: 140V/μs n Wide Supply Range: 2.5V to 12.6V n Large Output Current: 85mA n Low Distortion, 5MHz: –80dBc n Low Voltage Noise: 3.5nV/√ Hz n Input Common Mode Range Includes Both Rails n Output Swings Rail-to-Rail n Input Offset Voltage (Rail-to-Rail): 550μV Max n Common Mode Rejection: 106dB Typ n Power Supply Rejection: 105dB Typ n Unity-Gain Stable n Power Down Pin (L T1806) n Operating Temperature Range: – 40°C to 85°C n Single in SO-8 and 6-Pin Low Profi le (1mm) ThinSOT™ Packages n Dual in SO-8 and 8-Pin MSOP Packages 1/2 L T1807 909Ω 49.9Ω 49.9Ω 100Ω VIN 100Ω C1 5.6pF C2 5.6pF 1/2 L T1807 470pF LT C®1420 PGA GAIN = 1 VREF = 4.096V

12 BITS

+AVIN –5V

18067 TA01

–AVIN Gain of 20 Differential A/D Driver FREQUENCY (MHz) –120 AMPLITUDE (dB) –100 –80 –60 –40 –20 1234

18067 TA02

VS = p5V AV = 20 fSAMPLE = 10Msps fIN = 1.4086MHz SFDR = 83dB NONAVERAGED V IN = 200mVP-P

4096 Point FFT Response

L, L T , L TC, L TM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

Operating Temperature Range (Note 4) ...– 40°C to 85°C (Note 1) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE L T1806CS6#PBF L T1806CS6#TRPBF L TNK 6-Lead Plastic TSOT-23 0°C to 70°C L T1806IS6#PBF L T1806IS6#TRPBF L TNL 6-Lead Plastic TSOT-23 –40°C to 85°C L T1806CS8#PBF L T1806CS8#TRPBF 1806 8-Lead Plastic SO 0°C to 70°C L T1806IS8#PBF L T1806IS8#TRPBF 1806I 8-Lead Plastic SO –40°C to 85°C L T1807CMS8#PBF L T1807CMS8#TRPBF L TTT 8-Lead Plastic MSOP 0°C to 70°C L T1807IMS8#PBF L T1807IMS8#TRPBF L TTV 8-Lead Plastic MSOP –40°C to 85°C L T1807CS8#PBF L T1807CS8#TRPBF 1807 8-Lead Plastic SO 0°C to 70°C L T1807IS8#PBF L T1807IS8#TRPBF 1807I 8-Lead Plastic SO –40°C to 85°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. Consult L TC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/ OUT 1 V– 2 +IN 3 6 V+

5 SHDN

4 –IN TOP VIEW S6 PACKAGE 6-LEAD PLASTIC TSOT-23 TJMAX = 150°C, θJA = 160°C/W (Note 9) TOP VIEW NC OUT NC SHDN –IN +IN V S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 100°C/W (Note 9) OUT A –IN A +IN A V V OUT B –IN B +IN B TOP VIEW MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 135°C/W (Note 9) TOP VIEW OUT B –IN B +IN B OUT A –IN A +IN A V S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 100°C/W (Note 9) PIN CONFIGURATION Specifi ed Temperature Range (Note 5) ....– 40°C to 85°C

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ VCM = V– VCM = V+ (LT1806 SOT-23) VCM = V– (LT1806 SOT-23) 100 100 100 100 550 550 700 700 μV μV μV μV ΔV OS Input Offset Voltage Shift V CM = V – to V+ VCM = V – to V+ (LT1806 SOT-23) 100 550 700 μV μV Input Offset Voltage Match (Channel-to-Channel) (Note 10) VCM = V – to V+ 200 1000 μV IB Input Bias Current V CM = V+ VCM = V – + 0.2V –13 4μ A μA ΔIB Input Bias Current Shift V CM = V – to V+ 61 7 μ A Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V+ VCM = V – + 0.2V 0.03 0.05 1.2 3.0 μA μA IOS Input Offset Current V CM = V+ VCM = V – + 0.2V 0.03 0.05 0.6 1.5 μA μA ΔIOS Input Offset Current Shift V CM = V – + 0.2V to V+ 0.08 2.1 μA Input Noise Voltage 0.1Hz to 10Hz 800 nV P-P en Input Noise Voltage Density f = 10kHz 3.5 nV/√ Hz in Input Noise Current Density f = 10kHz 1.5 pA/√ Hz CIN Input Capacitance 2p F AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100 to VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 220 150 V/mV V/mV V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ 100 dB dB CMRR Match (Channel-to-Channel) (Note 10) V S = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ 100 dB dB Input Common Mode Range V – V+ V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V 90 105 dB PSRR Match (Channel-to-Channel) (Note 10) V S = 2.5V to 10V, VCM = 0V 84 105 dB Minimum Supply Voltage (Note 6) 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load ISINK = 5mA ISINK = 25mA 170 130 375 mV mV mV V OH Output Voltage Swing High (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA 350 180 650 mV mV mV TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.

The l denotes the specifi cations which apply over the 0°C < TA < 70°C temperature range. V S = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ISC Short-Circuit Current V S = 5V VS = 3V ±35 ±30 ±85 ±65 mA mA IS Supply Current per Amplifi er 91 3 m A Disable Supply Current V S = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V 0.40 0.22 0.9 0.7 mA mA ISHDN SHDN Pin Current V S = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V 150 100 350 300 μA μA Shutdown Output Leakage Current V SHDN = 0.3V 0.1 75 μA VL SHDN Pin Input Voltage LOW 0.3 V VH SHDN Pin Input Voltage HIGH V + – 0.5 V tON Turn-On Time V SHDN = 0.3V to 4.5V, RL = 100Ω 80 ns tOFF Turn-Off Time V SHDN = 4.5V to 0.3V, RL = 100Ω 50 ns GBW Gain-Bandwidth Product Frequency = 6MHz 325 MHz SR Slew Rate V S = 5V, AV = –1, RL = 1k, VO = 4V 125 V/μs FPBW Full-Power Bandwidth V S = 5V, VOUT = 4VP-P 10 MHz HD Harmonic Distortion V S = 5V, AV = 1, RL = 1k, VO = 2VP-P, fC = 5MHz –78 dBc tS Settling Time 0.01%, V S = 5V, VSTEP = 2V, AV = 1, RL = 1k 60 ns ΔG Differential Gain (NTSC) V S = 5V, AV = 2, RL = 150 0.015 % Δθ Differential Phase (NTSC) V S = 5V, AV = 2, RL = 150 0.05 Deg SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ VCM = V– VCM = V+ (LT1806 SOT-23) VCM = V– (LT1806 SOT-23) l l l l 200 200 200 200 700 700 850 850 μV μV μV μV V OS TC Input Offset Voltage Drift (Note 8) V CM = V+ VCM = V– l l 1.5 1.5 μV/°C μV/°C ΔVOS Input Offset Voltage Shift V CM = V– to V+ VCM = V– to V+ (L T1806 SOT-23) l l 100 100 700 850 μV μV Input Offset Voltage Match (Channel-to-Channel) (Note 10) VCM = V–, VCM = V+ l 300 1200 μV IB Input Bias Current V CM = V+ – 0.2V VCM = V– + 0.4V l l –15 5μ A μA ΔIB Input Bias Current Shift V CM = V– + 0.4V to V+ – 0.2V l 62 0 μ A

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the 0°C < TA < 70°C temperature range. V S = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V+ – 0.2V VCM = V – + 0.4V l l 0.03 0.05 1.5 3.5 μA μA IOS Input Offset Current V CM = V+ – 0.2V VCM = V – + 0.4V l l 0.03 0.05 0.75 1.80 μA μA ΔIOS Input Offset Current Shift V CM = V – + 0.4V to V+ – 0.2V l 0.08 2.55 μA AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 l l l 7.5 175 140 V/mV V/mV V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ l l dB dB CMRR Match (Channel-to-Channel) (Note 10) V S = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ l l dB dB Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V l 88 105 dB PSRR Match (Channel-to-Channel) (Note 10) V S = 2.5V to 10V, VCM = 0V l 82 105 dB Minimum Supply Voltage (Note 6) V CM = VO = 0.5V l 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load ISINK = 5mA ISINK = 25mA l l l 180 140 425 mV mV mV V OH Output Voltage Swing High (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA l l l 110 360 120 220 700 mV mV mV I SC Short-Circuit Current V S = 5V VS = 3V l l ±30 ±25 ±65 ±55 mA mA IS Supply Current per Amplifi er l 10 14 mA Disable Supply Current V S = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l 0.40 0.22 1.1 0.9 mA mA ISHDN SHDN Pin Current V S = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l 160 110 400 350 μA μA Shutdown Output Leakage Current V SHDN = 0.3V l 1μ A VL SHDN Pin Input Voltage Low l 0.3 V VH SHDN Pin Input Voltage High l V+ – 0.5 V tON Turn-On Time V SHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns tOFF Turn-Off Time V SHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns GBW Gain-Bandwidth Product Frequency = 6MHz l 300 MHz SR Slew Rate V S = 5V, AV = –1, RL= 1k, VO = 4V l 100 V/μs FPBW Full-Power Bandwidth V S = 5V, VO = 4VP-P l 8 MHz

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the –40°C < TA < 85°C temperature range. V S = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ VCM = V– VCM = V+ (L T1806 SOT-23) VCM = V– (L T1806 SOT-23) l l l l 200 200 200 200 800 800 950 950 μV μV μV μV V OS TC Input Offset Voltage Drift (Note 8) V CM = V+ VCM = V – l l 1.5 1.5 μV/°C μV/°C ΔVOS Input Offset Voltage Shift V CM = V– to V+ VCM = V– to V+ (LT1806 SOT-23) l l 100 100 800 950 μV μV Input Offset Voltage Match (Channel-to-Channel) (Note 10) VCM = V –, VCM = V+ l 200 1400 μV IB Input Bias Current V CM = V+ – 0.2V VCM = V – + 0.4V l l –16 6μ A μA ΔIB Input Bias Current Shift V CM = V – + 0.4V to V+ – 0.2V l 62 2 μ A Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V+ – 0.2V VCM = V – + 0.4V l l 0.02 0.05 1.8 μA μA IOS Input Offset Current V CM = V+ – 0.2V VCM = V – + 0.4V l l 0.02 0.05 0.9 2.1 μA μA ΔIOS Input Offset Current Shift V CM = V – + 0.4V to V+ – 0.2V l 0.07 3 μA AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 l l l 140 100 V/mV V/mV V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ l l dB dB CMRR Match (Channel-to-Channel) (Note 10) V S = 5V, VCM = V – to V+ VS = 3V, VCM = V – to V+ l l dB dB Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V l 86 105 dB PSRR Match (Channel-to-Channel) (Note 10) V S = 2.5V to 10V, VCM = 0V l 80 105 dB Minimum Supply Voltage (Note 6) V CM = VO = 0.5V l 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load ISINK = 5mA ISINK = 20mA l l l 170 150 400 mV mV mV V OH Output Voltage Swing High (Note 7) No Load ISOURCE = 5mA ISOURCE = 20mA l l l 110 350 130 240 700 mV mV mV I SC Short-Circuit Current V S = 5V VS = 3V l l ±22 ±20 ±45 ±40 mA mA IS Supply Current per Amplifi er l 11 16 mA Disable Supply Current V S = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l 0.4 0.3 1.2 mA mA

TA = 25°C. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ VCM = V– VCM = V+ (L T1806 SOT-23) VCM = V– (L T1806 SOT-23) 100 100 100 100 700 700 750 750 μV μV μV μV ΔV OS Input Offset Voltage Shift V CM = V– to V+ VCM = V– to V+ (L T1806 SOT-23) 700 750 μV μV Input Offset Voltage Match (Channel-to-Channel) (Note 10) VCM = V–, VCM = V+ 200 1200 μV IB Input Bias Current V CM = V+ VCM = V– + 0.2V –14 5μ A μA ΔIB Input Bias Current Shift V CM = V– + 0.2V to V+ 61 9 μ A Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V+ VCM = V– + 0.2V 0.03 0.05 1.4 3.2 μA μA IOS Input Offset Current V CM = V+ VCM = V – + 0.2V 0.03 0.04 0.7 1.6 μA μA ΔIOS Input Offset Current Shift V CM = V – + 0.2V to V+ 0.07 2.3 μA Input Noise Voltage 0.1Hz to 10Hz 800 nVp-p en Input Noise Voltage Density f = 10kHz 3.5 nV/√ Hz in Input Noise Current Density f = 10kHz 1.5 pA/√ Hz CIN Input Capacitance f = 10kHz 2 pF AVOL Large-Signal Voltage Gain V O = –4V to 4V, RL = 1k VO = –2.5V to 2.5V, R L = 100Ω 100 300 V/mV V/mV ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the –40°C < TA < 85°C temperature range. V S = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ISHDN SHDN Pin Current V S = 5V, VSHDN = 0.3V VS = 3V, VSHDN = 0.3V l l 170 120 450 400 μA μA Shutdown Output Leakage Current V SHDN = 0.3V l 1.2 μA VL SHDN Pin Input Voltage Low l 0.3 V VH SHDN Pin Input Voltage High l V+ – 0.5 V tON Turn-On Time V SHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns tOFF Turn-Off Time V SHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns GBW Gain-Bandwidth Product Frequency = 6MHz l 250 MHz SR Slew Rate V S = 5V, AV = –1, RL= 1k, VO = 4V l 80 V/μs FPBW Full-Power Bandwidth V S = 5V, VO = 4VP-P l 6 MHz

TA = 25°C. VS = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMRR Common Mode Rejection Ratio V CM = V – to V+ 83 106 dB CMRR Match (Channel-to-Channel) (Note 10) V CM = V – to V+ 77 106 dB Input Common Mode Range V – V+ V PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V 90 105 dB PSRR Match (Channel-to-Channel) (Note 10) V + = 2.5V to 10V, V – = 0V 84 105 dB VOL Output Voltage Swing Low (Note 7) No Load ISINK = 5mA ISINK = 25mA 180 140 450 mV mV mV V OH Output Voltage Swing High (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA 360 200 700 mV mV mV I SC Short-Circuit Current ±40 ±85 mA IS Supply Current per Amplifi er 11 16 mA Disable Supply Current V SHDN = 0.3V 0.4 1.2 mA ISHDN SHDN Pin Current V SHDN = 0.3V 150 350 μA Shutdown Output Leakage Current V SHDN = 0.3V 0.3 75 μA VL SHDN Pin Input Voltage Low 0.3 V VH SHDN Pin Input Voltage High V + – 0.5 V tON Turn-On Time V SHDN = 0.3V to 4.5V, RL = 100Ω 80 ns tOFF Turn-Off Time V SHDN = 4.5V to 0.3V, RL = 100Ω 50 ns GBW Gain-Bandwidth Product Frequency = 6MHz 170 325 MHz SR Slew Rate A V = –1, RL = 1k, VO = ±4V, Measured at VO = ±3V 70 140 V/μs FPBW Full-Power Bandwidth V O = 8VP-P 5.5 MHz HD Harmonic Distortion A V = 1, RL = 1k, VO = 2VP-P, fC = 5MHz – 80 dBc tS Settling Time 0.01%, V STEP = 8V, AV = 1, RL = 1k 120 ns ΔG Differential Gain (NTSC) A V = 2, RL = 150 0.01 % Δθ Differential Phase (NTSC) A V = 2, RL = 150 0.01 Deg

The l denotes the specifi cations which apply over the 0°C < TA < 70°C temperature range. V S = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ VCM = V – VCM = V+ (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) l l l l 200 200 200 200 800 800 900 900 μV μV μV μV V OS TC Input Offset Voltage Drift (Note 8) V CM = V+ VCM = V – l l 1.5 1.5 μV/°C μV/°C ΔVOS Input Offset Voltage Shift V CM = V – to V+ VCM = V – to V+ (LT1806 SOT-23) l l 100 100 800 900 μV μV Input Offset Voltage Match (Channel-to-Channel) (Note 10) VCM = V –, VCM = V+ l 300 1400 μV IB Input Bias Current V CM = V+ – 0.2V VCM = V – + 0.4V l l –15 6μ A μA ΔIB Input Bias Current Shift V CM = V – + 0.4V to V+ – 0.2V l 72 1 μ A Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V+ – 0.2V VCM = V – + 0.4V l l 0.03 0.04 1.8 3.8 μA μA IOS Input Offset Current V CM = V+ – 0.2V VCM = V – + 0.4V l l 0.03 0.04 0.9 1.9 μA μA ΔIOS Input Offset Current Shift V CM = V – + 0.4V to V+ – 0.2V l 0.07 2.8 μA AVOL Large-Signal Voltage Gain V O = –4V to 4V, R L = 1k VO = –2.5V to 2.5V, RL = 100Ω l l 250 V/mV V/mV CMRR Common Mode Rejection Ratio V CM = V – to V+ l 81 100 dB CMRR Match (Channel-to-Channel) (Note 10) V CM = V – to V+ l 75 100 dB Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V l 88 105 dB PSRR Match (Channel-to-Channel) (Note 10) V + = 2.5V to 10V, V – = 0V l 82 106 dB VOL Output Voltage Swing Low (Note 7) No Load ISINK = 5mA ISINK = 25mA l l l 185 160 500 mV mV mV V OH Output Voltage Swing High (Note 7) No Load ISOURCE = 5mA ISOURCE = 25mA l l l 110 360 140 240 750 mV mV mV I SC Short-Circuit Current l ±35 ±75 mA IS Supply Current per Amplifi er l 14 20 mA Disable Supply Current V SHDN = 0.3V l 0.4 1.4 mA ISHDN SHDN Pin Current V SHDN = 0.3V l 160 400 μA Shutdown Output Leakage Current V SHDN = 0.3V l 1μ A VL SHDN Pin Input Voltage Low l 0.3 V VH SHDN Pin Input Voltage High l V+ – 0.5 V tON Turn-On Time V SHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns tOFF Turn-Off Time V SHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns GBW Gain-Bandwidth Product Frequency = 6MHz l 150 300 MHz SR Slew Rate AV = –1, RL = 1k, VO = ±4V, Measure at VO = ±3V l 60 120 V/μs FPBW Full-Power Bandwidth V O = 8VP-P l 4.5 MHz

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the −40°C < TA < 85°C temperature range. V S = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ VCM = V – VCM = V+ (LT1806 SOT-23) VCM = V – (LT1806 SOT-23) l l l l 200 200 200 200 900 900 975 975 μV μV μV μV V OS TC Input Offset Voltage Drift (Note 8) V CM = V+ VCM = V – l l 1.5 1.5 μV/°C μV/°C ΔVOS Input Offset Voltage Shift V CM = V – to V+ VCM = V – to V+ (LT1806 SOT-23) l l 100 100 900 975 μV μV Input Offset Voltage Match (Channel-to-Channel) (Note 10) VCM = V –, VCM = V+ l 300 1600 μV IB Input Bias Current V CM = V+ – 0.2V VCM = V – + 0.4V l l –16 1.2 7μ A μA ΔIB Input Bias Current Shift V CM = V – + 0.4V to V+ – 0.2V l 62 3 μ A Input Bias Current Match (Channel-to-Channel) (Note 10) VCM = V+ – 0.2V VCM = V – + 0.4V l l 0.03 0.04 4.5 μA μA IOS Input Offset Current V CM = V+ – 0.2V VCM = V – + 0.4V l l 0.03 0.04 1.0 2.2 μA μA ΔIOS Input Offset Current Shift V CM = V – + 0.4V to V+ – 0.2V l 0.07 3.2 μA AVOL Large-Signal Voltage Gain V O = –4V to 4V, RL = 1k VO = –2V to 2V, RL =100Ω l l 175 V/mV V/mV CMRR Common Mode Rejection Ratio V CM = V – to V+ l 80 100 dB CMRR Match (Channel-to-Channel) (Note 10) V CM = V – to V+ l 74 100 dB Input Common Mode Range l V– V+ V PSRR Power Supply Rejection Ratio V + = 2.5V to 10V, V – = 0V l 86 105 dB PSRR Match (Channel-to-Channel) (Note 10) l 80 105 dB VOL Output Voltage Swing Low (Note 7) No Load ISINK = 5mA ISINK = 20mA l l l 200 100 170 500 mV mV mV V OH Output Voltage Swing High (Note 7) No Load ISOURCE = 5mA ISOURCE = 20mA l l l 115 360 160 260 700 mV mV mV I SC Short-Circuit Current l ±25 ±55 mA IS Supply Current per Amplifi er l 15 22 mA Disable Supply Current V SHDN = 0.3V l 0.45 1.5 mA ISHDN SHDN Pin Current V SHDN = 0.3V l 170 400 μA Shutdown Output Leakage Current V SHDN = 0.3V l 1.2 μA VL SHDN Pin Input Voltage Low l 0.3 V VH SHDN Pin Input Voltage High l V+ – 0.5 V tON Turn-On Time V SHDN = 0.3V to 4.5V, RL = 100Ω l 80 ns

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. This parameter is guaranteed to meet specifi ed performance through design and/or characterization. It is not 100% tested. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefi nitely. Note 4: The L T1806C/L T1806I and L T1807C/L T1807I are guaranteed functional over the temperature range of –40°C and 85°C. Note 5: The L T1806C/L T1807C are guaranteed to meet specifi ed performance from 0°C to 70°C. The L T1806C/L T1807C are designed, characterized and expected to meet specifi ed performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The L T1806I/ L T1807I are guaranteed to meet specifi ed performance from –40°C to 85°C. Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 7: Output voltage swings are measured between the output and power supply rails. Note 8: This parameter is not 100% tested. Note 9: Thermal resistance varies depending upon the amount of PC board metal attached to the V – pin of the device. θJA is specifi ed for a certain amount of 2oz copper metal trace connecting to the V– pin as described in the thermal resistance tables in the Applications Information section. Note 10: Matching parameters are the difference between the two amplifi ers of the L T1807. ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the −40°C < TA < 85°C temperature range. V S = ±5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tOFF Turn-Off Time V SHDN = 4.5V to 0.3V, RL = 100Ω l 50 ns GBW Gain-Bandwidth Product Frequency = 6MHz l 125 290 MHz SR Slew Rate AV = –1, RL = 1k, VO = ±4V, Measure at VO = ±3V l 50 100 V/μs FPBW Full-Power Bandwidth V O = 8VP-P l 4 MHz TYPICAL PERFORMANCE CHARACTERISTICS INPUT OFFSET VOL TAGE (μV) –500 PERCENT OF UNITS (%) 300

18067 G01

–300 –100 100 500 VS = 5V, 0V VCM = 0V INPUT OFFSET VOLTAGE (μV) –500 PERCENT OF UNITS (%) 300

18067 G02

–300 –100 100 500 VS = 5V, 0V VCM = 5V INPUT OFFSET VOLTAGE (μV) –500 PERCENT OF UNITS (%) 300

18067 G03

–300 –100 100 500 VS = 5V, 0V VOS Distribution, VCM = 0V (PNP Stage) VOS Distribution, VCM = 5V (NPN Stage) ΔVOS Shift for VCM = 0V to 5V

TOTAL SUPPLY VOLTAGE (V) 1.0 –1.0 CHANGE IN OFFSET VOLTAGE (mV)–0.8 –0.4 –0.2 1.0 0.4 2.0 3.0 3.5

18067 G10

–0.6 0.6 0.8 0.2 TA = 125°C TA = –55°C TA = 25°C POWER SUPPLY VOLTAGE (pV) 1.5 OUTPUT SHORT-CIRCUIT CURRENT (mA) –40 100 120 2.5 3.5 4.0

18067 G11

–80 –60 –100 –20 2.0 3.0 4.5 5.0 TA = –55°C TA = –55°C TA = 125°C TA = 25°C “SINKING” “SOURCING” TA = 125°C TA = 25°C SHDN PIN VOLTAGE (V) SUPPLY CURRENT (mA) 2 4 5

18067 G12

TA = 125°C TA = –55°C TA = 25°C VS = 5V, 0V Minimum Supply Voltage Output Short-Circuit Current vs Power Supply Voltage Supply Current vs SHDN Pin Voltage TYPICAL PERFORMANCE CHARACTERISTICS TOTAL SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA)

18067 G04

TA = 125°C TA = 25°C TA = –55°C INPUT COMMON MODE VOLTAGE (V) OFFSET VOLTAGE (μV) 100 300 500

18067 G05

–100 –300 200 400 –200 –400 –500 1 2 3 5 TA = 125°C TA = –55°C TA = 25°C VS = 5V, 0V TYPICAL PART COMMON MODE VOLTAGE (V) –10 INPUT BIAS CURRENT (μA) 0123

18067 G06

TA = 125°C TA = 25°C TA = –55°C VS = 5V, 0V TA = 125°C TA = 25°C TA = –55°C Supply Current per Amp vs Supply Voltage Offset Voltage vs Input Common Mode Input Bias Current vs Common Mode Voltage TEMPERATURE (°C) –50 INPUT BIAS (μA) –20 10 25 85

18067 G07

–35 –5 40 55 70 NPN ACTIVE VS = 5V, 0V VCM = 5V PNP ACTIVE VS = 5V, 0V VCM = 0V LOAD CURRENT (mA) 0.01

0.001 OUTPUT SATURATION VOLTAGE (V)

0.1 0.1 1 10 100

18067 G08

0.01 VS = p5V TA = 125°C TA = 25°CTA = –55°C LOAD CURRENT (mA) 0.01 0.1 1 1000.1 10

18067 G09

0.01 TA = 125°C TA = –55°C TA = 25°C VS = p5V Input Bias Current vs Temperature Output Saturation Voltage vs Load Current (Output Low) Output Saturation Voltage vs Load Current (Output High)

TYPICAL PERFORMANCE CHARACTERISTICS SHDN PIN VOLTAGE (V) SHDN PIN CURRENT (μA) –60 –20

18067 G13

–100 –140 –80 –40 –120 –160 –180 1 2 3 5 TA = 125°C TA = –55°C TA = 25°C VS = 5V, 0V OUTPUT VOLTAGE (V) –500 INPUT VOLTAGE (μV) –300 –100 100 0.5 1.0 1.5 2.0

18067 G14

2.5 300 500 –400 –200 200 400 3.0 RL = 1k RL = 100Ω VS = 3V, 0V RL TO GND OUTPUT VOLTAGE (V) –500 INPUT VOLTAGE (μV) –300 –100 100 0.5 1.0 1.5 2.0

18067 G15

2.5 300 500 –400 –200 200 400 RL = 1k RL = 100Ω VS = 5V, 0V RL TO GND SHDN Pin Current vs SHDN Pin Voltage Open-Loop Gain Open-Loop Gain OUTPUT VOLTAGE (V) –500 INPUT VOLTAGE (μV) –300 –100 100 –4 –3 –2 –1

18067 G16

–400 –200 200 400 12345 RL = 1k RL = 100Ω VS = p5V OUTPUT CURRENT (mA) –100 –2.5 OFFSET VOLTAGE (mV) –1.5 –0.5 0.5 –80 –60 –40 –20

18067 G17

1.5 2.5 –2.0 –1.0 1.0 2.0 20 40 60 80 100 TA = 125°C TA = –55°C TA = 25°C VS = p5V TIME AFTER POWER-UP (SEC) OFFSET VOLTAGE DRIFT (μV) 16014012010080

18067 G18

VS = p5V VS = p2.5V VS = p1.5V Open-Loop Gain Offset Voltage vs Output Current Warm-Up Drift vs Time (L T1806S8) FREQUENCY (kHz) 0.1 1 10 100

18067 G19

NOISE VOLTAGE (nV/•Hz) VS = 5V, 0V NPN ACTIVE VCM = 4.5V PNP ACTIVE VCM = 2.5V FREQUENCY (kHz) 0.1 1 10 100 NOISE CURRENT (pA/•Hz) VS = 5V, 0V NPN ACTIVE VCM = 4.5V PNP ACTIVE V CM = 2.5V TIME (SEC) OUTPUT VOLTAGE (nV) 200 600 1000

18067 G21

–200 –600 400 800 –400 –800 –1000 21 43 67 95 10 Input Noise Voltage vs Frequency Input Noise Current vs Frequency 0.1Hz to 10Hz Output Voltage Noise

FREQUENCY (Hz) 100k

0.001 OUTPUT IMPEDANCE (Ω)

0.01 0.1 100 600 1M 10M 100M 500M

18067 G28

VS = 5V, 0V AV = 10 AV = 2 AV = 1 FREQUENCY (MHz) 0.01 COMMON MODE REJECTION RATIO (dB) 0.1 1 10 100 500

18067 G29

VS = 5V, 0V FREQUENCY (MHz) 0.001 POWER SUPPLY REJECTION RATIO (dB) 0.01 0.1 1 10 100

18067 G30

100 VS = 5V, 0V

TA = 25°C NEGATIVE SUPPLY POSITIVE SUPPLY Output Impedance vs Frequency Common Mode Rejection Ratio vs Frequency Power Supply Rejection Ratio vs Frequency TYPICAL PERFORMANCE CHARACTERISTICS TOTAL SUPPLY VOLTAGE (V) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG)

18067 G22

TA = 25°C PHASE MARGIN GAIN BANDWIDTH PRODUCT TEMPERATURE (°C) –55 GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 105

18067 G23

–15–35 255 65 85 12545 PHASE MARGIN VS = p5V PHASE MARGIN VS = 3V GBW PRODUCT VS = p5V GBW PRODUCT VS = 3V TEMPERATURE (°C) –55 SLEW RATE (μV/μs) 100 125 150 175 –35 –15 5 25

18067 G24

AV = –1 RF = RG = 1k RL = 1k VS = p5V VS = p2.5V Gain Bandwidth and Phase Margin vs Supply Voltage Gain Bandwidth and Phase Margin vs Temperature Slew Rate vs Temperature FREQUENCY (MHz) GAIN (dB) PHASE (DEG)40 0.1 10 100 500

18067 G25

–10 –20 –30 –45 180 225 –135 135 –90 –180 –225 PHASE VS = p5V GAIN VS = p5V GAIN VS = 3V PHASE VS = 3V CL = 5pF RL = 100Ω FREQUENCY (MHz) GAIN (dB) 0.1 10 100 500

18067 G26

–12 –18 –24 –36 CL = 10pF RL = 100Ω VS = 3V VS = p5V FREQUENCY (MHz) GAIN (dB) 0.1 10 100 500

18067 G27

CL = 10pF RL = 100Ω VS = p5V VS = 3V Gain and Phase vs Frequency Gain vs Frequency (A V = 1) Gain vs Frequency (AV = 2)

TYPICAL PERFORMANCE CHARACTERISTICS CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000

18067 G31

VS = 5V, 0V AV = 1 ROS = 10Ω ROS = 20Ω ROS = RL = 50Ω CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000

18067 G32

VS = 5V, 0V AV = 2 ROS = 10Ω ROS = 20Ω ROS = RL = 50Ω 20ns/DIV OUTPUT SETTLING RESOLUTION (2mV/DIV) INPUT SIGNAL GENERATION (2V/DIV)

18067 G33

VS = p5V VOUT = p4V RL = 500Ω t S = 120ns (SETTLING TIME) Series Output Resistor vs Capacitive Load Series Output Resistor vs Capacitive Load 0.01% Settling Time FREQUENCY (MHz) 0.3 –70DISTORTION (dBc) –60 –50 –40 11 0 3 0

18067 G34

–80 –90 –100 –110 AV = 1 VOUT = 2VP-P VS = p5V RL = 100Ω, 2ND RL = 100Ω, 3RD RL = 1k, 3RD RL = 1k, 2ND FREQUENCY (MHz) 0.3 –70DISTORTION (dBc) –60 –50 –40 11 0 3 0

18067 G35

–80 –90 –100 –110 AV = 1 VOUT = 2VP-P VS = 5V, 0V RL = 100Ω, 2ND RL = 100Ω, 3RD RL = 1k, 3RD RL = 1k, 2ND FREQUENCY (MHz) 0.3 –70DISTORTION (dBc) –60 –50 –40 11 0 3 0

18067 G36

–80 –90 –100 –120 –110 AV = 2 VOUT = 2VP-P VS = p5V RL = 100Ω, 2ND RL = 100Ω, 3RD RL = 1k, 3RD RL = 1k, 2ND Distortion vs Frequency Distortion vs Frequency Distortion vs Frequency FREQUENCY (MHz) 0.3 –70DISTORTION (dBc) –60 –50 –40 11 0 3 0

18067 G37

–80 –90 –100 –120 –110 AV = 2 VOUT = 2VP-P VS = 5V, 0V RL = 100Ω, 2ND RL = 100Ω, 3RD RL = 1k, 3RD RL = 1k, 2ND FREQUENCY (MHz) 0.1 4.3 OUTPUT VOLTAGE SWING (VP-P) 4.4 4.5 4.6 1 10 100

18067 G38

4.2 4.1 4.0 3.9 VS = 5V, 0V AV = –1 AV = Distortion vs Frequency Maximum Undistorted Output Signal vs Frequency

TYPICAL PERFORMANCE CHARACTERISTICS 40ns/DIV

18067 G39

VS = p5V FREQ = 1.92MHz A V = 1 RL = 1k ±5V Large-Signal Response 20ns/DIV 18067 G40 VS = p5V FREQ = 4.48MHz A V = 1 RL = 1k ±5V Small-Signal Response 20ns/DIV 18067 G41 0.5V VS = 5V , 0V FREQ = 5.29MHz A V = 1 RL = 1k 5V Large-Signal Response 10ns/DIV 18067 G42 VS = 5V , 0V AV = 1 RL = 1k 5V Small-Signal Response 100ns/DIV VIN 1V/DIV

18067 G43

VS = 5V , 0V AV = 2 RL = 1k VOUT 2V/DIV Output Overdriven Recovery 20ns/DIV 18067 G44 VSHDN 2V/DIV VS = 5V , 0V AV = 2 RL = 100Ω VOUT 2V/DIV Shutdown Response

ply. Figure 1 depicts a simplifi ed schematic of the amplifi er. mode range up to the positive supply.

18067 F01

Figure 1. L T1806 Simplifi ed Schematic Diagram

– pin is provided in Tables 1, 2 and 3. Table 1. L T1806 6-Lead SOT-23 Package Device is mounted on topside. Table 2. L T1806/L T1807 SO-8 Package Device is mounted on topside. Table 3. L T1807 8-Lead MSOP Package Device is mounted on topside.

The maximum ambient temperature that the part is allowed to operate is: T A = TJ – (PD(MAX) • 105°C/W) To operate the device at higher ambient temperature, connect more metal area to the V – pin to reduce the thermal resistance of the package as indicated in Table 2. Input Offset Voltage The offset voltage will change depending upon which input stage is active and the maximum offset voltage is guaranteed to less than 550μV. To maintain the precision characteristics of the amplifi er, the change of V OS over the entire input common mode range (CMRR) is limited to be less than 550μV on a single 5V and 3V supply. Input Bias Current The input bias current polarity depends on a given input common voltage at which the input stage is operating. When the PNP input stage is active, the input bias currents fl ow out of the input pins. When the NPN input stage is activated, the input bias current fl ows into the input pins. Because the input offset current is less than the input bias current, matching the source resistances at the input pins will reduce total offset error. Output The L T1806/L T1807 can deliver a large output current, so the short-circuit current limit is set around 85mA to prevent damage to the device. Attention must be paid to keep the junction temperature of the IC below the absolute maximum rating of 150°C (refer to the Power Dissipation section) when the output is continuously short circuited. The output of the amplifi er has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, unlimited current will fl ow through these diodes. If the current is transient and limited to one hundred milliamps or less, no damage to the device will occur. Overdrive Protection When the input voltage exceeds the power supplies, two pairs of crossing diodes D1 to D4 will prevent the output from reversing polarity. If the input voltage exceeds either power supply by 700mV, diode D1/D2 or D3/D4 will turn on to keep the output at the proper polarity. For the phase reversal protection to perform properly, the input current must be limited to less than 5mA. If the amplifi er is severely overdriven, an external resistor should be used to limit the overdrive current.

The L T1806/L T1807’s input stages are also protected against large differential input voltages of 1.4V or higher by a pair of back-to-back diodes, D5/D8, that prevent the emitter-base breakdown of the input transistors. The current in these diodes should be limited to less than 10mA when they are active. The worst-case differential input voltage usually occurs when the input is driven while the output is shorted to ground in a unity gain confi guration. In addition, the amplifi er is protected against ESD strikes up to 3kV on all pins by a pair of protection diodes, ESDD1 to ESDD6, on each pin that are connected to the power supplies as shown in Figure 1. Capacitive Load The L T1806/L T1807 are optimized for high bandwidth and low distortion applications. They can drive a capacitive load of about 20pF in a unity-gain confi guration, and more for higher gain. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscilla- tion. The feedback should still be taken from the output so that the resistor will isolate the capacitive load to ensure stability. Graphs on capacitive loads indicate the transient response of the amplifi er when driving the capacitive load with a specifi ed series resistor. Feedback Components When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. For instance, the L T1806/L T1807 in a noninverting gain of 2, set up with two 1k resistors and a capacitance of 3pF (part plus PC board) will probably ring in transient response. The pole is formed at 106MHz that will reduce phase margin by 34 degrees when the crossover frequency of the amplifi er is around 70MHz. A capacitor of 3pF or higher connected across the feedback resistor will eliminate any ringing or oscillation. SHDN Pin The L T1806 has a SHDN pin to reduce the supply current to less than 0.9mA. When the SHDN pin is pulled low, it will generate a signal to power down the device. If the pin is left unconnected, an internal pull-up resistor of 40k will keep the part fully operating as shown in Figure 1. The output will be high impedance during shutdown, and the turn-on and turn-off time is less than 100ns. Because the input is protected by a pair of back-to-back diodes, the input signal will feed through to the output during shutdown mode if the amplitude of signal between the inputs is larger than 1.4V.

be used since these components can add to distortion. driving L TC1420 at noninverting gain of 2 confi guration. Figure 2. Noninverting A/D Driver

18067 F02

Figure 3. 4096 Point FFT Response

18067 F03

peaking will vary upon the value of capacitor C4. Figure 4. 5V Single Supply Video Line Driver

18067 F04

Figure 5. Video Line Driver Frequency Response

18067 F05

of the amplifi ers as shown in Figure 6. Figure 6. Single 3V Supply, 4MHz, 4th Order Butterworth Filter

18067 F06

Figure 7. Filter Frequency Response

18067 F07

edge and the crystal capacitance (middle trace of Figure 9). sinusoidal oscillators are not immediately necessary. a good job of cleaning up and buffering the sine wave. Figure 8. L T1713 Comparator is Confi gured as a Series Resonant Crystal Oscillator.

8 SQUARE WAVE

18067 F08

18067 F09

will not be faced with the classical task of avoiding regions of nonoscillation versus clipping. Figure 9. Oscillator Waveforms with VS = 3V. Top T race is Comparator Output.

1.50 – 1.75 (NOTE 4)2.80 BSC 0.30 – 0.45

6 PLCS (NOTE 3)

DATUM ‘A’ 0.09 – 0.20 (NOTE 3) S6 TSOT-23 0302 REV B

2.90 BSC

(NOTE 4)

0.95 BSC

1.90 BSC

0.80 – 0.90

1.00 MAX

0.01 – 0.100.20 BSC 0.30 – 0.50 REF PIN ONE ID NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193

3.85 MAX

0.62 MAX 0.95 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 1.4 MIN2.62 REF

1.22 REF

(Reference L TC DWG # 05-08-1636)

MSOP (MS8) 0307 REV F 0.53 p 0.152 (.021 p .006) SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.18 (.007) 0.254 (.010) 1.10 (.043) MAX 0.22 – 0.38 (.009 – .015) TYP 0.1016 p 0.0508 (.004 p .002) 0.86 (.034) REF 0.65 (.0256) BSC 0o – 6o TYP DETAIL “A” DETAIL “A” GAUGE PLANE 12 3 4 4.90 p 0.152 (.193 p .006) 8 7 6 5 3.00 p 0.102 (.118 p .004) (NOTE 3) 3.00 p 0.102 (.118 p .004) (NOTE 4) 0.52 (.0205) REF 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.889 p 0.127 (.035 p .005) RECOMMENDED SOLDER PAD LAYOUT 0.42 p 0.038 (.0165 p .0015) TYP 0.65 (.0256) BSC PACKAGE DESCRIPTION 8-Lead Plastic MSOP (Reference L TC DWG # 05-08-1660 Rev F)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference L TC DWG # 05-08-1610) .016 – .050 (0.406 – 1.270) .010 – .020 (0.254 – 0.508)s 45o 0o– 8o TYP .008 – .010 (0.203 – 0.254) SO8 0303 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC 1 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 8 7 6 5 .189 – .197 (4.801 – 5.004) NOTE 3 .228 – .244 (5.791 – 6.197) .245 MIN .160 p.005 RECOMMENDED SOLDER PAD LAYOUT .045 p.005 .050 BSC .030 p.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

for its extremely low input bias current and high speed. gain. C4 helps improve the phase margin of the fast loop. Table 4. Results Achieved for Various R F, 1.2V Output Step Figure 10. Fast, High Gain Photodiode Amplifi er

18067 F10

Figure 11. Step Response

18067 F11