LT1803

LT1803 - Single/Dual/Quad 100V/µs, 85MHz, Rail-to-Rail Input and Output Op Amps

Document overview

• Manufacturer or author: Linear Technology Corporation
• PDF pages: 20

Technical content

Single/Dual/Quad 100V/µs, 85MHz, Rail-to-Rail Input and Output Op Amps n Slew Rate: 100V/µs n Gain Bandwidth Product: 85MHz n Input Common Mode Range Includes Both Rails n Output Swings Rail-to-Rail n Low Quiescent Current: 3mA Max per Amplifier n Large Output Current: 42mA n Voltage Noise: 21nV/√Hz n Power Supply Rejection: 90dB n Open-Loop Gain: 60V/mV n Operating Temperature Range: – 40°C to 85°C n Single Available in the 8-Pin SO and 5-Pin Low Profile (1mm) SOT-23 (ThinSOT TM ) Package n Dual Available in 8-Lead DFN and SO Packages n Quad Available in the 14-Pin Narrow SO Package n Low Voltage, High Frequency Signal Processing n Driving A/D Converters n Rail-to-Rail Buffer Amplifiers n Active Filters n Video Line Driver The LT 1803/LT1804/LT1805 are single/dual/quad, low power, high speed rail-to-rail input and output operational amplifiers with excellent DC performance. The LT1803/ LT1804/LT1805 feature reduced supply current, lower input offset voltage, lower input bias current and higher DC gain than other devices with comparable bandwidth and slew rate. Typically, the LT1803/LT1804/LT1805 have an input off- set voltage of 350µV, an input bias current of 125nA and an open-loop gain of 60V/mV. The LT1803/LT1804/LT1805 have an input range that includes both supply rails and an output that swings within 20mV of either supply rail to maximize the signal dynamic range in low supply applications. The LT1803/LT1804/LT1805 are specified at 3V, 5V and ±5V supplies and typically maintain their performance for supplies from 2.3V to 12.6V. The inputs can be driven beyond the supplies without damage or phase reversal of the output. The LT1803 is available in the 8-pin SO package with the standard op amp pinout and in the 5-pin SOT-23 package. The LT1804 is available in 8-pin DFN and SO packages with the standard op amp pinouts. The LT1805 features the standard quad op amp configuration and is available in a 14-pin plastic SO package. , LTC and LT are registered trademarks of Linear Technology Corporation. A 1/2 LT1804 B 1/2 LT1804 10k 100k 1N4148 VS = –5V

18045 TA01

VS– VOUT 0.1µF Inverting DC Restore 50µs/DIV 18045 TA02 VIN 50mV/DIV GND VOUT 500mV/DIV GND Inverting DC Restore Circuit Response ThinSOT is a trademark of Linear Technology Corporation.

Operating Temperature Range (Note 4) .. – 40°C to 85°C Specified Temperature Range (Note 5) ... – 40°C to 85°C ABSOLUTE MAXIMUM RATINGSW WW U PACKAGE/ORDER INFORMATIONW UU Maximum Junction Temperature (DD Package) .. 125°C Storage Temperature Range TOP VIEW S PACKAGE 14-LEAD PLASTIC SO OUT A –IN A +IN A V +IN B –IN B OUT B OUT D –IN D +IN D V +IN C –IN C OUT C A B D C TJMAX = 150°C, θJA = 160°C/W ORDER PART NUMBER ORDER PART NUMBER ORDER PART NUMBER LT1804CS8 LT1804IS8 S8 PART MARKING 1804 1804I LT1804CDD LT1804IDD DD PART MARKING* LADJ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades are identified by a label on the shipping container. LT1805CS LT1805IS TJMAX = 125°C, θJA = 160°C/W UNDERSIDE METAL INTERNALLY CONNECTED TO V– (PCB CONNECTION OPTIONAL) TJMAX = 150°C, θJA = 190°C/W TOP VIEW OUT B –IN B +IN B OUT A –IN A +IN A V S8 PACKAGE 8-LEAD PLASTIC SO A B TOP VIEW DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN 1OUT A –IN A +IN A V OUT B –IN B +IN B B A (Note 1) ORDER PART NUMBER LT1803CS5 LT1803IS5 S5 PART MARKING* LTAFN ORDER PART NUMBER LT1803CS8 LT1803IS8 S8 PART MARKING 1803 1803I 5 V+ 4 –IN VOUT 1 TOP VIEW S5 PACKAGE 5-LEAD PLASTIC TSOT-23 V– 2 +IN 3 TOP VIEW NC VOUT NC NC –IN +IN S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 190°C/W TJMAX = 150°C, θJA = 250°C/W

ELECTRICAL CHARACTERISTICS

TA = 25°C; VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = 0V 0.35 2 mV VCM = 0V (DD Package) 1.00 3 mV VCM = 0V (SOT-23 Package) 1.00 5 mV VCM = VS 1.50 8 mV ΔVOS Input Offset Shift V CM = 0V to VS – 2V 0.125 0.50 mV Input Offset Voltage Match V CM = 0V 0.5 3.5 mV (Channel-to-Channel) (Note 9) V CM = 0V (DD Package) 1.0 5.0 mV IB Input Bias Current V CM = 1V 125 750 nA VCM = VS 3 5.5 µA Input Bias Current Match V CM = 1V 100 1250 nA (Channel-to-Channel) (Note 9) V CM = VS 100 1500 nA IOS Input Offset Current V CM = 1V 100 1000 nA VCM = VS 50 1000 nA Input Noise Voltage 0.1Hz to 10Hz 4 µVP-P en Input Noise Voltage Density f = 10kHz 21 nV/ √Hz in Input Noise Current Density f = 10kHz 2.5 pA/ √Hz CIN Input Capacitance 2p F AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 20 60 V/mV VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 2 4.5 V/mV VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 15 45 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = 0V to 3V 75 96 dB VS = 3V, VCM = 0V to 1V 66 90 dB CMRR Match (Channel-to-Channel) (Note 9) V S = 5V, VCM = 0V to 3V 69 91 dB VS = 3V, VCM = 0V to 1V 60 85 dB Input Common Mode Range 0␣ ␣ V S V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V 68 90 dB PSRR Match (Channel-to-Channel) (Note 9) V S = 2.5V to 10V, VCM = 0V 62 90 dB Minimum Supply Voltage (Note 6) 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load 17 60 mV ISINK = 5mA 80 150 mV ISINK = 15mA 180 300 mV VOH Output Voltage Swing High (Note 7) No Load 17 60 mV ISOURCE = 5mA 125 250 mV ISOURCE = 15mA 350 600 mV ISC Short-Circuit Current (Note 3) V S = 5V 20 42 mA VS = 3V 18 34 mA IS Supply Current per Amplifier 2.7 3 mA GBW Gain Bandwidth Product V S = 5V, Frequency = 2MHz, RL = 1k to 2.5V 50 85 MHz SR Slew Rate V S = 5V, AV = –1, RL = 1k to VS/2, VO = 0.5V to 4.5V 65 100 V/ µs Measured at VO = 1.5V, 3.5V FPBW Full Power Bandwidth (Note 10) V S = 5V, AV = –1, VO = 0.5V to 4.5V, RL = 1k to VS/2 8 MHz HD Harmonic Distortion V S = 5V, AV = 1, RL = 1k, VO = 2VP-P, fC = 1MHz –75 dBc tS Settling Time 0.01%, V S = 5V, VSTEP = 2V, AV = 1, RL = 1k 350 ns ΔG Differential Gain (NTSC) V S = 5V, AV = 2, RL = 150Ω 0.15 % Δθ Differential Phase (NTSC) V S = 5V, AV = 2, RL = 150Ω 1 Deg

The l denotes specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = 0V l 0.50 3.5 mV VCM = 0V (DD Package) l 1.25 5 mV VCM = 0V (SOT-23 Package) l 1.25 6 mV VCM = VS l 1.60 8.5 mV ΔVOS Input Offset Shift V CM = 0V to VS – 2V l 0.05 0.8 mV Input Offset Voltage Match V CM = 0V l 0.75 5.5 mV (Channel-to-Channel) (Note 9) V CM = 0V (DD Package) l 1.50 7.5 mV VOS TC Input Offset Voltage Drift (Note 8) l 10 35 µV/°C IB Input Bias Current V CM = 1V l 150 1100 nA VCM = VS – 0.2V l 3.2 6 µA Input Bias Current Match V CM = 1V l 120 1500 nA (Channel-to-Channel) (Note 9) V CM = VS – 0.2V l 120 1800 nA IOS Input Offset Current V CM = 1V l 100 1400 nA VCM = VS – 0.2V l 50 1400 nA AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 l 15 50 V/mV VS = 5V, VO = 1V to 4V, RL = 100Ω to VS/2 l 1.4 3.7 V/mV VS = 3V, VO = 0.5V to 2.5V, RL=1k to VS/2 l 10 40 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = 0V to 3V l 71 95 dB VS = 3V, VCM = 0V to 1V l 61 90 dB CMRR Match (Channel-to-Channel) (Note 9) V S = 5V, VCM = 0V to 3V l 65 90 dB VS = 3V, VCM = 0V to 1V l 55 85 dB Input Common Mode Range l 0V S V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V l 65 87 dB PSRR Match (Channel-to-Channel) (Note 9) V S = 2.5V to 10V, VCM = 0V l 59 87 dB Minimum Supply Voltage (Note 6) l 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load l 19 80 mV ISINK = 5mA l 100 225 mV ISINK = 15mA l 200 450 mV VOH Output Voltage Swing High (Note 7) No Load l 19 80 mV ISOURCE = 5mA l 150 350 mV ISOURCE = 15mA l 450 900 mV ISC Short-Circuit Current (Note 3) V S = 5V l 17 40 mA VS = 3V l 15 28 mA IS Supply Current per Amplifier l 3 3.75 mA GBW Gain Bandwidth Product V S = 5V, Frequency = 2MHz, RL = 1k to 2.5V l 45 82 MHz SR Slew Rate V S = 5V, AV = –1, RL = 1k to VS/2, VO = 0.5V to 4.5V l 45 93 V/ µs Measured at VO = 1.5V, 3.5V

The l denotes specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = 0V l 0.7 4 mV VCM = 0V (DD Package) l 1.5 6.5 mV VCM = 0V (SOT-23 Package) l 1.5 7 mV VCM = VS l 1.7 9 mV ΔVOS Input Offset Shift V CM = 0V to VS – 2V l 0.125 1.00 mV Input Offset Voltage Match V CM = 0V l 1 6.5 mV (Channel-to-Channel) (Note 9) V CM = 0V (DD Package) l 29 m V VOS TC Input Offset Voltage Drift (Note 8) l 10 35 µV/°C IB Input Bias Current V CM = 1V l 200 1500 nA VCM = VS – 0.2V l 3.4 6.5 µA Input Bias Current Match V CM = 1V l 150 2000 nA (Channel-to-Channel) (Note 9) V CM = VS – 0.2V l 150 2200 nA IOS Input Offset Current V CM = 1V l 100 1600 nA VCM = VS – 0.2V l 50 1600 nA AVOL Large-Signal Voltage Gain V S = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 l 12 48 V/mV VS = 5V, VO = 1.5V to 3.5V, RL = 100Ω to VS/2 l 1.3 4.8 V/mV VS = 3V, VO = 0.5V to 2.5V, RL=1k to VS/2 l 8 35 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = 0V to 3V l 69 95 dB VS = 3V, VCM = 0V to 1V l 60 90 dB CMRR Match (Channel-to-Channel) (Note 9) V S = 5V, VCM = 0V to 3V l 63 90 dB VS = 3V, VCM = 0V to 1V l 54 85 dB Input Common Mode Range l 0V S V PSRR Power Supply Rejection Ratio V S = 2.5V to 10V, VCM = 0V l 64 86 dB PSRR Match (Channel-to-Channel) (Note 9) V S = 2.5V to 10V, VCM = 0V l 58 86 dB Minimum Supply Voltage (Note 6) l 2.3 2.5 V VOL Output Voltage Swing Low (Note 7) No Load l 20 90 mV ISINK = 5mA l 100 250 mV ISINK = 10mA l 170 350 mV VOH Output Voltage Swing High (Note 7) No Load l 20 90 mV ISOURCE = 5mA l 170 400 mV ISOURCE = 10mA l 300 600 mV ISC Short-Circuit Current (Note 3) V S = 5V l 12 35 mA VS = 3V l 11 27 mA IS Supply Current per Amplifier l 3.1 4.25 mA GBW Gain Bandwidth Product V S = 5V, Frequency = 2MHz, RL = 1k to 2.5V l 40 77 MHz SR Slew Rate V S = 5V, AV = –1, RL = 1k to VS/2, VO = 0.5V to 4.5V l 30 70 V/ µs Measured at VO = 1.5V, 3.5V

ELECTRICAL CHARACTERISTICSTA = 25°C, VS = ±5V, VCM = 0V, VOUT = 0V, unless otherwise noted SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = –5V 0.35 2.5 mV VCM = –5V (DD Package) 1.50 3.5 mV VCM = –5V (SOT-23 Package) 1.50 6 mV VCM = 5V 1.50 8 mV ΔVOS Input Offset Shift V CM = –5V to 3V 0.3 1 mV Input Offset Voltage Match V CM = –5V 0.5 4 mV (Channel-to-Channel) (Note 9) V CM = –5V (DD Package) 1 5.5 mV IB Input Bias Current V CM = –4V 125 750 nA VCM = 5V 2.5 5.5 µA Input Bias Current Match V CM = –4V 150 1250 nA (Channel-to-Channel) (Note 9) V CM = 5V 150 1500 nA IOS Input Offset Current V CM = –4V 100 1000 nA VCM = 5V 50 1000 nA Input Noise Voltage 0.1Hz to 10Hz 4 µVP-P en Input Noise Voltage Density f = 10kHz 21 nV/ √Hz in Input Noise Current Density f = 10kHz 2.5 pA/ √Hz CIN Input Capacitance f = 100kHz 2 pF AVOL Large-Signal Voltage Gain V O = –4V to 4V, RL = 1k 20 55 V/mV VO = –1.5V to 1.5V, RL = 100Ω 2 5 V/mV CMRR Common Mode Rejection Ratio V CM = –5V to 3V 78 96 dB CMRR Match (Channel-to-Channel) (Note 9) V CM = –5V to 3V 72 96 dB Input Common Mode Range V S–␣␣ V S+ V PSRR Power Supply Rejection Ratio V S+ = 2.5V to 10V, VS– = 0V, VOUT = VS+/2 68 90 dB PSRR Match (Channel-to-Channel) (Note 9) V S+ = 2.5V to 10V, VS– = 0V, VOUT = VS+/2 62 90 dB VOL Output Voltage Swing Low (Note 7) No Load 17 60 mV ISINK = 5mA 85 150 mV ISINK = 15mA 200 300 mV VOH Output Voltage Swing High (Note 7) No Load 17 60 mV ISOURCE = 5mA 125 250 mV ISOURCE = 15mA 350 600 mV ISC Short-Circuit Current (Note 3) 25 50 mA IS Supply Current per Amplifier 2.5 3 mA GBW Gain Bandwidth Product Frequency = 2MHz, R L = 1k 83 MHz SR Slew Rate A V = –1, RL = 1k, VO = ±4V 88 V/ µs Measured at VO = ±2V FPBW Full Power Bandwidth (Note 10) V O = 8VP-P, AV = –1, RL = 1k 4 MHz HD Harmonic Distortion A V = 1, RL = 1k, VO = 2VP-P, fC = 1MHz –75 dBc tS Settling Time 0.01%, V STEP = 5V, AV = 1, RL = 1k 500 ns ΔG Differential Gain (NTSC) A V = 2, RL = 150Ω 0.75 % Δθ Differential Phase (NTSC) A V = 2, RL = 150Ω 0.8 Deg

The l denotes specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = ±5V, VCM = 0V, VOUT = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = –5V l 0.5 3.5 mV VCM = –5V (DD Package) l 1.5 5 mV VCM = –5V (SOT-23 Package) l 1.5 7 mV VCM = 5V l 1.4 8.5 mV ΔVOS Input Offset Shift V CM = –5V to 3V l 0.35 1.5 mV Input Offset Voltage Match V CM = –5V l 0.75 5.5 mV (Channel-to-Channel) (Note 9) V CM = –5V (DD Package) l 1.50 7.5 mV VOS TC Input Offset Voltage Drift (Note 8) l 10 35 µV/°C IB Input Bias Current V CM = –4V l 175 1000 nA VCM = 4.8V l 2.5 6 µA Input Bias Current Match V CM = –4V l 175 1500 nA (Channel-to-Channel) (Note 9) V CM = 4.8V l 175 1800 nA IOS Input Offset Current V CM = –4V l 100 1400 nA VCM = 4.8V l 50 1400 nA AVOL Large-Signal Voltage Gain V O = –4V to 4V, RL = 1k l 15 47 V/mV VO = –1.5V to 1.5V, RL = 100Ω l 1.5 4.5 V/mV CMRR Common Mode Rejection Ratio V CM = –5V to 3V l 74 95 dB CMRR Match (Channel-to-Channel) (Note 9) V CM = –5V to 3V l 68 95 dB Input Common Mode Range l VS– VS+ V PSRR Power Supply Rejection Ratio V S+ = 2.5V to 10V, VS– = 0V, VOUT = VS+/2 l 65 87 dB PSRR Match (Channel-to-Channel) (Note 9) V S+ = 2.5V to 10V, VS– = 0V, VOUT = VS+/2 l 59 87 dB VOL Output Voltage Swing Low (Note 7) No Load l 19 80 mV ISINK = 5mA l 100 225 mV ISINK = 15mA l 220 475 mV VOH Output Voltage Swing High (Note 7) No Load l 19 80 mV ISOURCE = 5mA l 150 350 mV ISOURCE = 15mA l 460 900 mV ISC Short-Circuit Current (Note 3) l 20 46 mA IS Supply Current per Amplifier l 2.8 3.75 mA GBW Gain Bandwidth Product Frequency = 2MHz, R L = 1k l 80 MHz SR Slew Rate A V = –1, RL = 1k, VO = ±4V, l 84 V/ µs Measured at VO = ±2V

The l denotes specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = ±5V, VCM = 0V, VOUT = 0V unless otherwise noted. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = –5V l 1 4.0 mV VCM = –5V (DD Package) l 2 6.5 mV VCM = –5V (SOT-23 Package) l 28 m V VCM = 5V l 29 m V ΔVOS Input Offset Shift V CM = –5V to 3V l 0.4 1.7 mV Input Offset Voltage Match V CM = –5V l 1 6.5 mV (Channel-to-Channel) (Note 9) V CM = –5V (DD Package) l 2 9.0 mV VOS TC Input Offset Voltage Drift (Note 8) l 10 35 µV/°C IB Input Bias Current V CM = –4V l 250 1200 nA VCM = 4.8V l 2.5 6.5 µA Input Bias Current Match V CM = –4V l 200 2000 nA (Channel-to-Channel) (Note 9) V CM = 4.8V l 250 2200 nA IOS Input Offset Current V CM = –4V l 100 1600 nA VCM = 4.8V l 50 1600 nA AVOL Large-Signal Voltage Gain V O = –4V to 4V, RL = 1k l 12 45 V/mV VO = –1V to 1V, RL = 100Ω l 1.4 5.3 V/mV CMRR Common Mode Rejection Ratio V CM = –5V to 3V l 73 95 dB CMRR Match (Channel-to-Channel) (Note 9) V CM = –5V to 3V l 67 95 dB Input Common Mode Range l VS– VS+ V PSRR Power Supply Rejection Ratio V S+ = 2.5V to 10V, VS– = 0V, VOUT = VS+/2 l 64 86 dB PSRR Match (Channel-to-Channel) (Note 9) V S+ = 2.5V to 10V, VS– = 0V, VOUT = VS+/2 l 58 86 dB VOL Output Voltage Swing Low (Note 7) No Load l 20 90 mV ISINK = 5mA l 110 250 mV ISINK = 10mA l 170 350 mV VOH Output Voltage Swing High (Note 7) No Load l 20 90 mV ISOURCE = 5mA l 170 400 mV ISOURCE = 10mA l 300 600 mV ISC Short-Circuit Current (Note 3) l 12.5 34 mA IS Supply Current per Amplifier l 2.9 4.25 mA GBW Gain Bandwidth Product Frequency = 2MHz, R L = 1k l 75 MHz SR Slew Rate A V = –1, RL = 1k, VO = ±4V, l 65 V/ µs Measured at VO = ±2V Note 1: Absolute Maximium Ratings are those values beyond which the life of the device may be impaired. Note 2: The inputs are protected by back-to-back diodes and by ESD diodes to supply rails. If the differential input voltage exceeds 1.4V, or if an input is driven beyond the supply rails, the input current should be limited to less than 10mA. This parameter is not tested; however it is guaranteed by characterization. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely Note 4: The LT1803C/LT1803I, LT1804C/LT1804I and LT1805C/LT1805I are guaranteed functional over the temperature range of –40°C and 85°C. Note 5: The LT1803C/LT1804C/LT1805C are guaranteed to meet specified performance from 0°C to 70°C. The LT1803C/LT1804C/LT1805C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1803I/LT1804I/LT1805I are guaranteed to meet specified perfor- mance from –40°C to 85°C. Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 7: Output voltage swings are measured between the output and power supply rails. Note 8: This parameter is not 100% tested. Note 9: Matching parameters are the difference between amplifiers A and D and between B and C on the LT1805; between the two amplifiers on the LT1804. Note 10: Full power bandwidth is based on slew rate: FPBW = SR/2πV P

INPUT OFFSET VOLTAGE (µV) –1250 PERCENT OF UNITS (%)

180345 G01

–750 1250750250–250 VS = 5V, 0V VCM = 0V INPUT OFFSET VOLTAGE (mV) PERCENT OF UNITS (%) –4 –2 0 2

180345 G02

VS = 5V, 0V VCM = 5V TOTAL SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 24 68

180345 G05

TA = 125°C TA = 25°C TA = –55°C INPUT COMMON MODE VOLTAGE (V) OFFSET VOLTAGE (µV) 2000 1500 1000 500 –500 –1000 1234

180345 G06

COMMON MODE VOLTAGE (V) INPUT BIAS CURRENT (µA) 1 3 4

180345 G07

VS = 5V, 0V TYPICAL PART TA = 125°C TA = 125°C TA = –55°C TA = –55°C VS = 5V, 0V TA = 25°C TA = 25°C TEMPERATURE (°C) –50 INPUT BIAS CURRENT (µA)

180345 G08

–20 10–35 –5 25 85 55 70 3.0 2.5 2.0 1.5 1.0 0.5 –0.5 –1.0 NPN ACTIVE VS = 5V, 0V VCM = 5V PNP ACTIVE V S = 5V, 0V VCM = 1V LOAD CURRENT (mA) 0.01OUTPUT SATURATION VOLTAGE (V) 0.1 0.01 1 10

180345 G09

0.001 0.1 100 VS = 5V, 0V TA = 125°C TA = –55°C TA = 25°C INPUT OFFSET VOLTAGE (mV) PERCENT OF UNITS (%)

180345 G03

–3 –2–4 54321–1 VS = 5V, 0V VCM = 0V INPUT OFFSET VOLTAGE (mV) PERCENT OF UNITS (%) –4 –2 0 2

180345 G04

VS = 5V, 0V VCM = 5V TYPICAL PERFOR A CE CHARACTERISTICS UW VOS Distribution, VCM = 0V (SO-8, PNP Stage) VOS Distribution, VCM = 5V (SO-8, NPN Stage) Supply Current vs Supply Voltage Offset Voltage vs Input Common Mode Voltage Input Bias Current vs Common Mode Voltage Input Bias Current vs Temperature Output Saturation Voltage vs Load Current (Output Low) VOS Distribution, VCM = 0V (SOT-23, PNP Stage) VOS Distribution, VCM = 5V (SOT-23, NPN Stage)

POWER SUPPLY VOLTAGE (–V) 1.5 –20 –40 –60 3.0 4.0

180345 G12

OUTPUT SHORT-CIRCUIT CURRENT (mA) TA = 125°C TA = –55°C TA = 25°C TA = 125°C TA = –55°C TA = 25°C SINKING SOURCING OUTPUT CURRENT (mA) –60 04 0

180345 G16

–40 –20 20 60 80 CHANGE IN OFFSET VOLTAGE (mV) VS = –5V TA = 125°C TA = –55°C TA = 25°C FREQUENCY (kHz) 0.01 INPUT NOISE VOLTAGE (nV/√Hz) 1 100 160 140 120 100

180345 G18

0.1 10 VS = 5V, 0V NPN ACTIVE VCM = 4.25V PNP ACTIVE V CM = 2.5V LOAD CURRENT (mA) 0.01OUTPUT SATURATION VOLTAGE (V) 0.1 0.01 1 10

180345 G10

0.001 0.1 100 TA = 125°C TA = –55°C VS = 5V, 0V TA = 25°C

180345 G11

TOTAL SUPPLY VOLTAGE (V) CHANGE IN OFFSET VOLTAGE (mV) TA = 125°C TA = –55°C TA = 25°C VCM = 0V TIME AFTER POWER-UP (SECONDS) CHANGE IN OFFSET VOLTAGE (µV) –10 –15 5 10 15 20

180345 G17

VS = –5V VS = 5V VS = 3V OUTPUT VOLTAGE (V) INPUT VOLTAGE (mV) 0.5 1.0 1.5 2.0

180345 G13

2.5 2.5 2.0 1.5 1.0 0.5 –0.5 –1.0 –1.5 –2.0 –2.5 3.0 VS = 3V, 0V RL TO GND RL = 1k RL = 100Ω OUTPUT VOLTAGE (V) INPUT VOLTAGE (mV) 1 2 34

180345 G14

2.5 2.0 1.5 1.0 0.5 –0.5 –1.0 –1.5 –2.0 –2.5 VS = 5V, 0V RL TO GND RL = 1k RL = 100Ω OUTPUT VOLTAGE (V) –10 INPUT VOLTAGE (mV)

180345 G15

RL = 1k RL = 100Ω VS = –5V RL TO GND TYPICAL PERFOR A CE CHARACTERISTICS UW Output Short-Circuit Current vs Power Supply Voltage Open-Loop Gain Open-Loop GainOpen-Loop Gain Offset Voltage Change vs Output Current Warm-Up Drift vs Time (LT1804S8) Input Noise Voltage vs Frequency Output Saturation Voltage vs Load Current (Output High) Minimum Supply Voltage

TOTAL SUPPLY VOLTAGE (V) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 120 100

180345 G21

TA = 25°C TEMPERATURE (°C) –50 100755025 120 100

180345 G22

0–25 125 –50 1007550250–25 125 GAIN BANDWIDTH PHASE MARGIN VS = –2.5V VS = –2.5V VS = –5V VS = –5V TEMPERATURE (°C) 110 100

180345 G23

SLEW RATE (V/µs) VS = –2.5V VS = –5V AV = –1 RF = RG = 1k RL = 1k FREQUENCY (MHz) GAIN (dB) 120 100 –20 –40 100 120 140 160 180 200 220 0.01 1 10 300

180345 G24

0.1 100 FREQUENCY (MHz) 1 10 300

180345 G25

0.1 100 –12 –18 –24 –30 GAIN (dB) FREQUENCY (MHz) 1 10 300

180345 G26

0.1 100 –12 –18 –24 –30 GAIN (dB) FREQUENCY (kHz) OUTPUT IMPEDANCE (Ω ) 1000 100 0.1 0.01 0.001 0.1 10 100 1000

180345 G27

AV = 10 AV = 1 TIME (SECONDS) 0 13579 INPUT NOISE VOLTAGE (µV) 2468

180345 G20

VS = 5V, 0V FREQUENCY (kHz) 0.01 INPUT NOISE CURRENT (pA/√Hz) 1 100

180345 G19

0.1 10 VS = 5V, 0V NPN ACTIVE VCM = 4.25V PNP ACTIVE V CM = 2.5V PHASE SHIFT (DEG) AV = 2 VS = –2.5V VS = –5V CL = 10pF RL = 100Ω AV = 1 VS = –2.5V VS = –5V CL = 10pF RL = 100Ω AV = 2 VS = –2.5V PHASE GAIN TA = 25°C CL = 5pF RL = 1k VS = –5V VS = –2.5V TYPICAL PERFOR A CE CHARACTERISTICS UW Gain Bandwidth and Phase Margin vs Supply Voltage Gain Bandwidth and Phase Margin vs Temperature Slew Rate vs Temperature Gain and Phase vs Frequency Gain vs Frequency (AV = 1) Gain vs Frequency (AV = 2) Output Impedance vs Frequency Input Current Noise vs Frequency 0.1Hz to 10Hz Voltage Noise

CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000 10000

180345 G30

180345 G33

CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000 10000

180345 G31 180345 G32

FREQUENCY (MHz) 0.01 OUTPUT VOLTAGE SWING (VP-P) 5.2 5.0 4.8 4.6 4.4 4.2 4.0 0.1 1 10

180345 G34

VS = 5V, 0V AV = 1 VS = 5V, 0V AV = 2 CF = 5pF RG = 1k RF = 1k VS = 5V, 0V TA = 25°C HD2, HD3 < –40dBc RS = 50Ω , RL = 50Ω RS = 50Ω , RL = 50Ω RS = 20Ω RS = 20Ω AV = 2 AV = –1

180345 G35

100ns/DIVVS = 5V, 0V AV = 1 RL = 1k

180345 G36

2.5V 50ns/DIVVS = 5V, 0V AV = 1 RL = 1k FREQUENCY (MHz) COMMON MODE REJECTION RATIO (dB) 100 0.01 1 10 100

180345 G28

0.1 FREQUENCY (MHz) POWER SUPPLY REJECTION RATIO (dB) 100 –10 0.001 0.1 1 100

180345 G29

0.01 10 VS = 5V, 0V RL = 1kΩ TA = 25°C VS = 5V, 0V TA = 25°C POSITIVE SUPPLY NEGATIVE SUPPLY FREQUENCY (MHz) DISTORTION (dBc) VS = 5V, 0V AV = 2 VOUT = 2VP-P FREQUENCY (MHz) 0.01 DISTORTION (dBc) –30 –4 0 –50 –6 0 –70 –80 –90 –100 –110 –30 –4 0 –50 –6 0 –70 –80 –90 –100 0.1 1 10 0.01 0.1 1 10 VS = 5V, 0V AV = 1 VOUT = 2VP-P VCM = 2V RL = 150Ω , 2ND RL = 150Ω , 3RD RL = 1kΩ , 3RD RL = 150Ω , 2ND RL = 1kΩ , 2ND RL = 150Ω , 3RD RL = 1kΩ , 3RD RL = 1kΩ , 2ND TYPICAL PERFOR A CE CHARACTERISTICS UW Overshoot and Series Output Resistor vs Capacitive Load (AV = 1) Overshoot and Series Output Resistor vs Capacitive Load (AV = 2) Distortion vs Frequency (AV = 1) Distortion vs Frequency (AV = 2) Maximum Undistorted Output Signal vs Frequency 5V Large-Signal Response 5V Small-Signal Response Common Mode Rejection Ratio vs Frequency Power Supply Rejection Ratio vs Frequency

APPLICATIO S I FOR ATIOWU UU TYPICAL PERFOR A CE CHARACTERISTICS UW Output Overdrive Recovery Circuit Description The LT1803/LT1804/LT1805 have input and output signal ranges from the negative power supply to the positive power supply. Figure 1 depicts a simplified schematic of one amplifier. The input stage is comprised of two differ- ential amplifiers, a PNP stage Q1/Q2 and an NPN stage Q3/ Q4 that are active over the different ranges of the common mode input voltage. The PNP differential pair is active between the negative supply and approximately 1.3V below the positive supply. As the input voltage moves toward the positive supply, the transistor Q5 will steer the tail current I 1 to the current mirror Q6/Q7 activating the NPN differential pair. The PNP pair becomes inactive for the rest of the input common mode range up to the positive supply. Also at the input stage, devices Q18 and Q19 act to cancel the bias current of the PNP input pair. When Q1 and Q2 are active, the current in Q16 is controlled to be the same as the current in Q1 and Q2; therefore, the base current of Q16 is nominally equal to the base current of the input devices. The base current of Q16 is then mirrored by devices Q17 through Q19 to cancel the base current of the input devices Q1 and Q2. A pair of complementary common emitter stages Q14/ Q15 that enable the output to swing from rail-to-rail constructs the output stage. The capacitors C1 and C2 form the local feedback loops that lower the output impedance at high frequency. The LT1803/LT1804/LT1805 are fabricated on Linear Technology’s proprietary high speed complementary bipolar process. Power Dissipation There is a need to ensure that the die’s junction tempera- ture does not exceed 150 °C. Junction temperature T J is calculated from the ambient temperature TA, power dissi- pation PD and thermal resistance θJA: TJ = TA + (PD • θJA) The power dissipated in the IC is a function of the supply voltage, amplifier current, output voltage and output cur- rent. For a given supply voltage, the worst-case power dissipation, P DMAX, occurs when the output current and voltage drop in the amplifier product is maximized. For example, if the amplifier is sourcing a constant current then the P DMAX occurs when the output voltage is at about VS–. On the other hand, for a given load resistance to ground, the PDMAX will occur when the output voltage is at half of either supply voltage. PDMAX for a given resistance to ground is given by: PDMAX = (VS+ – VS–) ISMAX + (VS/2)2/RL Example: An LT1804 in an SO-8 package operating on ±5V supplies and driving a 100Ω load to ground, the PDMAX per amplifier is given by: = 0.095W ISMAX is approximated for a typical part from the Supply Currrent vs Supply Voltage graph. ±5V Large-Signal Response ±5V Small-Signal Response

180345 G39

100ns/DIVVS = 5V, 0V AV = 2 RL = 1k

180345 G38

50ns/DIVVS = –5V AV = 1 RL = 1k

180345 G37

200ns/DIVVS = –5V AV = 1 RL = 1k

be useful for certain applications. the negative supply rail to 1.75V below the positive rail. Figure 1. LT1803/LT1804/LT1805 Simplified Schematic Diagram

180345 F01

12.6V, the absolute maximum rating, no damage will occur to the device. Overdrive Protection When the input voltage exceeds the power supplies, two pairs of crossing diodes D1 through D4 will prevent the output from reversing polarity. If the input voltage exceeds either power supply by 700mV, diode D1/D2 or D3/D4 will turn on to keep the output at the proper polarity. For the phase reversal protection to perform properly, the input current must be limited to less than 10mA. If the amplifier is severely overdriven, an external resistor should be used to limit the overdrive current. The LT1803/LT1804/LT1805’s input stages are also pro- tected against a large differential input voltage of 1.4V or higher by a pair of back-to-back diodes D5 through D8 to prevent the emitter-base breakdown of the input transis- tors. The current in these diodes should be limited to less than 10mA when they are active. The worst-case differen- tial input voltage usually occurs when the input is driven while the output is shorted to ground in a unity gain configuration. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins by a pair of protection diodes on each pin that is connected to the power supplies as shown in Figure 1. Capacitive Load The LT1803/LT1804/LT1805 are optimized for wide band- width, low power and precision applications. They can drive a capacitive load of about 20pF in a unity-gain configuration, and more for higher gain. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output so that the resistor will isolate the capacitive load to ensure stability. Graphs on capacitive load indicate the transient response of the amplifier when driving a capacitive load with a specified resistor. Feedback Components When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. For instance, the LT1803/ LT1804/LT1805 in a noninverting gain of 2 setup with two 5k resistors and a capacitance of 5pF (part plus PC board) will probably oscillate. The pole formed at 12.7MHz, reduces phase margin by about 58 degrees when the crossover frequency of the amplifier is around 20MHz. A capacitor of 5pF or higher connected across the feedback resistor will eliminate any ringing or oscillation. APPLICATIO S I FOR ATIOWU UU

(Reference LTC DWG # 05-08-1635) 1.50 – 1.75 (NOTE 4)2.80 BSC 0.30 – 0.45 TYP

5 PLCS (NOTE 3)

DATUM ‘A’ 0.09 – 0.20 (NOTE 3) S5 TSOT-23 0302 PIN ONE

2.90 BSC

(NOTE 4)

0.95 BSC

1.90 BSC

0.80 – 0.90

1.00 MAX

0.01 – 0.100.20 BSC 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193

3.85 MAX

0.62 MAX 0.95 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 1.4 MIN2.62 REF

1.22 REF

8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) 3.00 –0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED 0.38 – 0.10 BOTTOM VIEW—EXPOSED PAD 1.65 – 0.10 (2 SIDES) 0.75 –0.05 R = 0.115 TYP 2.38 –0.10 (2 SIDES) PIN 1 TOP MARK

0.200 REF

0.00 – 0.05 (DD8) DFN 0203 0.28 – 0.05 2.38 –0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 –0.05 (2 SIDES)2.15 –0.05 0.50 BSC 0.675 –0.05 3.5 –0.05 PACKAGE OUTLINE 0.28 – 0.05

0.50 BSC

8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) UPACKAGE DESCRIPTIO .016 – .050 (0.406 – 1.270) .010 – .020 0°– 8° TYP .008 – .010 (0.203 – 0.254) SO8 0303 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC 1 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 8 7 6 5 .189 – .197 (4.801 – 5.004) NOTE 3 .228 – .244 (5.791 – 6.197) .245 MIN .160 –.005 RECOMMENDED SOLDER PAD LAYOUT .045 –.005 .050 BSC .030 –.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

14-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) UPACKAGE DESCRIPTIO N 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 14 13 .337 – .344 (8.560 – 8.738) NOTE 3 .228 – .244 (5.791 – 6.197) 12 11 10 9 5 6 7 N/2 .016 – .050 (0.406 – 1.270) .010 – .020 0° – 8° TYP .008 – .010 (0.203 – 0.254) S14 0502 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .245 MIN N 1 2 3 N/2 .160 –.005 RECOMMENDED SOLDER PAD LAYOUT .045 –.005 .050 BSC .030 –.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

 LINEAR TECHNOLOGY CORPORATION 2003 LT/TP 0803 1K • PRINTED IN THE USA PART NUMBER DESCRIPTION COMMENTS LT1399 Triple 300MHz Current Feedback Amplifier 0.1dB Gain Flatness to 150MHz, Shutdown LT1498/LT1499 Dual/Quad 10MHz, 6V µs Rail-to-Rail Input and Output High DC Accuracy, 475 µV VOS(MAX), 4µV/°C Max Drift, C-Load TM Op Amps Max Supply Current 2.2mA per Amp LT1630/LT1631 Dual/Quad 30MHz, 10V/ µs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 525 µV VOS(MAX), 70mA Output Current, Max Supply Current 4.4mA per Amplifier LT1800/LT1801 Single/Dual/Quad 80MHz, 25V/ µs Low Power Rail-to-Rail High DC Accuracy, 350 µV VOS(MAX), Max Supply Currrent LT1802 Input/Output Precision Op Amps 2mA per Amplifier LT1806/LT1807 Single/Dual 325MHz, 140V/ µs Rail-to-Rail Input/Output Amps High DC Accuracy, 550 µV VOS(MAX), Low Noise 3.5nV/√Hz, Low Distortion –80dB at 5MHz, Power-Down (LT1806) LT1809/LT1810 Single/Dual 180MHz Rail-to-Rail Input/Output Op Amps 350V/ µs Slew Rate, Low Distortion –90dB at 5MHz, Power-Down (LT1809) LT6200/LT6201 Single/Dual Ultralow Noise Rail-to-Rail Amplifier 0.95nV/Hz, 165MHz Gain Bandwidth, 44V/ µs LT6200-5 Single Ultralow Noise Rail-to-Rail Amplifier 0.95nV/Hz, 800MHz Gain Bandwidth, 210V/ µs, AV ≥5 LT6200-10 Single Ultralow Noise Rail-to-Rail Amplifier 0.95nV/Hz, 1.6GHz Gain Bandwidth, 340V/ µs, AV ≥10 LT6202/LT6203 Single/Dual/Quad 90MHz, 24V/ µs Rail-to-Rail Input/Output, High DC Accuracy, 500 µV VOS(MAX), Max Supply Currrent LT6204 Ultralow 1.9nV/ √Hz Noise, Low Power Op Amps 3mA per Amplifier C-Load is a trademark of Linear Technology Corporation. RELATED PARTS Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com 500mA Pulse Response of LED Array Driver

• • • SCANNER LED ARRAY RATED 600mA AT 5V VIN LT1803 27pF 332Ω 332Ω 10V 10Ω 3.01k 3 IOUT IOUT = VIN • 1A

2 FOOT WIRE

0.1Ω VSENSE INTERNATIONAL RECTIFIER IRLL3303

1803 TAO3a

(NOT CURRENT LIMITED UNDER SHORT-CIRCUIT CONDITIONS) LED Array Driver PIN 3 PIN 6 VSENSE FET SOURCE

1803 TA03b