LT1632

LT1632/LT1633 - 45MHz, 45V/µs, Dual/Quad Rail-to-Rail Input and Output Precision Op Amps

Document overview

• Manufacturer or author: Linear Technology Corporation
• PDF pages: 16

Technical content

45MHz, 45V/ms, Dual/Quad Rail-to-Rail Input and Output Precision Op Amps

FEATURES

n Gain-Bandwidth Product: 45MHz n Slew Rate: 45V/ms n Low Supply Current per Amplifier: 4.3mA n Input Common Mode Range Includes Both Rails n Output Swings Rail-to-Rail n Input Offset Voltage, Rail-to-Rail: 1350mV Max n Input Offset Current: 440nA Max n Input Bias Current: 2.2mA Max n Open-Loop Gain: 800V/mV Min n Low Input Noise Voltage: 12nV/ÖHz Typ n Low Distortion: – 92dBc at 100kHz n Wide Supply Range: 2.7V to –15V n Large Output Drive Current: 35mA Min n Dual in 8-Pin PDIP and SO Packages The LT 1632/LT1633 are dual/quad, rail-to-rail input and output op amps with a 45MHz gain-bandwidth product and a 45V/ms slew rate. The LT1632/LT1633 have excellent DC precision over the full range of operation. Input offset voltage is typically less than 400 mV and the minimum open-loop gain of 0.8 million into a 10k load virtually eliminates all gain error. Common mode rejection is typically 83dB over the full rail- to-rail input range when on a single 5V supply for excellent noninverting performance. The LT1632/LT1633 maintain their performance for sup- plies from 2.7V to 36V and are specified at 3V, 5V and –15V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output. The output delivers load currents in excess of 35mA. The LT1632 is available in 8-pin PDIP and SO packages with the standard dual op amp pinout. The LT1633 features the standard quad op amp configuration and is available in a 14-pin plastic SO package. These devices can be used as plug-in replacements for many standard op amps to improve input/output range and performance. DESCRIPTIONU APPLICATIONSU n Active Filters n Rail-to-Rail Buffer Amplifiers n Driving A/D Converters n Low Voltage Signal Processing n Battery-Powered Systems , LTC and LT are registered trademarks of Linear Technology Corporation. FREQUENCY (Hz) VOLTAGE GAIN (dB) –10 –20 –30 –40 –50 –60 –70 100 10k 100k 10M 1632/33 TA02 1k 1M COMMON MODE INPUT DIFFERENTIAL INPUT VS = 3V AV = 100 TYPICAL APPLICATIONU Single Supply, 40dB Gain, 550kHz Instrumentation Amplifier 1/2 LT1632 VIN– VIN+ VOUT 1630/31 F02 20k 20k 432Ω 2k – 1/2 LT1632 Frequency Response

ABSOLUTE MAXIMUM RATINGSW WW U Consult factory for Military and Industrial grade parts. PACKAGE/ORDER INFORMATIONW UU ORDER PART NUMBER LT1632CN8 LT1632CS8 LT1632IN8 LT1632IS8 ORDER PART NUMBER TJMAX = 150°C, qJA = 150°C/ W TJMAX = 150°C, qJA = 130°C/ W (N8) TJMAX = 150°C, qJA = 190°C/ W (S8) LT1633CS LT1633IS S8 PART MARKING TOP VIEW OUT A –IN A +IN A V OUT B –IN B +IN B S8 PACKAGE 8-LEAD PLASTIC SO N8 PACKAGE 8-LEAD PDIP A B 1632 1632I TOP VIEW S PACKAGE 14-LEAD PLASTIC SO OUTA –IN A +IN A V +IN B –IN B OUT B OUT D –IN D +IN D V +IN C –IN C OUT C A D B C

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ 400 1350 mV VCM = V– 400 1350 mV DVOS Input Offset Shift V CM = V– to V+ 350 1500 mV Input Offset Voltage Match (Channel-to-Channel) V CM = V–, V+ (Note 5) 500 2300 mV IB Input Bias Current V CM = V+ 0 1.15 2.2 mA VCM = V– –2.2 –1.15 0 mA DIB Input Bias Current Shift V CM = V– to V+ 2.3 4.4 mA Input Bias Current Match (Channel-to-Channel) V CM = V+ (Note 5) 50 880 nA VCM = V– (Note 5) 50 880 nA IOS Input Offset Current V CM = V+ 40 440 nA VCM = V– 40 440 nA DIOS Input Offset Current Shift V CM = V– to V+ 80 880 nA Input Noise Voltage 0.1Hz to 10Hz 400 nV P-P en Input Noise Voltage Density f = 1kHz 12 nV/ ÖHz in Input Noise Current Density f = 1kHz 1.6 pA/ ÖHz CIN Input Capacitance 5p F AVOL Large-Signal Voltage Gain V S = 5V, VO = 300mV to 4.7V, RL = 10k 450 2000 V/mV VS = 3V, VO = 300mV to 2.7V, RL = 10k 350 1500 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = V– to V+ 70 83 dB VS = 3V, VCM = V– to V+ 66 81 dB TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. (Note 1)

TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMRR Match (Channel-to-Channel) (Note 5) V S = 5V, VCM = V– to V+ 65 85 dB VS = 3V, VCM = V– to V+ 61 82 dB PSRR Power Supply Rejection Ratio V S = 2.7V to 12V, VCM = VO = 0.5V 82 100 dB PSRR Match (Channel-to-Channel) (Note 5) V S = 2.7V to 12V, VCM = VO = 0.5V 79 101 dB Minimum Supply Voltage (Note 9) V CM = VO = 0.5V 2.6 2.7 V VOL Output Voltage Swing Low (Note 6) No Load 15 30 mV ISINK = 0.5mA 32 60 mV ISINK = 25mA, VS = 5V 600 1200 mV ISINK = 20mA, VS = 3V 500 1000 mV VOH Output Voltage Swing High (Note 6) No Load 16 40 mV ISOURCE = 0.5mA 42 80 mV ISOURCE = 20mA, VS = 5V 910 1800 mV ISOURCE = 15mA, VS = 3V 680 1400 mV ISC Short-Circuit Current V S = 5V – 20 – 40 mA VS = 3V – 15 – 30 mA IS Supply Current per Amplifier 4.3 5.2 mA GBW Gain-Bandwidth Product (Note 7) f = 100kHz 22 45 MHz SR Slew Rate (Note 8) V S = 5V, AV = –1, R L = Open, VO = 4V 13 27 V/ ms VS = 3V, AV = – 1, RL = Open 11 22 V/ ms tS Settling Time V S = 5V, AV = 1, RL = 1k, 400 ns 0.01%, VSTEP = 2V SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ – 0.1V l 600 2000 mV VCM = V– + 0.2V l 600 2000 mV VOS TC Input Offset Voltage Drift (Note 3) l 81 5 mV/°C VCM = V+ – 0.1V l 2.5 7 mV/°C DVOS Input Offset Voltage Shift V CM = V– + 0.2V to V+ – 0.1V l 400 2300 mV Input Offset Voltage Match (Channel-to-Channel) V CM = V – + 0.2V, V+ – 0.1V (Note 5) l 700 3750 mV IB Input Bias Current V CM = V+ – 0.1V l 0 1.3 2.6 mA VCM = V– + 0.2V l –2.6 –1.3 0 mA DIB Input Bias Current Shift V CM = V– + 0.2V to V+ – 0.1V l 2.6 5.2 mA Input Bias Current Match (Channel-to-Channel) V CM = V+ – 0.1V (Note 5) l 50 1040 nA VCM = V– + 0.2V (Note 5) l 50 1040 nA IOS Input Offset Current V CM = V+ – 0.1V l 40 520 nA VCM = V– + 0.2V l 40 520 nA DIOS Input Offset Current Shift V CM = V– + 0.2V to V+ – 0.1V l 80 1040 nA AVOL Large-Signal Voltage Gain V S = 5V, VO = 300mV to 4.7V, RL = 10k l 300 1100 V/mV VS = 3V, VO = 300mV to 2.7V, RL = 10k l 200 1000 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = V– + 0.2V to V+ – 0.1V l 67 81 dB VS = 3V, VCM = V– + 0.2V to V+ – 0.1V l 61 77 dB CMRR Match (Channel-to-Channel) (Note 5) V S = 5V, VCM = V– + 0.2V to V+ – 0.1V l 62 78 dB VS = 3V, VCM = V– + 0.2V to V+ – 0.1V l 57 73 dB PSRR Power Supply Rejection Ratio V S = 3V to 12V, VCM = VO = 0.5V l 81 94 dB PSRR Match (Channel-to-Channel) (Note 5) V S = 3V to 12V, VCM = VO = 0.5V l 77 95 dB 0°C < TA < 70°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ – 0.1V l 700 2400 mV VCM = V– + 0.2V l 700 2400 mV VOS TC Input Offset Voltage Drift (Note 3) l 81 5 mV/°C VCM = V+ – 0.1V l 2.5 7 mV/°C DVOS Input Offset Voltage Shift V CM = V– + 0.2V to V+ – 0.1V l 475 2500 mV Input Offset Voltage Match (Channel-to-Channel) V CM = V– + 0.2V, V+ (Note 5) l 750 4000 mV IB Input Bias Current V CM = V+ – 0.1V l 0 1.46 3.0 mA VCM = V– + 0.2V l –3.0 – 1.46 0 mA DIB Input Bias Current Shift V CM = V– + 0.2V to V+ – 0.1V l 2.92 6.0 mA Input Bias Current Match (Channel-to-Channel) V CM = V+ – 0.1V (Note 5) l 70 1160 nA VCM = V– + 0.2V (Note 5) l 70 1160 nA IOS Input Offset Current V CM = V+ – 0.1V l 75 580 nA VCM = V– + 0.2V l 75 580 nA DIOS Input Offset Current Shift V CM = V– + 0.2V to V+ – 0.1V l 50 1160 nA AVOL Large-Signal Voltage Gain V S = 5V, VO = 300mV to 4.7V, RL = 10k l 250 1000 V/mV VS = 3V, VO = 300mV to 2.7V, RL = 10k l 200 800 V/mV CMRR Common Mode Rejection Ratio V S = 5V, VCM = V– + 0.2V to V+ – 0.1V l 65 80 dB VS = 3V, VCM = V– + 0.2V to V+ – 0.1V l 60 75 dB CMRR Match (Channel-to-Channel) (Note 5) V S = 5V, VCM = V– + 0.2V to V+ – 0.1V l 62 78 dB VS = 3V, VCM = V– + 0.2V to V+ – 0.1V l 57 73 dB PSRR Power Supply Rejection Ratio V S = 3V to 12V, VCM = VO = 0.5V l 79 95 dB PSRR Match (Channel-to-Channel) (Note 5) V S = 3V to 12V, VCM = VO = 0.5V l 75 95 dB Minimum Supply Voltage (Note 9) V CM = VO = 0.5V l 2.6 2.7 V VOL Output Voltage Swing Low (Note 6) No Load l 19 40 mV ISINK = 0.5mA l 39 80 mV ISINK = 25mA, VS = 5V l 730 1500 mV ISINK = 20mV, VS = 3V l 580 1200 mV SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Supply Voltage (Note 9) V CM = VO = 0.5V l 2.6 2.7 V VOL Output Voltage Swing Low (Note 6) No Load l 18 40 mV ISINK = 0.5mA l 37 80 mV ISINK = 25mA, VS = 5V l 700 1400 mV ISINK = 20mA, VS = 3V l 560 1200 mV VOH Output Voltage Swing High (Note 6) No Load l 16 40 mV ISOURCE = 0.5mA l 50 100 mV ISOURCE = 15mA, VS = 5V l 820 1600 mV ISOURCE = 10mA, VS = 3V l 550 1100 mV ISC Short-Circuit Current V S = 5V l – 18 – 37 mA VS = 3V l – 13 – 26 mA IS Supply Current per Amplifier l 4.9 6.0 mA GBW Gain-Bandwidth Product (Note 7) f = 100kHz l 20 41 MHz SR Slew Rate (Note 8) V S = 5V, AV = –1, R L = Open, VO = 4V l 13 26 V/ ms VS = 3V, AV = – 1, RL = Open l 10 21 V/ ms –4 0°C < TA < 85°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. (Note 4) 0°C < TA < 70°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted.

–4 0°C < TA < 85°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VOUT = half supply, unless otherwise noted. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ 500 2200 mV VCM = V– 500 2200 mV DVOS Input Offset Voltage Shift V CM = V– to V+ 360 2200 mV Input Offset Voltage Match (Channel-to-Channel) V CM = V–, V+ (Note 5) 700 3500 mV IB Input Bias Current V CM = V+ 0 1.15 2.2 mA VCM = V– –2.2 – 1.15 0 mA DIB Input Bias Current Shift V CM = V– to V+ 2.3 4.4 mA Input Bias Current Match (Channel-to-Channel) V CM = V+ (Note 5) 50 880 nA VCM = V– (Note 5) 50 880 nA IOS Input Offset Current V CM = V+ 50 440 nA VCM = V– 50 440 nA DIOS Input Offset Current Shift V CM = V– to V+ 36 880 nA Input Noise Voltage 0.1Hz to 10Hz 400 nV P-P en Input Noise Voltage Density f = 1kHz 12 nV/ ÖHz in Input Noise Current Density f = 1kHz 1.6 pA/ ÖHz CIN Input Capacitance f = 100kHz 3 pF AVOL Large-Signal Voltage Gain V O = –14.5V to 14.5V, R L = 10k 800 5000 V/mV VO = – 10V to 10V, RL = 2k 400 2500 V/mV Channel Separation V O = – 10V to 10V, RL = 2k 110 127 dB CMRR Common Mode Rejection Ratio V CM = V– to V+ 82 98 dB CMRR Match (Channel-to-Channel) (Note 5) V CM = V– to V+ 80 101 dB PSRR Power Supply Rejection Ratio V S = –5V to –15V 82 96 dB PSRR Match (Channel-to-Channel) (Note 5) V S = –5V to –15V 80 101 dB VOL Output Voltage Swing Low (Note 6) No Load 16 35 mV ISINK = 5mA 150 300 mV ISINK = 25mA 600 1200 mV VOH Output Voltage Swing High (Note 6) No Load 16 40 mV ISOURCE = 5mA 250 500 mV ISOURCE = 25mA 1200 2400 mV SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOH Output Voltage Swing High (Note 6) No Load l 16 40 mV ISOURCE = 0.5mA l 55 110 mV ISOURCE = 15mA, VS = 5V l 860 1700 mV ISOURCE = 10mA, VS = 3V l 580 1200 mV ISC Short-Circuit Current V S = 5V l – 17 – 36 mA VS = 3V l – 12 – 24 mA IS Supply Current per Amplifier l 4.95 6.2 mA GBW Gain-Bandwidth Product (Note 7) f = 100kHz l 20 40 MHz SR Slew Rate (Note 8) V S = 5V, AV = –1, RL = Open, VO = 4V l 11 22 V/ ms VS = 3V, AV = –1, RL = Open l 91 8 V / ms TA = 25°C, VS = –15V, VCM = 0V, VOUT = 0V, unless otherwise noted.

TA = 25°C, VS = –15V, VCM = 0V, VOUT = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ISC Short-Circuit Current – 35 – 70 mA IS Supply Current per Amplifier 4.6 6 mA GBW Gain-Bandwidth Product (Note 7) f = 100kHz 22 45 MHz SR Slew Rate A V = –1, R L = Open, VO = –10V, 22 45 V/ ms Measure at VO = –5V tS Settling Time 0.01%, V STEP = 10V, AV = 1, RL = 1k 575 ns SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ – 0.1V l 800 2750 mV VCM = V– + 0.2V l 800 2750 mV VOS TC Input Offset Voltage Drift (Note 3) l 10 17 mV/°C VCM = V+ – 0.1V l 51 1 mV/°C DVOS Input Offset Voltage Shift V CM = V– + 0.2V to V+ – 0.1V l 500 2500 mV Input Offset Voltage Match (Channel-to-Channel) V CM = V– + 0.2V, V+ – 0.1V (Note 5) l 800 4000 mV IB Input Bias Current V CM = V+ – 0.1V l 0 1.3 2.6 mA VCM = V– + 0.2V l –2.6 –1.3 0 mA DIB Input Bias Current Shift V CM = V– + 0.2V to V+ – 0.1V l 2.6 5.2 mA Input Bias Current Match (Channel-to-Channel) V CM = V+ – 0.1V (Note 5) l 70 1040 nA VCM = V– + 0.2V (Note 5) l 70 1040 nA IOS Input Offset Current V CM = V+ – 0.1V l 70 520 nA VCM = V– + 0.2V l 70 520 nA DIOS Input Offset Current Shift V CM = V– + 0.2V to V+ – 0.1V l 140 1040 nA AVOL Large-Signal Voltage Gain V O = –14.5V to 14.5V, R L = 10k l 600 4000 V/mV VO = – 10V to 10V, RL = 2k l 300 2000 V/mV Channel Separation V O = – 10V to 10V, RL = 2k l 110 125 dB CMRR Common Mode Rejection Ratio V CM = V– + 0.2V to V+ – 0.1V l 81 96 dB CMRR Match (Channel-to-Channel) (Note 5) V CM = V– + 0.2V to V+ – 0.1V l 77 95 dB PSRR Power Supply Rejection Ratio V S = –5V to –15V l 80 94 dB PSRR Match (Channel-to-Channel) (Note 5) V S = –5V to –15V l 74 95 dB VOL Output Voltage Swing Low (Note 6) No Load l 21 45 mV ISINK = 5mA l 180 350 mV ISINK = 25mA l 680 1400 mV VOH Output Voltage Swing High (Note 6) No Load l 15 40 mV ISOURCE = 5mA l 300 600 mV ISOURCE = 25mA l 1400 2800 mV ISC Short-Circuit Current l – 28 – 57 mA IS Supply Current per Amplifier l 5.2 6.9 mA GBW Gain-Bandwidth Product (Note 7) f = 100kHz l 20 41 MHz SR Slew Rate A V = –1, R L = Open, VO = –10V, l 21 43 V/ ms Measured at VO = –5V 0°C < TA < 70°C, VS = –15V, VCM = 0V, VOUT = 0V, unless otherwise noted.

–40 °C < TA < 85°C, VS = –15V, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage V CM = V+ – 0.1V l 1000 3000 mV VCM = V– + 0.2V l 1000 3000 mV VOS TC Input Offset Voltage Drift (Note 3) l 10 17 mV/°C VCM = V+ – 0.1V l 51 1 mV/°C DVOS Input Offset Voltage Shift V CM = V– + 0.2V to V+ – 0.1V l 500 2600 mV Input Offset Voltage Match (Channel-to-Channel) V CM = V– + 0.2V, V+ – 0.1V (Note 5) l 850 4000 mV IB Input Bias Current V CM = V+ – 0.1V l 0 1.4 2.8 mA VCM = V– + 0.2V l –2.8 –1.4 0 mA DIB Input Bias Current Shift V CM = V– + 0.2V to V+ – 0.1V l 2.8 5.6 mA Input Bias Current Match (Channel-to-Channel) V CM = V+ – 0.1V (Note 5) l 75 1120 nA VCM = V– + 0.2V (Note 5) l 75 1120 nA IOS Input Offset Current V CM = V+ – 0.1V l 60 560 nA VCM = V– + 0.2V l 60 560 nA DIOS Input Offset Current Shift V CM = V– + 0.2V to V+ – 0.1V l 120 1120 nA AVOL Large-Signal Voltage Gain V O = –14.5V to 14.5V, R L = 10k l 500 5000 V/mV VO = – 10V to 10V, RL = 2k l 250 1800 V/mV Channel Separation V O = – 10V to 10V, RL = 2k l 110 124 dB CMRR Common Mode Rejection Ratio V CM = V– + 0.2V to V+ – 0.1V l 81 96 dB CMRR Match (Channel-to-Channel) (Note 5) V CM = V– + 0.2V to V+ – 0.1V l 77 95 dB PSRR Power Supply Rejection Ratio V S = –5V to –15V l 80 93 dB PSRR Match (Channel-to-Channel) (Note 5) V S = –5V to –15V l 74 95 dB VOL Output Voltage Swing Low (Note 6) No Load l 23 50 mV ISINK = 5mA l 187 350 mV ISINK = 25mA l 700 1400 mV VOH Output Voltage Swing High (Note 6) No Load l 16 40 mV ISOURCE = 5mA l 300 600 mV ISOURCE = 25mA l 1500 3000 mV ISC Short-Circuit Current l – 27 – 54 mA IS Supply Current per Amplifier l 5.3 7 mA GBW Gain-Bandwidth Product (Note 7) f = 100kHz l 20 40 MHz SR Slew Rate A V = –1, R L = Open, VO = –10V, l 18 35 V/ ms Measure at VO = –5V Note 5: Matching parameters are the difference between amplifiers A and D and between B and C on the LT1633; between the two amplifiers on the LT1632. Note 6: Output voltage swings are measured between the output and power supply rails. Note 7: VS = 3V, VS = –15V GBW limit guaranteed by correlation to 5V tests. Note 8: VS = 3V, VS = 5V slew rate limit guaranteed by correlation to –15V tests. Note 9: Minimum supply voltage is guaranteed by testing the change of VOS to be less than 250mV when the supply voltage is varied from 3V to 2.7V. The l denotes specifications that apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 3: This parameter is not 100% tested. Note 4: The LT1632C/LT1633C are guaranteed to meet specified performance from 0°C to 70°C and are designed, characterized and expected to meet these extended temperature limits, but are not tested at –4 0°C and 85°C. Guaranteed I grade parts are available, consult factory.

TYPICAL PERFORMANCE CHARACTERISTICS UW Supply Current vs Supply Voltage TOTAL SUPPLY VOTAGE (V) SUPPLY CURRENT PER AMPLIFIER (mA) 1630/31 G01 81 2 16 20 24 28 32 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 TA = 125°C TA = –55 °C TA = 25°C TEMPERATURE (°C) –50 INPUT BIAS CURRENT (µA) 2.8 2.0 1.2 0.4 –0.4 –1.2 –2.0 –2.8 1632/33 G04 –20 10 40–35 85 –5 25 55 100 VS = 5V, 0V VCM = 0V VS = –15V VCM = 15V NPN ACTIVE PNP ACTIVE VS = –15V VCM = –15V VS = 5V, 0V VCM = 5V TEMPERATURE (°C) –75 SUPPLY CURRENT PER AMPLIFIER (mA) 1632/33 G02 –50 –25 25 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 50 75 125 100 VS = –15V VS = 5V, 0V Supply Current vs Temperature Input Bias Current vs Temperature LOAD CURRENT (mA) SATURATION VOLTAGE (V) 0.01 1 10 100 1632/33 G05 0.1 0.1 0.01 VS = 5V, 0V TA = –55°C TA = 125°C TA = 25°C Output Saturation Voltage vs Load Current (Output Low) LOAD CURRENT (mA) SATURATION VOLTAGE (V) 0.01 1 10 100 1632/33 G06 0.1 0.1 0.01 VS = 5V, 0V TA = –55°C TA = 125°C TA = 25°C Output Saturation Voltage vs Load Current (Output High) COMMON MODE VOLTAGE (V) INPUT BIAS CURRENT (µA) 23456 1632/33 G03 –1 0 1 2.0 1.5 1.0 0.5 –0.5 –1.0 –1.5 –2.0 TA = 125°C TA = –55 °C TA = 25°C VS = 5V, 0V Input Bias Current vs Common Mode Voltage VOS Distribution, VCM = 0V (PNP Stage) VOS Distribution, VCM = 5V (NPN Stage) INPUT OFFSET VOLTAGE (µV) –1250 PERCENT OF UNITS (%) 750 1632/33 G31 –750 –250 250 1250 VS = 5V, 0V VCM = 0V INPUT OFFSET VOLTAGE (µV) –1250 PERCENT OF UNITS (%) 750 1632/33 G32 –750 –250 250 1250 VS = 5V, 0V VCM = 5V INPUT OFFSET VOLTAGE (µV) –1250 PERCENT OF UNITS (%) 750 1632/33 G33 –750 –250 250 1250 VS = 5V, 0V DVOS Shift for VCM = 0V to 5V

TYPICAL PERFORMANCE CHARACTERISTICS UW TOTAL SUPPLY VOLTAGE (V) CHANGE IN OFFSET VOLTAGE (mV) 100 200 300 400 23 4 5 1632/33 G07 500 600 TA = 125°C TA = –55 °C TA = 25°C FREQUENCY (Hz) NOISE VOLTAGE (nV/ÖHz) 10 100 1000 11632/33 G09 VS = 5V, 0V VCM = 2.5V PNP ACTIVE VCM = 4.25V NPN ACTIVE Noise Voltage SpectrumMinimum Supply Voltage 0.1Hz to 10Hz Output Voltage Noise Gain Bandwidth and Phase Margin vs Supply Voltage TOTAL SUPPLY VOLTAGE (V) GAIN BANDWIDTH (MHz) PHASE MARGIN (DEG) 5 10 15 20 1632/33 G14 120 105 PHASE MARGIN VCM = VS/2 GAIN BANDWIDTH Gain and Phase vs Frequency FREQUENCY (Hz) COMMON MODE REJECTION RATIO (dB) 100 120 110 1k 100k 1M 10M 1632/33 G12 10k VS = –15V VS = 5V, 0V CMRR vs Frequency PSRR vs Frequency FREQUENCY (Hz) POWER SUPPLY REJECTION RATIO (dB) 100 1k 100k 1M 10M 1632/33 G13 10k VS = –15V POSITIVE SUPPLY NEGATIVE SUPPLY Channel Separation vs Frequency FREQUENCY (Hz) CHANNEL SEPARATION (dB) 100 1k 10k 100k 1M 1632/33 G15 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 VS = –15V VOUT = –10VP-P RL = 2k Noise Current Spectrum FREQUENCY (Hz) CURRENT NOISE (pA/ÖHz) 10 100 1000 1632/33 G10 VS = 5V, 0V VCM = 2.5V PNP ACTIVE VCM = 4.25V NPN ACTIVE FREQUENCY (MHz) VOLTAGE GAIN (dB) PHASE SHIFT (DEG) –10 –20 225 180 135 –45 –90 –135 –180 –225 0.01 1 10 100 1632/33 G11 0.1 PHASE GAIN RL = 1k VS = 3V, 0V VS = –15V TIME (1SEC/DIV) OUTPUT VOLTAGE (200nV/DIV) 1632/33 G08 VS = 5V, 0V VCM = VS/2

TYPICAL PERFORMANCE CHARACTERISTICS UW Output Step vs Settling Time to 0.01% SETTLING TIME (ms) 0 0.25 –10 OUTPUT STEP (V) 0.50 0.75 1.00 1632/33 G18 VS = –15V NONINVERTING INVERTING INVERTINGNONINVERTING CAPACITIVE LOAD (pF) OVERSHOOT (%) 10 100 1000 1632/33 G16 VS = 5V, 0V AV = 1 RL = 1k Capacitive Load Handling OUTPUT VOLTAGE (V) INPUT VOLTAGE (µV) 200 150 100 –50 –100 –150 –200 1632/33 G21 10246 57 VS = – 15V RL = 100Ω OUTPUT VOLTAGE (V) INPUT VOLTAGE (mV) 3 5 1632/33 G20 12 4 –10 –15 –20 VS = 5V, 0V RL = 1k RL = 10k Open-Loop Gain Open-Loop Gain Open-Loop Gain OUTPUT VOLTAGE (V) –20 –15 INPUT VOLTAGE (mV) 1632/33 G19 –10 –20 –10 –5 05 10 15 –15 VS = –15V RL = 1k RL = 10k TIME AFTER POWER-UP (SEC) CHANGE IN OFFSET VOLTAGE (mV) 100 –100 –200 –300 –400 –500 60 100 160 1632/33 G22 20 40 80 120 140 N8 PACKAGE, VS = 5V, 0V S8 PACKAGE, VS = 5V, 0V N8 PACKAGE, VS = –15V LT1633CS, VS = 5V, 0V S8 PACKAGE, VS = –15V LT1633CS, VS = –15V FREQUENCY (kHz) THD + NOISE (%) 0.1 0.01 0.001 0.0001 0.1 10 100 1632/33 G23 VS = 3V, 0V AV = 1 VIN = 2VP-P RL = 10k VS = 5V, 0V AV = 1 VS = 5V, 0V AND 3V, 0V AV = –1 Total Harmonic Distortion + Noise vs Frequency TOTAL SUPPLY VOLTAGE (V) SLEW RATE (V/µs) 81 2 2 0 2 8 3 241 6 24 36 1632/33 G17 RISING EDGE FALLING EDGE VOUT = 80% OF VS AV = –1 Slew Rate vs Supply Voltage FREQUENCY (kHz) OUTPUT VOLTAGE SWING (VP-P) 10 100 1000 1630/31 G24 AV = –1 VS = 5V, 0V AV = 1 Maximum Undistorted Output Signal vs FrequencyWarm-Up Drift vs Time

TYPICAL PERFORMANCE CHARACTERISTICS UW 5V Large-Signal Response 1632/33 G26VS = 5V, 0V AV = 1 RL = 1k 5V Small-Signal Response

163233 G25VS = 5V, 0V

AV = 1 RL = 1k Harmonic Distortion vs Frequency FREQUENCY (kHz) 100 HARMONIC DISTORTION (dBc) –20 –40 –60 –80 –100 1000 2000 1632/33 G29 200 500 VS = 5V, 0V AV = 1 VIN = 2VP-P RL = 150Ω RL = 1k 2ND 3RD 2ND 3RD Harmonic Distortion vs Frequency –15V Large-Signal Response 1632/33 G27 VS = –15V AV = 1 RL = 1k –15V Small-Signal Response FREQUENCY (kHz) 100 HARMONIC DISTORTION (dBc) –20 –40 –60 –80 –100 1000 2000 1632/33 G301000 200 500 2ND 3RD 3RD VS = 5V, 0V AV = –1 VIN = 2VP-P RL = 150Ω RL = 1k 2ND 1632/33 G28VS = –15V AV = 1 RL = 1k APPLICATIONS INFORMATIONWU UU Rail-to-Rail Input and Output The LT1632/LT1633 are fully functional for an input and output signal range from the negative supply to the posi- tive supply. Figure 1 shows a simplified schematic of the amplifier. The input stage consists of two differential amplifiers, a PNP stage Q1/Q2 and an NPN stage Q3/Q4 that are active over different ranges of input common mode voltage. The PNP differential input pair is active for input common mode voltages V CM between the negative supply to approximately 1.5V below the positive supply. As V CM moves closer toward the positive supply, the transistor Q5 will steer the tail current I 1 to the current mirror Q6/Q7, activating the NPN differential pair and the PNP pair becomes inactive for the rest of the input com- mon mode range up to the positive supply. The output is configured with a pair of complementary common emitter stages Q14/Q15 that enables the output to swing from rail to rail. These devices are fabricated on Linear Technology’s proprietary complementary bipolar process to ensure similar DC and AC characteristics. Capacitors C1 and C2 form local feedback loops that lower the output impedance at high frequencies. Power Dissipation The LT1632/LT1633 amplifiers combine high speed and large output current drive in a small package. Because the

voltage or use the DIP package part. to be less than 1500mV on a single 5V supply. active, the input bias currents flow out of the input pins. Figure 1. LT1632 Simplified Schematic Diagram

APPLICATIONS INFORMATIONWU UU They flow in the opposite direction when the NPN input stage is active. The offset voltage error due to input bias currents can be minimized by equalizing the noninverting and inverting input source impedance. Output The outputs of the LT1632/LT1633 can deliver large load currents; the short-circuit current limit is 70mA. Take care to keep the junction temperature of the IC below the absolute maximum rating of 150 °C (refer to the Power Dissipation section). The output of these amplifiers have reverse-biased diodes to each supply. If the output is forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to several hundred mA, no damage to the part will occur. Overdrive Protection To prevent the output from reversing polarity when the input voltage exceeds the power supplies, two pairs of crossing diodes D1 to D4 are employed. When the input voltage exceeds either power supply by approximately 700mV, D1/D2 or D3/D4 will turn on, forcing the output to the proper polarity. For this phase reversal protection to work properly, the input current must be limited to less than 5mA. If the amplifier is to be severely overdriven, an external resistor should be used to limit the overdrive current. The LT1632/LT1633’s input stages are also protected against large differential input voltages by a pair of back- to-back diodes D5/D8. When a differential voltage of more than 1.4V is applied to the inputs, these diodes will turn on, preventing the emitter-base breakdown of the input transistors. The current in D5/D8 should be limited to less than 10mA. Internal 225W resistors R6 and R7 will limit the input current for differential input signals of 4.5V or less. For larger input levels, a resistor in series with either or both inputs should be used to limit the current. Worst-case differential input voltage usually occurs when the output is shorted to ground. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins. Capacitive Load The LT1632/LT1633 are wideband amplifiers that can drive capacitive loads up to 200pF on –15V supplies in a unity-gain configuration. On a 3V supply, the capacitive load should be kept to less than 100pF. When there is a need to drive larger capacitive loads, a resistor of 20W to 50W should be connected between the output and the capacitive load. The feedback should still be taken from the output so that the resistor isolates the capacitive load to ensure stability. Feedback Components The low input bias currents of the LT1632/LT1633 make it possible to use the high value feedback resistors to set the gain. However, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. For instance, the LT1632/LT1633 in a noninverting gain of 2, set with two 20k resistors, will probably oscillate with 10pF total input capacitance (5pF input capacitance and 5pF board capacitance). The amplifier has a 6MHz cross- ing frequency and a 55° phase margin at 6dB of gain. The feedback resistors and the total input capacitance form a pole at 1.6MHz that induces a phase shift of 75° at 5MHz! The solution is simple: either lower the value of the resistors or add a feedback capacitor of 10pF or more. TYPICAL APPLICATIONSU Single Supply, 40dB Gain, 550kHz Instrumentation Amplifier An instrumentation amplifier with a rail-to-rail output swing, operating from a 3V supply can be constructed with the LT1632 as shown in the first page of this data sheet. The amplifier has a nominal gain of 100, which can be adjusted with resistor R5. The DC output level is set by the difference of the two inputs multiplied by the gain of 100. The voltage gain and the DC output level can be expressed as follows:

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. S Package 14-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) temperature range. The op amp A1 combined with Q1, Q2, R1, R2 and R3 establishes two current sources of 21.5mA to bias RF1 and RF2 amplifiers. The current of Q1, is determined by the voltage across R2 over R1, which is then replicated in Q2. These current sources are stable and precise over temperature and have a low dissipated power due to a low voltage drop between their terminals. The amplifier A2 is used to restore the DC level at the output. With a large output current of the LT1632, the output can be set at 1.5V DC on 5V supply and 50W load. This circuit has a – 3dB bandwidth from 2MHz to 2GHz and a power gain of 25dB. TYPICAL APPLICATIONSU 0.016 – 0.050 0.406 – 1.270 0.010 – 0.020 0° – 8° TYP 0.008 – 0.010 (0.203 – 0.254) S14 0695 1 2 3 4 0.150 – 0.157** (3.810 – 3.988) 14 13 0.337 – 0.344* (8.560 – 8.738) 0.228 – 0.244 (5.791 – 6.197) 12 11 10 9 5 6 7 80.053 – 0.069 (1.346 – 1.752) 0.014 – 0.019 (0.355 – 0.483) 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) TYP DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE PACKAGE DESCRIPTIONU Dimensions in inches (millimeters) unless otherwise noted. 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) N8 1197 0.009 – 0.015 (0.229 – 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.325 +0.035 –0.015 +0.889 –0.3818.255() 0.100 – 0.010 (2.540 – 0.254) 0.065 (1.651) TYP 0.045 – 0.065 (1.143 – 1.651) 0.130 – 0.005 (3.302 – 0.127) 0.020 (0.508) MIN0.018 – 0.003 (0.457 – 0.076) 0.125 (3.175) MIN 12 3 4 87 6 5 0.255 – 0.015* (6.477 – 0.381) 0.400* (10.160) MAX *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) SO8 0996 0.016 – 0.050 0.406 – 1.270 0.010 – 0.020 0°– 8° TYP 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0.014 – 0.019 (0.355 – 0.483) 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) TYP 1 2 3 4 0.150 – 0.157** (3.810 – 3.988) 8 7 6 5 0.189 – 0.197* (4.801 – 5.004) 0.228 – 0.244 (5.791 – 6.197) DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE