LTC3290 AD | Alldatasheet
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Technical content
Features
Applications
Description
Electrical Characteristics
Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
Rev. 0 For more information www.analog.com PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS Operating Junction Temperature Range (Notes 1, 3) VAUX EN VIN VOUT VSET FB PGOOD BIAS TOP VIEW GND MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 45°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3290EMSE#PBF LTC3290EMSE#TRPBF L TGZW 10-Lead Plastic MSOP –40°C to 125°C LTC3290IMSE#PBF LTC3290IMSE#TRPBF L TGZW 10-Lead Plastic MSOP –40°C to 125°C LTC3290HMSE#PBF LTC3290HMSE#TRPBF L TGZW 10-Lead Plastic MSOP –40°C to 150°C LTC3290MPMSE#PBF LTC3290MPMSE#TRPBF L TGZW 10-Lead Plastic MSOP –55°C to 150°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
Rev. 0For more information www.analog.com Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3290 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3290E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3290I is guaranteed over the –40°C to 125°C operating junction temperature range, the LTC3290H is guaranteed over the –40°C to 150°C operating junction temperature range and the LTC3290MP is guaranteed over the –55°C to 150°C operating junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA = 45°C/W is the package thermal impedance. Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 4: This IC includes overvoltage protection that is intended to protect the device during momentary overload conditions. Pin voltages will exceed ABSMAX voltage ratings of the part while the protection is active. Continuous operation above the ABSMAX voltage ratings may result in device degradation or failure. Note 5: Current limit is a protection feature. Refer to Available Output Current section in Applications Information for additional information. During a short-circuit event, the current limit is folded back further to reduce power dissipation. The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2), VIN = EN = 12V, VAUX = 5V. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Boost Charge Pump VIN Input Supply Voltage Range l 4.5 55 V VAUX Auxiliary Supply Voltage Range l 4.5 55 V (VIN + VAUX) Sum of Input Supply Voltages l 9 55 V (VIN + VAUX)_OV Input Overvoltage Rising Threshold Hysteresis (VIN + VAUX) Rising, VSET = Hig (Note 4) 63 65 67 V V VOUT_OV Output Overvoltage Rising Threshold Hysteresis VOUT Rising (Note 4) 63 65 67 V V IVIN VIN Quiescent Current Shutdown, EN = 0V IVOUT = 0mA µA µA IVAUX VAUX Quiescent Current Shutdown, EN = 0V IVOUT = 0mA µA µA VFB FB Regulation Voltage l 0.98 1 1.02 V ROL Effective Open Loop Output Resistance 65 Ω ICL_VOUT VOUT Current Limit VOUT Not in Regulation (Note 5) l 100 150 200 mA VENH Enable Pin Threshold Rising l 1.1 2 V VENL Enable Pin Threshold Falling l 0.4 1 V VSETH VSET Pin Threshold Rising l 1.1 2 V VSETL VSET Pin Threshold Falling l 0.4 1 V IEN Enable Pin Leakage Current –1 0 1 µA VPG_RISE_BST PGOOD Pin Threshold Rising in Boost % of Final Regulation Voltage, VSET = GND l 95 98 % VPG_FALL_BST PGOOD Pin Threshold Falling in Boost % of Final Regulation Voltage, VSET = GND l 88 91 % VPG_RISE_TRK PGOOD Pin Threshold Rising in T racking Offset from Programmed VOUT –1.5 V VPG_FALL_TRK PGOOD Pin Threshold Falling in T racking Offset from Programmed VOUT –1.6 V IPGOOD_HIGH PGOOD Output High Leakage Current VPGOOD = 3V l –1 1 µA VPGOOD_LOW PGOOD Output Low Voltage IPGOOD = 0.2mA l 0.1 0.4 V
Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Shutdown Current vs Temperature Quiescent Current vs Temperature (Boost Mode) Quiescent Current vs Temperature (VIN T racking Mode) T A = 25°C, CF LY = 1µF, CIN = CAUX = COUT = 10µF unless otherwise noted. VOUT Effective Open Loop Resistance vs Temperature VOUT Current Limit vs Supply Voltage TEMPERATURE (°C) –100 SHUTDOWN CURRENT (µA) 0 100–50 50 150
3290 G01
VIN = 4.5V VIN = 55V VIN = 12V TEMPERATURE (°C) –100 EFFECTIVE ROL (/uni03A9) 100 0 100–50 50 150
3290 G04
VIN = 12V VAUX = 5V INPUT SUPPL Y VOL TAGE (V) SHORT-CIRCUIT CURRENT (mA) 180 160 120 140 100 5020
3290 G05
TEMPERATURE (°C) –100 FB PIN VOL TAGE (V) 1.020 1.010 1.005 1.015 1.000 0.995 0.990 0.985 0.980 0 100–50 50 150
3290 G06
VIN = 12V INPUT SUPPL Y VOL TAGE (V) BIAS PIN VOL TAGE (V) 5.0 4.5 3.5 2.5 1.5 0.5 4.0 3.0 2.0 1.0 5020
3290 G07
TEMPERATURE (°C) –100 QUIESCENT CURRENT (µA) 0 100–50 50 150
3290 G02
VIN = 4.5V VIN = 55V VIN = 12V TEMPERATURE (°C) –100 QUIESCENT CURRENT (µA) 0 100–50 50 150
3290 G03
VIN = 4.5V VIN = 55V VIN = 12V FB Pin Voltage vs Temperature VBIAS vs Supply Voltage
Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS T A = 25°C, CF LY = 1µF, CIN = CAUX = COUT = 10µF unless otherwise noted. VOUT Output Ripple (Boost Mode) VOUT T ransient (Boost Mode) VOUT Output Ripple (T racking Mode) VOUT T ransient (T racking Mode) VOUT 200mV/DIV AC-COUPLED 250µs/DIV
3290 G08
VIN = 12V , VAUX = 5V , VOUT– = 15V , IVOUT = 20mA VOUT 200mV/DIV AC-COUPLED 20mA 1mA IVOUT 2.5ms/DIV
3290 G09
VIN = 12V , VAUX = 5V , VOUT– = 15V , IVOUT = 1mA TO 20mA VOUT 200mV/DIV AC-COUPLED 250µs/DIV
3290 G10
VIN = 12V , VAUX = 12V , VOUT– = (VIN + 10V), IVOUT = 20mA VOUT 200mV/DIV AC-COUPLED 20mA 1mA IVOUT 2.5ms/DIV
3290 G11
VIN = 12V , VAUX = 12V , VOUT– = (VIN + 10V), IVOUT = 1mA TO 20mA
Rev. 0 For more information www.analog.com PIN FUNCTIONS VAUX (Pin 1): Auxiliary Input Supply Voltage. VAUX should be bypassed with a low impedance ceramic capacitor . EN (Pin 2): Enable Logic Input. A logic high on the EN pin enables the part and regulates the output voltage to the desired value depending on the circuit configuration and the state of the VSET pin. Do not float this pin. C+ (Pin 3): Flying Capacitor Positive Connection. C– (Pin 4): Flying Capacitor Negative Connection. VIN (Pin 5): Input Supply Voltage. VIN should be bypassed with a low impedance ceramic capacitor . BIAS (Pin 6): Internal BIAS Voltage, 4.5V (typ). Connect this pin to a 4.7µF bypass capacitor to GND. A ceramic capacitor of at least 6.3V rating is recommended. The bias pin is for internal operation only and should not be loaded or driven externally. PGOOD (Pin 7) : Power Good Output. This open drain output is low when the part is enabled and the output is not in regulation. Once the part reaches regulation, this pin transitions to a Hi-Z state. An external resistor pull-up to a suitable voltage ≤ 3.6V is required to interface this pin with external circuitry such as a microprocessor . FB (Pin 8): Feedback Input Voltage. When the VSET pin is set to GND, the FB pin functions as a conventional feedback input pin. An external resistor divider from the V OUT pin to GND sets the output voltage at the V OUT pin. The FB pin servos to 1V to achieve the desired output voltage at the VOUT pin. In tracking mode, an external resistor from the FB pin to GND generates a reference current. This current is replicated at the VSET pin. An external resistor from VOUT to the VSET pin sets the effective voltage at the VOUT Pin. This configuration is used in the tracking mode, when VOUT is desired to be set to a fixed offset voltage above the input voltage VIN. VSET (Pin 9): Output Voltage Set Pin. An external resis - tor from this pin to the V OUT pin sets the output voltage of the part in VIN tracking mode. For conventional boost charge pump operation, this pin must be grounded. Do not float this pin. VOUT (Pin 10): Output Voltage. This pin should be bypassed with a low impedance ceramic capacitor to GND in normal boost charge pump mode or to the V IN pin in VIN track- ing mode. When the VSET pin is set to GND, the VOUT pin voltage is set by an external divider between the VOUT, FB and GND pins. In V IN tracking mode, the V OUT pin oper- ates at a fixed offset voltage above the VIN pin. The value of the offset voltage is set by a pair of external resistors, one from the VOUT pin to the VSET pin and another from the FB pin to GND. GND (Exposed Pad Pin 11): Ground. The exposed package is ground and must be soldered to the PC board ground plane for proper functionality and for rated thermal per - formance.
Rev. 0For more information www.analog.com BLOCK DIAGRAM VSET VSET GND 3290 BD BIAS6 EN2 C–4 VOUT VIN PGOOD 7 FB 8 VSET VAUX VIN VOS S4BOOST CHARGE PUMP 250kHz INTERNAL OSC CHARGE PUMP AND INPUT LOGIC REF INTERNAL BIAS PGOOD REF
to generate boosted output voltages up to 55V. S1 and S4 are opened, while switches S2 and S3 are closed. FB and GND pins sets the output voltage at the VOUT pin. rent equal to 2 • (1V/R1) to the total quiescent current. Recommended range of values for R1 is 100k to 500k.
3290 F02
Figure 1. Boost Charge Pump with VOUT Regulation Figure 2. Boost Charge Pump with VIN T racking
3290 F03
Figure 3. Equivalent Open-Loop Circuit Figure 4. Typical ROL vs Temperature commanded shutdown or thermal shutdown. ROL, and the effective output voltage, (VIN + VAUX)(MIN). mentary overload conditions outside of normal operation. erating junction temperature may impair device reliability. ripple, charge pump strength and minimum turn-on time.
3290 F04
resistances (RS) and the ESR of the external capacitors. of temperature are shown in Figure 4.
Rev. 0 For more information www.analog.com APPLICATIONS INFORMATION with a ceramic capacitor to increase the total capacitance but should not be used alone because of their high ESR. Increasing the size of C OUT will reduce the output ripple at the expense of higher minimum turn-on time. Just as the value of C OUT controls the amount of output ripple, the values of CIN and CAUX control the amount of ripple present at the input pins (VIN and VAUX). The amount of bypass capacitance required at the input depends on the source impedance driving VIN and VAUX. For best re- sults it is recommended that V IN and VAUX be bypassed with at least 5µF of low ESR capacitance. A high ESR capacitor such as tantalum or aluminum will have higher input noise than a low ESR ceramic capacitor . Therefore, a ceramic capacitor is recommended as the main bypass capacitance with a tantalum or aluminum capacitor used in parallel if desired. Flying Capacitor Selection The flying capacitor (C F LY) controls the strength of the charge pumps. A 1µF or greater ceramic capacitor is sug- gested for the flying capacitor for applications requiring the full rated output current of the charge pump. Polarized capacitors such as aluminum or tantalum should not be used for C F LY because the voltage on C F LY can reverse during startup. For very light load applications, the flying capacitor may be reduced to save space or cost. For example, a 0.2µF capacitor might be sufficient for load currents up to 10mA. A smaller flying capacitor leads to a larger effective open loop resistance (ROL) and thus limits the maximum load current that can be delivered by the charge pump. Ceramic Capacitors Ceramic capacitors of different materials lose their capaci- tance with higher temperature and voltage at different rates. For example, a capacitor made of X5R or X7R material will retain most of its capacitance from –40°C to 85°C whereas a Z5U or Y5V style capacitor will lose considerable capacitance over that range. Z5U and Y5V capacitors may also have a poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. The capacitor manufacture’s data sheet should be consulted to ensure the desired capacitance at all temperatures and voltages. Below is a list of ceramic capacitor manufacturers and their websites. AVX www.avxcorp.com Kemet www.kemet.com Murata www.murata.com Taiyo Yuden www.t-yuden.com Vishay www.vishay.com TDK www.component.tdk.com Layout Considerations Due to high switching frequency and high transient cur - rents produced by the LTC3290, careful board layout is necessary for optimum performance. A true ground plane and short connections to all the external capacitors will improve performance and ensure proper regulation under all conditions. Figure 5 shows an example layout for the LTC3290. The flying capacitor nodes C+, and C– switch large currents at a high frequency. These nodes should not be routed close to sensitive pins such as FB and VSET pins. Thermal Management At high input voltages and maximum output current, there can be substantial power dissipation in the LTC3290. If the junction temperature increases above approximately 175°C, the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board ground plane is recommended. Connecting the exposed pad of the package to a ground plane under the device on two layers of the PC board can reduce the thermal resistance of the package and PC board considerably.
Figure 5. Recommended Layout Figure 6. Maximum Power Dissipation vs Ambient Temperature where IOUT denotes the output load current. enabled and the part resumes normal operation.
3290 F06
3290 F05
Figure 7. 10V Plus Battery T racking Application Figure 8. 24V to 42V Boost Figure 9. High Side FET Driver with Inrush Current Limiting and Load Disconnect
3290 TA04
3290 TA03
3290 TA05
Rev. 0For more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. PACKAGE DESCRIPTION MSOP (MSE) 0213 REV I 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 1 2 3 4 5 4.90 ±0.152 (.193 ±.006) 0.497 ±0.076 (.0196 ±.003) REF8910 7 6 3.00 ±0.102 (.118 ±.004) (NOTE 3) 3.00 ±0.102 (.118 ±.004) (NOTE 4) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 1.68 ±0.102 (.066 ±.004) 1.88 ±0.102 (.074 ±.004) 0.50 (.0197) BSC 0.305 ± 0.038 (.0120 ±.0015) TYP BOTTOM VIEW OF EXPOSED PAD OPTION 1.68 (.066) 1.88 (.074) 0.1016 ±0.0508 (.004 ±.002) DETAIL “B” DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE
0.05 REF
0.29 REF 10-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1664 Rev I)
Figure 10. (VIN + 10V) T racking Power Supply