LT1457

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n Handles 10,000pF Capacitive Load n 450µV Max Offset Voltage n 1200µV Max Offset Voltage in S8 Package n 50pA Bias Current at 70°C n 13nV/√Hz Voltage Noise n 4V/µs Slew Rate n 4µV/°C Drift n 130dB Channel Separation The LT1457 is a dual, JFET input op amp optimized for handling large capacitive loads in combination with preci- sion performance. Precision specifications include 220 µV offset voltage in plastic and surface mount packages. At 70 °C input bias current is 50pA, input offset current is 20pA. Channel separation is 130dB. Other dual JFET input op amps from Linear Technology include the LT1057, which is three times faster than the LT1457 but at the expense of significantly lower capacitive load handling capability; and the LT1113 with 4.5nV/√Hz voltage noise. Dual, Precision JFET Input Op Amp FEATURES DESCRIPTIONU VS = ±15V TA = 25°C AV = +1 CAPACITIVE LOAD (nF) 100OVERSHOOT (%) 100 LT11457• TA01 0.1 1 10 Capacitive Load Handling Input Offset Voltage Distribution n Sample-and-Hold (Drives Large Hold Capacitors) n A/D and D/A Converters n Photodiode Amplifiers n Voltage-to-Frequency Converters APPLICATIONSU TYPICAL PERFORMANCE CHARACTERISTICS UW INPUT OFFSET VOLTAGE (mV) PERCENT OF UNITS 1.0 LT1457 • TA02 VS = –15V TA = 25°C

400 DUALS

(800 OP AMPS) TESTED FROM

3 RUNS

ABSOLUTE MAXIMUM RATINGSW WW U PACKAGE/ORDER INFORMATIONW UU LT1457S8 –IN A +IN A TOP VIEW N8 PACKAGE 8-LEAD PLASTIC DIP OUT A OUT B –IN B +IN B A B TJMAX = 115°C, θJA = 130°C/ W +IN B –IN A TOP VIEW S8 PACKAGE 8-LEAD PLASTIC SOIC +IN A OUT A –IN B OUT BB A NOTE: THIS PIN CONFIGURATION DIFFERS FROM THE 8-LEAD DIP PIN LOCATIONS. INSTEAD, IT FOLLOWS THE INDUSTRY STANDARD LT1013DS8 SO PACKAGE CONFIGURATION. TJMAX = 130°C, θJA = 190°C/ W S8 PART MARKING 1457 Consult factory for Industrial and Military grade parts. LT1457AC LT1457C/LT1457S8 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage LT1457AC/C 150 450 200 800 µV LT1457S8 220 1200 µV IOS Input Offset Current Fully Warmed Up 3 40 4 50 pA IB Input Bias Current Fully Warmed Up ±5 ±50 ±7 ±75 pA Input Resistance-Differential 10 12 1012 Ω -Common-Mode V CM = –11V to 8V 10 12 1012 Ω VCM = 8V to 11V 10 11 1011 Ω Input Capacitance 4 4 pF en Input Noise Voltage 0.1Hz to 10Hz 2.0 2.1 µVP–P en Input Noise Voltage Density f O = 10Hz 26 28 nV/ √Hz fO = 1kHz (Note 2) 13 22 14 24 nV/ √Hz in Input Noise Current Density f O = 10Hz, 1kHz (Note 3) 1.5 4 1.8 6 fA/ √Hz AVOL Large-Signal Voltage Gain V O = ±10V, RL = 2k 150 350 100 300 V/mV VO = ±10V, RL = 1k 120 250 80 220 V/mV Input Voltage Range ±10.5 14.3 ±10.5 14.3 V –11.5 –11.5 V CMRR Common-Mode Rejection Ratio V CM = ±10.5V 86 100 82 98 dB PSRR Power Supply Rejection Ratio V S = ±4.5V to ±18V 88 103 86 102 dB VOUT Output Voltage Swing R L = 2k ±12 ±13 ±12 ±13 V SR Slew Rate 2 4 2 4 V/ µs VS = ±15V, TA = 25°C,VCM = 0V unless otherwise noted. (Note 1)ELECTRICAL CHARACTERISTICS

GBW Gain-Bandwidth Product (Note 5) 1.0 1.7 1.0 1.7 MHz IS Supply Current Per Amplifier 1.8 3.0 1.8 3.0 mA Channel Separation DC to 5kHz, V IN = ±10V 132 130 dB LT1457AC LT1457C/LT1457S8 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VS = ±15V, TA = 25°C,VCM = 0V unless otherwise noted. (Note 1)ELECTRICAL CHARACTERISTICS VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.ELECTRICAL CHARACTERISTICS LT1457AC LT1457C/LT1457S8 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage LT1457AC/C l 350 1100 400 1800 µV LT1457S8 l 500 2300 µV Average Temperature Coefficient of l 31 0 41 6 µV/°C Input Offset Voltage IOS Input Offset Current Warmed Up, T A = 85°C 0.1 0.5 0.1 0.6 nA IB Input Bias Current Warmed Up, T A = 85°C ± 0.2 ± 0.7 ±0.2 ±0.9 nA AVOL Large-Signal Voltage Gain V O = ±10V, RL = 2k l 40 120 30 110 V/mV CMRR Common-Mode Rejection Ratio V CM = ±10.4V l 84 97 80 95 dB PSRR Power Supply Rejection Ratio V S = ±5V to ±17V l 86 100 83 98 dB VOUT Output Voltage Swing R L = 2k l ±12 ±12.7 ±12 ±12.6 V IS Supply Current Per Amplifier T A = – 40°C 3.8 3.8 mA TA = 85°C 1.7 1.7 mA VS = ±15V, VCM = 0V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 6)ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range. Note 1: Typical parameters are defined as the 60% yield of distributions of individual amplifiers; i.e., out of 100 LT1457s (200 op amps) typically 120 will be better than the indicated specification. Note 2: This parameter is tested on a sample basis only. Note 3: Current noise is calculated from the formula: i n = (2qIb)1/2, where q = 1.6 x 10–19 coulomb. The noise of source resistors up to 1GΩ swamps the contribution of current noise. Note 4: This parameter is not 100% tested. Note 5: Gain-Bandwidth product is not tested. It is guaranteed by design and by inference from the slew rate measurement. Note 6: The LT1457 is not tested and not quality-assurance-sampled at –4 0°C and at 85°C. These specifications are guaranteed by design, correlation, and/or inference from 0°C, 25°C, and 70°C tests. LT1457AC LT1457C/LT1457S8 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VOS Input Offset Voltage LT1457AC/C l 250 900 330 1500 µV LT1457S8 l 400 1900 µV Average Temperature Coefficient of l 31 0 41 6 µV/°C Input Offset Voltage (Note 4) IOS Input Offset Current Warmed Up, T A = 70°C 18 150 20 250 pA IB Input Bias Current Warmed Up, T A = 70°C ±50 ±250 ±60 ±350 pA AVOL Large-Signal Voltage Gain V O = ±10V, RL = 2k l 70 220 50 200 V/mV CMRR Common-Mode Rejection Ratio V CM = ±10.4V l 85 98 80 96 dB PSRR Power Supply Rejection Ratio V S = ±4.5V to ±18V l 87 102 84 100 dB VOUT Output Voltage Swing R L = 2k l ±12 ±12.8 ±12 ±12.8 V IS Supply Current Per Amplifier l 3.2 3.2 mA TA = 70°C 1.7 1.7 mA

TYPICAL PERFORMANCE CHARACTERISTICS UW VS = ±15V VCM = 0V WARMED UP AMBIENT TEMPERATURE (°C) 100 300 1000INPUT BIAS AND OFFSET CURRENT (pA) 100 LT1457 • TPC01 02 5 5 0 7 5 BIAS CURRENT OFFSET CURRENT Input Bias and Offset Current vs Temperature VS = ±15V TA = 25°C N8 PACKAGE S8 PACKAGE TIME AFTER POWER ON (MINUTES) 120 150CHANGE IN OFFSET VOLTAGE (µV) LT1457 • TPC03 01234 Warm-Up Drift VS = ±15V TA = 70°C TA = 25°C COMMON-MODE INPUT VOLTAGE (V) –20 120 140 100 160INPUT BIAS CURRENT (pA) LT1457 • TPC02 –15 –10 –5 0 5 10 Input Bias Current Over the Common-Mode Range Input Offset Voltage Distribution Long Term Drift of Representative UnitsVoltage Gain vs Temperature VS = ±15V VO = ±10VRL = 2k RL = 1k TEMPERATURE (°C) 100 1000 300VOLTAGE GAIN (V/mV) 10075 LT1457 • TPC05 –50 25 –25 50 0 VS = ±15V TA = 25°C TIME (MONTHS) –50 –30 –10 OFFSET VOLTAGE CHANGE (µV) –40 –20 LT1457 • TPC06 012 4 3 0.1Hz to 10Hz NoiseVoltage Noise vs Frequency Channel Separation vs Frequency FREQUENCY (Hz) 100RMS VOLTAGE NOISE DENSITY (nV/√Hz) 10k LT1457 • TPC07 3 10 30 100 300 1k 3k 1/f CORNER = 28Hz VS = ±15V TA = 25°C VS = ±15V TA = 25°C TIME (SECONDS) NOISE VOLTAGE (1µV/DIV) LT1457 • TPC08 024 8 6 FREQUENCY (Hz) 100 140 120 160CHANNEL SEPARATION (dB) LT1457 • TPC09 1 10 100 1k 10k 100k VS = ±15V TA = 25°C VIN = 20VP-P TO 5kHz RL = 2k LIMITED BY THERMAL INTERACTION AT DC = 132dB LIMITED BY PIN TO PIN CAPACITANCE RS = 10Ω RS = 1k INPUT OFFSET VOLTAGE (mV) –0.8 PERCENT OF UNITS 0.8 LT1457 • TPC04 –0.4 0 0.4 –0.6 –0.2 0.2 0.6 VS = –15V TA = 25°C

900 DUALS

(1800 OP AMPS) TESTED FROM 3 RUNS

TYPICAL PERFORMANCE CHARACTERISTICS UW FREQUENCY (Hz) 100 120CMRR (dB) 10M LT1457• TPC10 10 100 1k 10k 1M 100k VS = ±15V TA = 25°C Gain, Phase vs Frequency FREQUENCY (MHz) –15 –10 100 –20 VOLTAGE GAIN (dB) PHASE MARGIN (DEG) LT1457 • TPC16 0.1 1.0 VS = ±15V TA = 25°C PHASE MARGIN = 80°, CL = 10pF PHASE MARGIN = 51°, CL = 1000pF CL = 10pF CL = 10pF GAIN PHASE CL = 1000pF CL = 1000pF TEMPERATURE (°C) 2.5 2.0 1.5 1.0 SLEW RATE (V/µs) GBW (MHz) 100 LT1457 • TPC18 – 5 0 – 2 50 2 55 07 5 GBW VS = ±15V SLEW FALL SLEW RISE TEMPERATURE (°C) 100 110 120CMRR, PSRR (dB) 100 LT1457 • TPC12 –50 –25 0 75 25 50 VS = ±5V TO ±17V FOR PSRR VS = ±15V, VCM = ±10.5V FOR CMRR PSRR CMRR Undistorted Output Swing vs Frequency FREQUENCY (Hz) PEAK TO PEAK OUTPUT SWING (V) 10M LT11457• TPC17 10k 100k 1M VS = ±15V TA = 25°C TEMPERATURE (°C) –15 –13 –11 –14 –12 ±10 COMMON -MODE RANGE (V) 100 LT1457 • TPC11 –50 –25 0 25 75 50 VS = ±15V Common-Mode Rejection Ratio vs Frequency Common-Mode Range vs Temperature Common-Mode and Power Supply Rejections vs Temperature TIME FROM OUTPUT SHORT TO GROUND (MINUTES) –50 –30 –10 –40 –20 SHORT-CIRCUIT CURRENT (mA) LT1457 • TPC15 01 3 2 VS = ±15V TA = –40 °C TA = 85°C TA = 25°C TA = 85°C TA = –40 °C TA = 25°C Short-Circuit Current vs Time (One Output Shorted to Ground)Supply Current vs Temperature TEMPERATURE (°C) SUPPLY CURRENT PER AMPLIFIER (mA) 100 LT1457 • TPC14 –50 –25 0 75 25 50 VS = ±5V VS = ±15V Slew Rate, Gain-Bandwidth Product vs Temperature FREQUENCY (Hz) 120 100 140PSRR (dB) 10M LT1457• TPC13 10 100 1k 10k 1M 100k TA = 25°C POSITIVE SUPPLY NEGATIVE SUPPLY Power Supply Rejection Ratio vs Frequency

TYPICAL PERFORMANCE CHARACTERISTICS UW Small-Signal Response AV = 1, CL = 10,000pF APPLICATIONS INFORMATIONWU UU LT1457 TPC20LT1457 TPC19 LT1457 TPC21 Large-Signal Response AV = 1, CL = 100pF Small-Signal Response AV = 1, CL = 1000pF Phase Reversal Protection Most industry standard JFET input single, dual, and quad op amps (e.g., LF156, LF351, LF353, LF411, LF412, OP-15, OP-16, OP-215, and TL084) exhibit phase reversal at the output when the negative common-mode limit at the input is exceeded (i.e., below –12V with ±15V supplies). The photos show a ±16V sine wave input (A), the response of an LF412A in the unity gain follower mode (B), and the response of the LT1457 (C). The phase reversal of photo (B) can cause lock-up in servo systems. The LT1457 does not phase-reverse due to a unique phase reversal protection circuit. All Photos 5V/Div Vertical Scale, 50µs/Div Horizontal Scale (B) LF412A Output(A) ±16V Sine Wave Input (C) LT1457 Output LT1457 AI03LT1457 AI01 LT1457 AI02

APPLICATIONS INFORMATIONWU UU High Speed Operation When the feedback around the op amp is resisitive (RF), a pole will be created with R F, the source resistance and capacitance (RS, CS), and the amplifier input capacitance (CIN ≈ 4pF). In low closed loop gain configurations and with RS and RF in the kilohm range, this pole can create excess phase shift and even oscillation on high speed amplifiers. Because the LT1457’s phase margin is very high, this problem is minimal. However, a small capacitor F) in parallel with RF eliminates this problem. With RS(CS + CIN) = RFCF, the effect of the feedback pole is completely removed. LT1457 AI04 RS RF CF CS CIN OUTPUT Dimension in inches (millimeters) unless otherwise noted.PACKAGE DESCRIPTIONU Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1 2 3 4 0.150 – 0.157 (3.810 – 3.988) 8 7 6 5 0.189 – 0.197 (4.801 – 5.004) 0.228 – 0.244 (5.791 – 6.197) 0.010 – 0.020 (0.254 – 0.508) 0.016 – 0.050 0.406 – 1.270 × 45° 0°– 8° TYP 0.008 – 0.010 (0.203 – 0.254) SO8 0392 0.053 – 0.069 (1.346 – 1.752) 0.014 – 0.019 (0.355 – 0.483) 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC 8-Lead Plastic SOIC 8-Lead Plastic DIP N8 0392 0.045 ± 0.015 (1.143 ± 0.381) 0.100 ± 0.010 (2.540 ± 0.254) 0.065 (1.651) TYP 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.020 (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) 0.125 (3.175) MIN 12 3 4 87 6 5 0.250 ± 0.010 (6.350 ± 0.254) 0.400 (10.160) MAX 0.009 – 0.015 (0.229 – 0.381) 0.300 – 0.320 (7.620 – 8.128) 0.325 +0.025 –0.015 +0.635 –0.3818.255()

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