LPV542 TI1 | Alldatasheet
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Supply Current per Channel (nA/Ch) Supply Voltage (V) 125° C 85° C 25° C 0° C -40° C C001 VCM = 0.3V OXYGEN SENSOR 100 M 1 M R L VOUT Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community LPV542 SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015 LPV542DualNanopower1.8V,490nA,RRIOCMOSOperationalAmplifier
1 Features 3 Description
The LPV542 is an ultra-low-power, dual operational 1• Wide Supply Range: 1.6 V to 5.5 V amplifier that provides 8kHz of bandwidth from 490nA• Low Supply Current: 490 nA (typical/channel) of quiescent current making it well suited for battery-
- Good Offset Voltage: 3 mV (maximum/room) powered applications such as health and fitness wearables, building automation, and remote sensing• Good TcVos: 1µV/°C (typical) nodes.• Gain-Bandwidth: 8 kHz (typical) Each amplifier has a CMOS input stage with pico-• Rail-to-Rail Input and Output amp bias currents which reduces errors commonly• Unity-Gain Stable introduced in megaohm feedback resistance
- Low Input Bias Current : 1 pA (typ) topologies such as photodiode and charge sense applications. In addition, the input common-mode• EMI Hardened range extends to the power supply rails and the• Temperature Range: -40°C to 125°C output swings to within 3 mV of the rails, maintaining• Thin 3 mm x 3 mm x 0.45 mm X1SON package the widest dynamic range possible. Likewise, EMI protection is designed into the LPV542 in order to
2 Applications reduce system sensitivity to unwanted RF signals
from mobile phones, WiFi, radio transmitters, and tag• Wearables readers.• Personal Health Monitors The LPV542 operates on a supply voltage as low as• Battery Packs 1.6 V, ensuring continuous superior performance in• Mobile Phones and Tablets low battery situations. The device is available in an 8-
- Solar-Powered or Energy Harvested Systems pad, low-profile, leadless 3 mm x 3 mm x 0.45 mm X1SON package and a standard 8 pin VSSOP.• PIR, Smoke, Gas, and Fire Detection Systems
- Battery Powered Internet of Things (IoT) Devices Device Information(1)
- Remote Sensors PART NUMBER PACKAGE BODY SIZE (NOM)
- Micropower Reference Buffer X1SON (8) 3.00 mm x 3.00 mm LPV542 VSSOP (8) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. space space Nanopower Oxygen Sensor Amplifier Supply Current vs. Supply Voltage An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015 www.ti.com Table of Contents
4 Revision History
Changes from Original (March 2015) to Revision A Page
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Product Folder Links: LPV542
OUT□B /c45IN□B +IN□B OUT□A /c45IN□A +IN□A V/c45 A B OUT B -IN B +IN B OUT A -IN A +IN A Exposed Thermal Die Pad on Underside (1) LPV542 www.ti.com SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015
5 Pin Configuration and Functions
DNX Package8-Pin VSSOP Top ViewDGK Package Top View (1) Connect thermal die pad to V-. Pin Functions PIN I/O DESCRIPTION NAME DGK DNX OUT A 1 1 O Channel A Output -IN A 2 2 I Channel A Inverting Input +IN A 3 3 I Channel A Non-Inverting Input V- 4 4 P Negative (lowest) power supply +IN B 5 5 I Channel B Non-Inverting Input -IN B 6 6 I Channel B Inverting Input OUT B 7 7 O Channel B Output V+ 8 8 P Positive (highest) power supply Die Pad -- DAP P Die Attach Pad. Connect to V- (DNX package only) Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LPV542
SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015 www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)(2)(3) MIN MAX UNIT Supply voltage, V+ to V– -0.3 6 V Voltage(2) (V-) - 0.3 (V+) + 0.3 V Signal input pins Current(2) -10 10 mA Output short current Continuous(4) Junction temperature -40 150 °C Storage temperature, Tstg -65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be current-limited to 10 mA or less. (3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. (4) Short-circuit to V-.
6.2 ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 ElectrostaticV(ESD) VCharged device model (CDM), per JEDEC specification JESD22-C101,discharge ±250all pins(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Ratings
Supply Voltage ( V+– V− ) 1.6 5.5 V Specified Temperature -40 125 °C
6.4 Thermal Information
DGK (VSSOP) DNX (X1SON) THERMAL METRIC(1) UNIT
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 182.5 46.3 RθJC(top) Junction-to-case (top) thermal resistance 73.6 33.3 RθJB Junction-to-board thermal resistance 104.1 21 °C/W ψJT Junction-to-top characterization parameter 13.7 0.2 ψJB Junction-to-board characterization parameter 102.5 21.2 RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 7 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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www.ti.com SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015 6.5 Electrical Characteristics 1.8 V TA = 25°C, V+ = 1.8V, V− = 0V, VCM = VO = V+/2, and RL > 1 MΩ , unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT OFFSET VOLTAGE Input offset voltage (VOS) VCM = 0.3 V ±1 ±2 VCM = 1.5 V ±1 ±3 mV Over temperature VCM = 0.3 V and 1.5 V ±4 Drift (dVOS/dT) 1 µV/°C Power-Supply Rejection Ratio VS = 1.8 V to 5.5 V, VCM = 0.3 V 80 109 dB(PSRR) INPUT VOLTAGE RANGE Common-mode voltage range (VCM) CMRR ≥ 57 dB 0 1.8 V Common-Mode Rejection Ratio 0 V < VCM < 1.8 V 57 92 (CMRR) 0 V < VCM < 0.7 V 87 92 dB 1.3 V < VCM < 1.8 V 57 98 INPUT BIAS CURRENT Input bias current (IB) ±0.1 pA Input offset current (IOS) ±0.1 INPUT IMPEDANCE Differential 1013 || 2.5 Ω || pF Common mode 1013 || 2.5 NOISE Input voltage noise density, f = 1 kHz (en) 250 nV/√Hz Current noise density, f = 1 kHz (in) 80 fA√Hz OPEN-LOOP GAIN Open-loop voltage gain (AOL) RL = 100 kΩ to V+/2, 0.5 V < VO < 1.3 V 91 101 dB OUTPUT Voltage output swing from positive rail RL = 100 kΩ to V+/2 3 20 mV Voltage output swing from negative rail RL = 100 kΩ to V+/2 2 20 Output current sourcing Sourcing, VO to V–, VIN(diff) = 100 mV 1 3 mA Output current sinking Sinking, VO to V+, VIN(diff) = –100 mV 1 5 FREQUENCY RESPONSE Gain-bandwidth product (GBWP) CL = 20 pF 7 kHz Slew rate (SR) G = +1, Rising edge, 1Vp-p, CL = 20 pF 3.4 V/ms G = +1, Falling edge, 1Vp-p, CL = 20 pF 3.7 POWER SUPPLY Specified voltage range (VS) 1.6 5.5 V Quiescent current per channel (IQ) VCM = 0.3 V, IO = 0 490 800 Over temperature 1100 nA Quiescent current per channel (IQ) VCM = 1.5 V, IO = 0 680 1100 Over temperature 1500 (1) Refer to Typical Characteristics. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LPV542
SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015 www.ti.com 6.6 Electrical Characteristics 3.3 V TA = 25°C, V+ = 3.3V, V− = 0V, VCM = VO = V+/2, and RL > 1 MΩ , unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT OFFSET VOLTAGE Input offset voltage (VOS) VCM = 0.3 ±1 ±2 VCM = 3 V ±1 ±3 mV Over temperature VCM = 0.3 V and 3 V ±4 Drift (dVOS/dT) 1 µV/°C Power-Supply Rejection Ratio VS = 1.8 V to 5.5 V, VCM = 0.3 V 80 109 dB(PSRR) INPUT VOLTAGE RANGE Common-mode voltage range (VCM) CMRR ≥ 60 dB 0 3.3 V Common-Mode Rejection Ratio 0 V < VCM < 3.3 V 62 98 (CMRR) 0 V < VCM < 2.2V 88 98 dB 2.7 V < VCM < 3.3 V 62 105 INPUT BIAS CURRENT Input bias current (IB) ±0.1 pA Input offset current (IOS) ±0.1 INPUT IMPEDANCE Differential 1013 || 2.5 Ω || pF Common mode 1013 || 2.5 NOISE Input voltage noise density, f = 1 kHz (en) 250 nV/√Hz Current noise density, f = 1 kHz (in) 60 fA√Hz OPEN-LOOP GAIN Open-loop voltage gain (AOL) RL = 100 kΩ to V+/2, 0.5 V < VO < 2.8 V 91 101 dB OUTPUT Voltage output swing from positive Rail RL = 100 kΩ to V+/2 3 20 mV Voltage output swing from negative Rail RL = 100 kΩ to V+/2 2 20 Output current sourcing Sourcing, VO to V–, VIN(diff) = 100 mV 5 14 mA Output current sinking Sinking, VO to V+, VIN(diff) = –100 mV 5 19 FREQUENCY RESPONSE Gain-bandwidth product (GBWP) CL = 20 pF 8 kHz Slew rate (SR) G = +1, Rising edge, 1Vp-p, CL = 20 pF 3.6 V/ms G = +1, Falling edge, 1Vp-p, CL = 20 pF 3.7 POWER SUPPLY Specified voltage range (VS) 1.6 5.5 V Quiescent current per channel (IQ) VCM = 0.3 V, IO = 0 480 800 Over temperature 1200 nA Quiescent current per channel (IQ) VCM = 3 V, IO = 0 650 1100 Over temperature 1500 (1) Refer to Typical Characteristics.
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www.ti.com SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015
6.7 Electrical Characteristics 5 V
TA = 25°C, V+ = 5 V, V− = 0 V, VCM = VO = V+/2, and RL > 1 MΩ , unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT OFFSET VOLTAGE Input offset voltage (VOS) VCM = 0.3 V ±1 ±2 VCM = 4.7V ±1 ±3 mV Over temperature VCM = 0.3 V and 4.7V ±4 Drift (dVOS/dT) 1 µV/°C Power-Supply Rejection Ratio VS = 1.8 V to 5.5 V, VCM = 0.3 V 80 109 dB(PSRR) INPUT VOLTAGE RANGE Common-Mode voltage range (VCM) CMRR ≥ 60 dB 0 5 V Common-Mode Rejection Ratio 0 V < VCM < 5 V 65 101 (CMRR) 0 V < VCM < 3.9V 88 101 dB
4.4 V < VCM < 5 V 65 109
Input bias current (IB) ±0.1 pA Input offset current (IOS) ±0.1 INPUT IMPEDANCE Differential 1013 || 2.5 Ω || pF Common mode 1013 || 2.5 NOISE Input voltage noise density, f = 1 kHz (en) 250 nV/√Hz Current noise density, f = 1 kHz (in) 65 fA√Hz OPEN-LOOP GAIN Open-loop voltage gain (AOL) RL = 100 kΩ to V+/2, 0.5 V < VO < 4.5 V 91 101 dB OUTPUT Voltage output swing from positive rail RL = 100 kΩ to V+/2 3 20 mV Voltage output swing from negative rail RL = 100 kΩ to V+/2 2 20 Output current sourcing Sourcing, VO to V–, VIN(diff) = 100 mV 10 30 mA Output current sinking Sinking, VO to V+, VIN(diff) = –100 mV 10 36 FREQUENCY RESPONSE Gain-bandwidth product (GBWP) CL = 20 pF 8 kHz Slew rate (SR) G = +1, Rising edge, 1Vp-p, CL = 20 pF 3.6 V/ms G = +1, Falling edge, 1Vp-p, CL = 20 pF 3.7 POWER SUPPLY Specified voltage range (VS) 1.6 5.5 V Quiescent current per channel (IQ) VCM = 0.3 V, IO = 0 480 850 Over temperature 1300 nA Quiescent current per channel (IQ) VCM = 4.7 V, IO = 0 680 1100 Over temperature 1600 (1) Refer to Typical Characteristics. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LPV542
6.8 Typical Characteristics
TA = 25 °C, VS = 5 V, VOUT = VCM = VS/2, RLOAD = 1 MΩ connected to VS/2, and CL = 20 pF, unless otherwise noted. Figure 1. Supply Voltage vs Supply Current per Channel, Figure 2. Supply Voltage vs Supply Current per Channel, Figure 3. Supply Current vs Figure 4. Supply Current vs Figure 5. Supply Current vs Figure 6. Supply Current vs
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TA = 25 °C, VS = 5 V, VOUT = VCM = VS/2, RLOAD = 1 MΩ connected to VS/2, and CL = 20 pF, unless otherwise noted. Figure 13. Output Sinking Current vs Figure 14. Output Sourcing Current vs Figure 15. Output Short Circut Current to V- vs Figure 16. Output Short Circut Current to V+ vs Figure 18. Input Bias Current vsFigure 17. Input Bias Current vs
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TA = 25 °C, VS = 5 V, VOUT = VCM = VS/2, RLOAD = 1 MΩ connected to VS/2, and CL = 20 pF, unless otherwise noted. Figure 25. Input Bias Current vs Figure 26. Input Referred Voltage Noise Figure 27. Pulse Response, 200mVpp at 1.8 V Figure 28. Pulse Response, 1Vpp at 1.8V Figure 29. Pulse Response, 200mVpp at 5V Figure 30. Pulse Response, 2Vpp at 5V
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7 Detailed Description
7.1 Overview
voltages or temperature are shown in the Typical Characteristics curves.
7.2 Functional Block Diagram
7.3 Feature Description
- AOL is the open-loop gain of the amplifier, typically around 100 dB (100,000x, or 100,000 Volts per microvolt). (1)
7.4 Device Functional Modes
7.4.1 Rail-To-Rail Input
complementary input stage — an N-channel input differential pair in parallel with a P-channel differential pair.
7.4.2 Supply Current Changes over Common Mode
the supply current as the input stages transition through the transition region, as shown in Figure 37 below. Figure 37. Supply Current Change over Common Mode at 5 V For the lowest supply current operation, keep the input common mode range between V- and 1 V below V+.
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7.4.3 Design Optimization With Rail-To-Rail Input
7.4.4 Design Optimization for Nanopower Operation
feedback capacitor may be required to assure stability and limit overshoot or gain peaking. When possible, use AC coupling and AC feedback to reduce static current draw through the feedback elements.
7.4.5 Common-Mode Rejection
the CMRR of the device in the common-mode range below the transition region (VCM < (V+) – 0.9 V) is given. the differential input pairs. Second, the CMRR at VS = 5 V over the entire common-mode range is specified.
7.4.6 Output Stage
dynamic range at the output. This is particularly important when operating on low supply voltages.
7.4.7 Driving Capacitive Load
The LPV542 is internally compensated for stable unity gain operation, with a 8 kHz typical gain bandwidth. op amp might start oscillating. Figure 38. By using this isolation resistor, the capacitive load is isolated from the amplifier’s output. The larger reduced output current drive. Figure 38. Resistive Isolation Of Capacitive Load
10 M:10 M:
225 mAh = 5 circuits @ 9.5 yrs.
60 Hz Twin T Notch Filter
8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.2 Typical Application: 60 Hz Twin "T" Notch Filter
Figure 39. 60 Hz Notch Filter
8.2.1 Design Requirements
of 2 V. With an operating voltage from 1.6 V to 5.5 V the LPV542 can function over this voltage range.
8.2.2 Detailed Design Procedure
European systems, use R = 11.8 MΩ and C = 270 pF. the two signals will tend to cancel at the amplifier’s input.
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for the filter components that connect to ground. capacitance which effects can be reduced by cutting out the ground plane below components of concern. is below 1/2 LSB of a 10-bit system with a 2 V reference, which is 1 mV.
8.2.3 Application Curve
Figure 40. 60 Hz Notch Filter Waveform
8.3 Do's and Don'ts
Do properly bypass the power supplies. Do add series resistance to the output when driving capacitive loads, particularly cables, Muxes and ADC inputs. the supplies. Limit the current to 1 mA or less (1 KΩ per volt).
9 Power Supply Recommendations
temperature are presented in the Typical Characteristics. Supply voltages larger than 6 V can permanently damage the device. suggested that 10 nF capacitors be placed as close as possible to the operational amplifier power supply pins. between V+ and ground, and one capacitor between V– and ground. if kilohertz or above noise is expected on the power supply lines.
10 Layout
10.1 Layout Guidelines
The V+ pin should be bypassed to ground with a low ESR capacitor. The optimum placement is closest to the V+ and ground pins. The ground pin should be connected to the PCB ground plane at the pin of the device. The feedback components should be placed as close to the device as possible to minimize strays. shown in the Layout Example.
10.2 Layout Example
Figure 41. X1SON Layout Example (top view)
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www.ti.com SNOSCX9A – MARCH 2015– REVISED NOVEMBER 2015
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti DIP Adapter Evaluation Module, http://www.ti.com/tool/dip-adapter-evm TI Universal Operational Amplifier Evaluation Module, http://www.ti.com/tool/opampevm TI FilterPro Filter Design software, http://www.ti.com/tool/filterpro
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
- AN-1798 Designing with Electro-Chemical Sensors, SNOA514
- AN-1803 Design Considerations for a Transimpedance Amplifier, SNOA515
- AN-1852 Designing With pH Electrodes, SNOA529
- Compensate Transimpedance Amplifiers Intuitively, SBOA055
- Transimpedance Considerations for High-Speed Operational Amplifiers, SBOA112
- Noise Analysis of FET Transimpedance Amplifiers, SBOA060
- Circuit Board Layout Techniques, SLOA089
- Handbook of Operational Amplifier Applications, SBOA092
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: LPV542
www.ti.com 15-Oct-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LPV542DGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 LP V542 LPV542DGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 LP V542 LPV542DNXR ACTIVE X1SON DNX 8 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 LPV542 LPV542DNXT ACTIVE X1SON DNX 8 250 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 LPV542 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.
www.ti.com 15-Oct-2015 Addendum-Page 2 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 15-Oct-2015 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LPV542DGKR VSSOP DGK 8 2500 364.0 364.0 27.0 LPV542DGKT VSSOP DGK 8 250 364.0 364.0 27.0 LPV542DNXR X1SON DNX 8 3000 338.0 355.0 50.0 LPV542DNXT X1SON DNX 8 250 338.0 355.0 50.0 PACKAGE MATERIALS INFORMATION www.ti.com 15-Oct-2015 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 8X 0.3 0.2 2.38±0.1 8X 0.45 0.35 1.5 1.65±0.1 6X 0.5
0.5 MAX
0.05 0.00 A 3.1 2.9 B 3.1 2.9 (0.127) TYP X1SON - 0.5 mm max heightDNX0008A PLASTIC SMALL OUTLINE - NO LEAD 4221623/A 08/2014 PIN 1 INDEX AREA SEATING PLANE 0.08 C 4 5 (OPTIONAL) PIN 1 ID 0.1 C A B 0.05 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 4.300
www.ti.com EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND0.07 MAX ALL AROUND 8X (0.25) 8X (0.6) (2.38) (2.8) 6X (0.5) (1.65) ( ) VIA TYP 0.2 (0.575) (0.94) X1SON - 0.5 mm max heightDNX0008A PLASTIC SMALL OUTLINE - NO LEAD 4221623/A 08/2014 SYMM 4 5 SYMM LAND PATTERN EXAMPLE SCALE:20X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). SOLDER MASK OPENING SOLDER MASK UNDER METAL SOLDER MASK DEFINED METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)
www.ti.com EXAMPLE STENCIL DESIGN 8X (0.25) 8X (0.6) 6X (0.5) 2X (1.51) (1.06) (2.8) (0.63) X1SON - 0.5 mm max heightDNX0008A PLASTIC SMALL OUTLINE - NO LEAD 4221623/A 08/2014 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 82% PRINTED SOLDER COVERAGE BY AREA SCALE:30X SYMM 4 5 SYMM METAL TYP
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