LPV531 NSC | Alldatasheet

Document overview

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Technical content

Features

(Typical 5V supply, unless otherwise noted.) n Supply voltage 2.7V to 5.5V n Dynamic power mode setting n Continuously programmable supply current — Range 5 µA to 425 µA n Continuously programmable bandwidth — Range 73 kHz to 4.6 MHz n Input common mode voltage range −0.3V to 3.8V n CMRR 95 dB n Rail-to-rail output voltage swing n Input offset voltage 1 mV

Applications

n Portable instrumentation n Active filters Typical Application 20132335 AC Coupled Application May 2006 LPV531 Programmable Micropower CMOS Input, Rail-to-Rail Output Operational Amplifier © 2006 National Semiconductor Corporation DS201323 www.national.com

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model 2000V Machine Model 200V V IN Differential ±2V Supply Voltage (V+ -V −)6 V Storage Temperature Range −65˚C to +150˚C Junction Temperature (Note 5) +150˚C Soldering Information Infrared or Convection (20 sec) 235˚C Wave Soldering Lead Temp. (10 sec) 260˚C Operating Ratings (Note 1) Operating Temperature Range −40˚C to +85˚C Supply Voltage (V+ –V −) 2.7V to 5.5V Package Thermal Resistance ( θJA ) (Note 4) 6-Pin TSOT23 171˚C/W 5V Full Power Mode Electrical Characteristics Unless otherwise specified, all limits are guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2, ISEL pin connected to V−,R L = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units VOS Input Offset Voltage ±1 ±4.5 ±5 mV ∆VOS Input Offset Voltage Difference (V OS in Full Power Mode) − (VOS in Low Power Mode) ±0.1 ±2 mV TC VOS Input Offset Average Drift (Note 8) ±2 µV/˚C IB Input Bias Current (Note 9) .05 ±10 ±100 pA CMRR Common Mode Rejection Ratio VCM Stepped from 0V to 3.5V 72 95 dB PSRR Power Supply Rejection Ratio V + = 2.7V to 5.5V VCM =1 V 90 dB CMVR Input Common Mode Voltage Range CMRR ≥ 50 dB −0.3 3.8 V AVOL Large Signal Voltage Gain V O = 0.5V to 4.5V RL =1k Ω to V+/2 dBVO = 0.5V to 4.5V RL =1 0k Ω to V+/2 104 100 114 VO = 0.5V to 4.5V RL = 100 kΩ,t oV +/2 108 104 128 VO Output Swing High R L =1k Ω to V+/2 120 180 195 mV from RL =1 0k Ω to V+/2 55 80 RL = 100 kΩ to V+/2 30 50 Output Swing Low R L =1k Ω to V+/2 160 210 230 mVRL =1 0k Ω to V+/2 105 120 135 RL = 100 kΩ to V+/2 95 120 135 ISC Output Short Circuit Current (Note 3) Sourcing, VO = 2.5V VID = 100 mV −15 −8 −3 mASinking, VO = 2.5V VID = −100 mV IS Supply Current 425 530 650 µA LPV531 www.national.com 2

5V Full Power Mode Electrical Characteristics (Continued) Unless otherwise specified, all limits are guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2, ISEL pin connected to V−,R L = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units SR Slew Rate (Note 7) A V = +1, VIN = 0.5V to 3.5V CL =1 5p F 1.55

2.5 V/µs

GBW Gain Bandwidth Product C L = 20 pF 4.6 MHz en Input-Referred Voltage Noise f = 100 kHz 20 nV/ f = 1 kHz 28 in Input-Referred Current Noise f = 1 kHz 6 fA/ 5V Mid-Power Mode Electrical Characteristics Unless otherwise specified, all limits are guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2, ISEL pin connected to V− through 100 kΩ resistor, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units VOS Input Offset Voltage ±1 ±4.5 ±5 mV ∆VOS Input Offset Voltage Difference (V OS in Full Power Mode) − (VOS in Low Power Mode) ±0.1 ±2 mV TC VOS Input Offset Average Drift (Note 8) ±2 µV/˚C IB Input Bias Current (Note 9) .05 ±10 ±100 pA CMRR Common Mode Rejection Ratio VCM Stepped from 0V to 3.5V 72 92 dB PSRR Power Supply Rejection Ratio V + = 2.7V to 5.5V 72 88 dB CMVR Input Common Mode Voltage Range CMRR ≥ 50 dB −0.3 3.8 V AVOL Large Signal Voltage Gain V O = 0.5V to 4.5V RL =1 0k Ω to V+/2 dBVO = 0.5V to 4.5V RL = 100 kΩ to V+/2 100 114 VO Output Swing High R L =1 0k Ω to V+/2 115 160 175 mV from V+RL = 100 kΩ to V+/2 65 110 120 Output Swing Low R L =1 0k Ω to V+/2 150 165 180 mVRL = 100 kΩ to V+/2 105 120 135 ISC Output Short Circuit Current (Note 3) Sourcing, VO = 2.5V VID = 100 mV −4 −1.5 −1 mASinking, VO = 2.5V VID = −100 mV 1.5 IS Supply Current 42 55 62 µA SR Slew Rate (Note 7) A V = +1, VIN = 0.5V to 3.5V 180 100

250 V/ms

GBW Gain Bandwidth Product C L = 20 pF 625 kHz en Input-Referred Voltage Noise f = 100 kHz 55 nV/ f = 1 kHz 60 LPV531 www.national.com3

5V Mid-Power Mode Electrical Characteristics (Continued) Unless otherwise specified, all limits are guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2, ISEL pin connected to V− through 100 kΩ resistor, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units in Input-Referred Current Noise f = 1 kHz 6 fA/ 5V Low Power Mode Electrical Characteristics Unless otherwise specified, all limits are guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2, ISEL connected to V− through 1 MΩ resistor, RL = 100 kΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units VOS Input Offset Voltage ±1 ±4.5 ±5 mV ∆VOS Input Offset Voltage Difference (V OS in Full Power Mode) − (VOS in Low Power Mode) ±0.1 ±2 mV TC VOS Input Offset Average Drift (Note 8) ±2 µV/˚C IB Input Bias Current (Note 9) .05 ±10 ±100 pA CMRR Common Mode Rejection Ratio VCM Stepped from 0V to 3.5V 72 90 dB PSRR Power Supply Rejection Ratio V + = 2.7V to 5.5V 72 85 dB CMVR Input Common-Mode Voltage Range CMRR ≥ 50 dB −0.3 3.8 V AVOL Large Signal Voltage Gain V O = 0.5V to 4.5V RL =1 0k Ω to V+/2 dBVO = 0.5V to 4.5V RL = 100 kΩ to V+/2 100 VO Output Swing High R L =1 0k Ω to V+/2 175 400 1600 mV from V+RL = 100 kΩ to V+/2 115 200 230 Output Swing Low R L =1 0k Ω to V+/2 250 1200 1800 mVRL = 100 kΩ to V+/2 150 165 180 ISC Output Short Circuit Current (Note 3) Sourcing, VO = 2.5V VID = 100 mV −400 −100 −35 µASinking, VO = 2.5V VID = −100 mV 300 IS Supply Current 57 8 µA SR Slew Rate (Note 7) A V = +1, VIN = 0.5V to 3.5V 10

28 V/ms

GBW Gain Bandwidth Product C L =2 0p F 7 3 k H z en Input-Referred Voltage Noise f = 1 kHz 200 nV/ in Input-Referred Current Noise f = 1 kHz 60 fA/ LPV531 www.national.com 4

Power Select Electrical Characteristics Unless otherwise specified, all limits are guaranteed for T J = 25˚C, V+ = 5V, V− = 0V, VCM =V O =V +/2, RL = 100 kΩ. Bold- face limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units tLF Time from Low Power Mode to Full Power Mode 210 ns tFL Time from Full Power Mode to Low Power Mode 500 ns VREXT Voltage @ ISEL Pin I SEL Pin Left Open 100 110 125 mV RINT 9 11 14.5 k Ω Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model is 1.5 k Ω in series with 100 pF. Machine Model is 0 Ω in series with 200 pF. Note 3: Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Note 4: The maximum power dissipation is a function of T J(MAX), θJA, and T A. The maximum allowable power dissipation at any ambient temperature is PD =( TJ(MAX) -T A)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Slew rate is the slower of the rising or falling slew rates. Note 8: Offset voltage average drift is determined by dividing the change in V OS at temperature extremes into the total temperature change. Note 9: Guaranteed by design. Connection Diagram 6-Pin TSOT23 20132316 Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing 6-Pin TSOT23 LPV531MK AV2A 1k Units Tape and Reel MK06ALPV531MKX 3k Units Tape and Reel LPV531 www.national.com5

Typical Performance Characteristics Unless otherwise specified, V + = 5V, T J = 25˚C. For Full Power Mode the I SEL pin is connected to V −; for Mid-Power Mode the I SEL pin is connected to V − through a 100 k Ω resistor; for Low Power Mode the I SEL pin is connected to V − througha1M Ω resistor. Supply Current vs. I SEL Supply Current vs. I SEL 20132319 20132342 Supply Current vs. Supply Voltage (Full Power Mode) Supply Current vs. Supply Voltage (Mid Power Mode) 20132324 20132317 Supply Current vs. Supply Voltage (Low Power Mode) Gain and Phase vs. Frequency (Full Power Mode) 20132318 20132330 LPV531 www.national.com 6

Typical Performance Characteristics Unless otherwise specified, V + = 5V, T J = 25˚C. For Full Power Mode the ISEL pin is connected to V −; for Mid-Power Mode the I SEL pin is connected to V − through a 100 k Ω resistor; for Low Power Mode the I SEL pin is connected to V − througha1M Ω resistor. (Continued) Gain and Phase vs. Frequency (Mid Power Mode) Gain and Phase vs. Frequency (Low Power Mode) 20132331 20132329 Input Offset Voltage vs. Common Mode Voltage (Full Power Mode) Input Offset Voltage vs. Common Mode Voltage (Mid Power Mode) 20132360 20132359 Input Offset Voltage vs. Common Mode Voltage (Low Power Mode) CMRR vs. Frequency 20132358 20132362 LPV531 www.national.com7

Typical Performance Characteristics Unless otherwise specified, V + = 5V, T J = 25˚C. For Full Power Mode the ISEL pin is connected to V −; for Mid-Power Mode the I SEL pin is connected to V − through a 100 k Ω resistor; for Low Power Mode the I SEL pin is connected to V − througha1M Ω resistor. (Continued) PSRR vs. Frequency (Full Power Mode) PSRR vs. Frequency (Mid Power Mode) 20132361 20132373 PSRR vs. Frequency (Low Power Mode) Small Signal Non-Inverting Response (Full Power Mode) 20132374 20132346 Small Signal Non-Inverting Response (Mid Power Mode) Small Signal Non-Inverting Response (Low Power Mode) 20132350 20132354 LPV531 www.national.com 8

Typical Performance Characteristics Unless otherwise specified, V + = 5V, T J = 25˚C. For Full Power Mode the ISEL pin is connected to V −; for Mid-Power Mode the I SEL pin is connected to V − through a 100 k Ω resistor; for Low Power Mode the I SEL pin is connected to V − througha1M Ω resistor. (Continued) Large Signal Non-Inverting Response (Full Power Mode) Large Signal Non-Inverting Response (Mid Power Mode) 20132347 20132351 Large Signal Non-Inverting Response (Low Power Mode) Small Signal Inverting Pulse Response (Full Power Mode) 20132355 20132348 Small Signal Inverting Pulse Response (Mid Power Mode) Small Signal Inverting Pulse Response (Low Power Mode) 20132352 20132356 LPV531 www.national.com9

Typical Performance Characteristics Unless otherwise specified, V + = 5V, T J = 25˚C. For Full Power Mode the ISEL pin is connected to V −; for Mid-Power Mode the I SEL pin is connected to V − through a 100 k Ω resistor; for Low Power Mode the I SEL pin is connected to V − througha1M Ω resistor. (Continued) Large Signal Inverting Response (Full Power Mode) Large Signal Inverting Response (Mid Power Mode) 20132349 20132353 Large Signal Inverting Response (Low Power Mode) I SINK vs. Supply Current 20132357 20132344 ISOURCE vs. Supply Current Gain Bandwidth Product vs. I SEL 20132343 20132345 LPV531 www.national.com 10

Typical Performance Characteristics Unless otherwise specified, V + = 5V, T J = 25˚C. For Full Power Mode the ISEL pin is connected to V −; for Mid-Power Mode the I SEL pin is connected to V − through a 100 k Ω resistor; for Low Power Mode the I SEL pin is connected to V − througha1M Ω resistor. (Continued) Input Referred Voltage Noise vs. Frequency Phase Margin vs. Capacitive Load 20132369 20132370 LPV531 www.national.com11

Typical Application (Continued) For simplicity, the op amp is modelled as an ideal integrator with a unity gain frequency of A0 . Hence, its transfer function (or gain) in the frequency domain is A 0/s. Solving the circuit equations in the frequency domain, ignoring C F for the mo- ment, results in the following equation for the gain: (1) It can be inferred from the denominator of the transfer func- tion that it has two poles, whose expressions can be ob- tained by solving for the roots of the denominator: (2) Equation (2) shows that as the values of R 1 and R 2 are increased, the magnitude of the poles is reduced, and hence the bandwidth of the amplifier is decreased. Furthermore, R and R2 are related by the gain of the amplifier. AV =− R2/R1, or alternatively R2 =− AVR1 It is the presence of pairs of poles inEquation (2)that causes gain peaking. In order to eliminate this effect, the poles should be placed in Butterworth position, since poles in Butterworth position do not cause gain peaking. To achieve a Butterworth pair, the quantity under the square root in Equa- tion 2 should be set to equal −1. Using this fact and the relation between R 1 and R2, the optimum value for R1 can be found. This is shown in Equation (3).I fR 1 is chosen to be larger than this optimum value, gain peaking will occur. (3) In Figure 9,C F is added to compensate for input capacitance and to increase stability. In addition, CF reduce or eliminates the gain peaking that can be caused by having a larger feedback resistor. LPV531 www.national.com 16

Physical Dimensions inches (millimeters) unless otherwise noted 6-Pin TSOT23 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. Leadfree products are RoHS compliant. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com LPV531 Programmable Micropower CMOS Input, Rail-to-Rail Output Operational Amplifier