LT3463 LINEAR | Alldatasheet
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, LTC and LT are registered trademarks of Linear Technology Corporation. CCD Bias Supply (15V, –8V) Efficiency and Power Loss The LT 3463/LT3463A are dual micropower DC/DC con- verters with internal Schottky diodes in a 10-lead 3mm · 3mm DFN package. Negative and positive LT3463 con- verters have a 250mA current limit. The LT3463A positive converter also has a 250mA limit, while the negative converter has a 400mA limit. Both devices have an input voltage range of 2.4V to 15V, making them ideal for a wide variety of applications. Each converter features a quies- cent current of only 20mA, which drops to under 1 mA in shutdown. A current limited, fixed off-time control scheme conserves operating current, resulting in high efficiency over a broad range of load current. The 42V switch enables high voltage outputs up to –40V to be easily generated without the use of costly transformers. The low 300ns off- time permits the use of tiny, low profile inductors and capacitors to minimize footprint and cost in space-con- scious portable applications. n Generates Well-Regulated Positive and Negative Outputs n Low Quiescent Current: 20mA (per Converter) in Active Mode <1mA in Shutdown Mode n Internal 42V Power Switches n Internal 42V Schottky Diodes n Low VCESAT Switch: 180mV at 150mA n Input Voltage Range: 2.4V to 15V n High Output Voltages: Up to –40V n Low Profile (0.8mm) 3mm x 3mm DFN Package n CCD Bias n LCD Bias n Handheld Computers n Digital Cameras DESCRIPTIO UFEATURES APPLICATIO SU TYPICAL APPLICATIO U VIN VREF VOUT1 VOUT1 15V 10mA VOUT2 –8V 50mA SW1 FB2 LT3463A 10µH SHDN2 2.2µF VIN 2.7V TO 5V
3463 TA01a
1µF 4.7µF FB1SHDN1 1M 10pF 154k 90.9k 4.7µF 10µH LOAD CURRENT (mA) 0.1 EFFICIENCY (%) POWER LOSS (mW) 1 10 100
3463 TA01b
–8V LOSS 160 200 240 120 VIN = 3.6V 15V EFFICIENCY –8V EFFICIENCY 15V LOSS
ABSOLUTE AXI U RATI GSW WW U PACKAGE/ORDER I FOR ATIOUU W (Note 1) Operating Ambient Temperature Range ORDER PART NUMBER LT3463EDD LT3463AEDD DD PART MARKING ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V, VSHDN = 2.5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage 2.2 2.4 V Total Quiescent Current For Both Switchers, Not Switching 40 60 mA Shutdown Current V SHDN1 = VSHDN2 = 0V 0.1 1 mA VREF Pin Voltage With 124k W to GND l 1.23 1.25 1.27 V VREF Pin Voltage Line Regulation With 124k W to GND 0.05 0.10 %/V FB1 Comparator Trip Voltage High to Low Transition l 1.225 1.25 1.275 V FB1 Comparator Hysteresis 8m V FB1 Line Regulation 2.5V < V IN < 15V 0.05 0.10 %/V FB1 Pin Bias Current (Note 3) V FB1 = 1.3V l 20 50 nA FB2 Comparator Trip Voltage Low to High Transition l 03 1 2m V FB2 Comparator Hysteresis 8m V FB2 Line Regulation (VREF – VFB2) 2.5V < V IN < 15V 0.05 0.10 %/V FB2 Pin Bias Current (Note 4) V FB2 = –0.1V l 20 50 nA SW1 Switch Off Time V OUT1 – VIN = 4V 300 ns VOUT1 – VIN = 0V 1.5 ms SW2 Switch Off Time V FB2 < 0.1V 300 ns VFB2 = 1V 1.5 ms Switch VCESAT (SW1, SW2) I SW = 150mA 180 mV Switch Current Limit (SW1) 180 250 320 mA Switch Current Limit (SW2) LT3463 180 250 320 mA LT3463A 320 400 460 mA Swith Leakage Current (SW1, SW2) Switch Off, V SW = 42V 0.01 1 mA Schottky Forward Voltage (VOUT1, D2) I D = 150mA 750 mV Schottky Reverse Leakage Current V OUT1 – VSW = 42V 1 5 mA VD2 = –42V 1 5 mA SHDN1 Pin Current V SHDN1 = 2.5V 4 10 mA SHDN2 Pin Current V SHDN2 = 2.5V 4 10 mA SHDN1/SHDN2 Start-Up Threshold 0.3 1 1.5 V Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT3463/LT3463A are guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C TJMAX = 125°C, qJA = 43°C/W, qJC = 3°C/W EXPOSED PAD (PIN 11) IS GND AND MUST BE SOLDERED TO PCB LAFC LBJK Consult LTC Marketing for parts specified with wider operating temperature ranges. TOP VIEW DD PACKAGE 10-LEAD (3mm · 3mm) PLASTIC DFN
1 FB1
V REF FB2 VOUT1 SW1 VIN SW2 operating ambient temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Bias current flows into the FB1 pin. Note 4: Bias current flows out of the FB2 pin.
TYPICAL PERFOR A CE CHARACTERISTICSUW PI FU CTIO S UU U VOUT1 (Pin 1): Output Voltage Switcher 1. This is the cathode of an internal Schottky diode whose anode is connected to the SW1 pin. SW1 (Pin 2): Switch Pin for Switcher 1. This is the collector of the internal NPN switch. Minimize the metal trace area connected to this pin to minimize EMI. VIN (Pin 3): Input Supply Pin. Bypass this pin with a capacitor as close to the device as possible. SW2 (Pin 4): Switch Pin for Switcher 2. This is the collector of the internal NPN switch. Minimize the metal trace area connected to this pin to minimize EMI. D2 (Pin 5): Diode for Switcher 2. This is the anode of an internal Schottky diode whose cathode connected to the GND pin. FB2 (Pin 6): Feedback Pin for Switcher 2. Set the output voltage by selecting values for R3 and R4. VREF (Pin 7): Voltage Reference Pin (1.25V). This pin is used along with FB2 to set the negative output voltage for Switcher 2. SHDN2 (Pin 8): Shutdown Pin for Switcher 2. Pull this pin above 1.5V to enable Switcher 2. Pull below 0.3V to turn it off. Do not leave this pin floating. VCESAT and VDIODE Voltage VREF and VFB1 Voltage V FB2 Voltage Switch Off Time Switch Current Limit Quiescent Current VCESAT AND VDIODE VOLTAGE (V) 900 800 700 600 500 400 300 200 100
3463 G01
TEMPERATURE (°C) –50 100 05 0–25 25 75 125 IDIODE = 150mA ISWITCH = 150mA FOR BOTH SWITCHERS VREF AND VFB1 VOLTAGE (V) 1.27 1.26 1.25 1.24 1.23 1.22
3463 G02
TEMPERATURE (°C) –50 100 05 0–25 25 75 125 VREF VFB1 VFB2 VOLTAGE (mV)
3463 G03
TEMPERATURE (°C) –50 25 75–25 0 50 100 125 TEMPERATURE (°C) –50 SWITCH OFF TIME (ns) 100
3463 G04
–25 25 75 125 TEMPERATURE (°C) –50 SWITCH CURRENT LIMIT (mA) 100
3463 G05
–25 25 75 125 LT3463 SW1, SW2 LT3463A SW1 LT3463A SW2 TEMPERATURE (°C) –50 QUIESCENT CURRENT (µA) 25 75
3463 G06
–25 0 50 100 125 NOT SWITCHING VFB1 = 1.3V VFB2 = –0.1V
Figure 1. Block Diagram but the basic operation is the same. it off. Do not leave this pin floating. voltage by selecting values for R1 and R2. electrically connected for proper operation.
3463 F01
Table 1. Recommended Inductors without much reduction in the maximum output current. (or 400mA) and tOFF = 300ns.
inductor with a low saturation current. the inrush current should not be allowed to exceed 1 amp. should be measured to ensure safe operation. paid to the PCB board layout and component placement. component, ensuring a clean, noise-free connection. minimum VIN value in the equation below. voltage and temperature ranges than other ceramic types. shows a list of several ceramic capacitor manufacturers. output capacitor values can be used. Table 2. Recommended Ceramic Capacitor Manufacturers
10-Lead Plastic DFN (3mm · 3mm) (Reference LTC DWG # 05-08-1699) 3.00 –0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 0.38 – 0.10 BOTTOM VIEW—EXPOSED PAD 1.65 – 0.10 (2 SIDES) 0.75 –0.05 R = 0.115 TYP 2.38 –0.10 (2 SIDES) 106 PIN 1 TOP MARK (SEE NOTE 6)
0.200 REF
0.00 – 0.05 (DD10) DFN 1103 0.25 – 0.05 2.38 –0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 –0.05 (2 SIDES)2.15 –0.05 0.50 BSC 0.675 –0.05 3.50 –0.05 PACKAGE OUTLINE 0.25 – 0.05
0.50 BSC
- EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE TYPICAL APPLICATIO U VIN VREF VOUT1 VOUT1 20V 9mA V OUT2 –20V 9mA SW1 FB2 LT3463 10µH SHDN2 0.47µF VIN 2.7V TO 5V
3463 TA02
0.1µF D1 1µF FB19 10SHDN1 61.9k 66.5k 0.47µF 10µH Dual Output –20V Converter Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com ª LINEAR TECHNOLOGY CORPORATION 2003 LT/TP 0404 1K • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1615/LT1615-1 300mA/80mA (I SW), High Efficiency Step-Up DC/DC Converters V IN: 1V to 15V, VOUT(MAX): 34V, IQ: 20mA, ISD: <1mA, ThinSOT Package LT1944 Dual Output 350mA (I SW), Constant Off-Time, V IN: 1.2V to 15V, VOUT(MAX): 34V, IQ: 20mA, ISD: <1mA, High Efficiency Step-Up DC/DC Converter MS Package LT1944-1 Dual Output 150mA (I SW), Constant Off-Time, V IN: 1.2V to 15V, VOUT(MAX): 34V, IQ: 20mA, ISD: <1mA, High Efficiency Step-Up DC/DC Converter MS Package LT1945 Dual Output, Pos/Neg, 350mA (I SW), V IN: 1.2V to 15V, VOUT(MAX): –34V, IQ: 20mA, ISD: <1mA, Constant Off-Time, High Efficiency Step-Up DC/DC Converter MS Package LT3464 85mA (I SW), High Efficiency Step-Up DC/DC Converter V IN: 2.3V to 10V, VOUT(MAX): 34V, IQ: 25mA, ISD: <1mA, with Integrated Schottky and PNP Disconnect ThinSOT Package CCD Bias Supply UTYPICAL APPLICATIO VIN VREF VOUT1 VOUT1 15V 10mA VOUT2 –8V 50mA SW1 FB2 LT3463A 10µH SHDN2 2.2µF VIN 2.7V TO 5V 1µF D1 4.7µF FB19 10SHDN1 10pF C1: TAIYO YUDEN JMK212BJ475MG C2: TAIYO YUDEN EMK316BJ225ML C3: TAIYO YUDEN LMK316BJ475ML C4: TAIYO YUDEN EMK212BJ105MG C5: AVX 06035A100KAT2A D1: DIODES, INC B0540W L1, L2: MURATA LQH32CN100K53 154k 90.9k 4.7µF 10µH Typical Waveforms for 15V Output Typical Waveforms for –8V Output VSW1 10V/DIV VOUT1 AC-COUPLED 50mV/DIV IL1 200mA/DIV 2ms/DIV 3463 TA04 VSW2 5V/DIV VOUT2 AC-COUPLED 50mV/DIV IL2 200mA/DIV 2ms/DIV 3463 TA05