LP4951C TI | Alldatasheet
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 LP4950C-5VandLP4951CAdjustableMicropowerVoltageRegulators Check forSamples: LP4950C-5V ,LP4951C 1FEATURES DESCRIPTION The LP4950C and LP4951C are micropowervoltage 2• High Accuracy 5V Specified100mA Output regulatorswithverylow quiescentcurrent(75μA typ.)• ExtremelyLow QuiescentCurrent and verylowdropoutvoltage(typ.40mV atlightloads
- Low Dropout Voltage and 380mV at 100mA). They are ideallysuitedfor use in battery-poweredsystems. Furthermore,the• ExtremelyTightLoad and LineRegulation quiescent current of the LP4950C/LP4951C• Very Low Temperature Coefficient increasesonlyslightlyindropout,prolongingbattery
- Use as Regulatoror Reference life.
- Needs Only 1μF forStability The LP4950C inthepopular3-pinTO-92 package is
- Currentand Thermal Limiting pin compatiblewitholder5V regulators.The 8-lead . LP4951C is availablein a plasticsurfacemount package and offersadditionalsystemfunctions. LP4951C VERSIONS ONLY One such featureisan errorflagoutputwhichwarns ofa low outputvoltage,oftendue tofallingbatteries• ErrorFlagWarns ofOutput Dropout on theinput.Itmay be used fora power-onreset.A• Logic-controlledElectronicShutdown second featureisthelogic-compatibleshutdown input• Output Pogrammable From 1.24to29V which enablesthe regulatorto be switchedon and off.Also,the partmay be pin-strappedfor a 5V outputor programmed from 1.24V to 29V withan externalpairofresistors. Careful design of the LP4950C/LP4951C has minimizedallcontributionsto the errorbudget.This includesa tightinitialtolerance(.5% typ.),extremely good loadand lineregulation(.05% typ.)and a very low outputvoltagetemperaturecoefficient,making thepartusefulas a low-powervoltagereference. BLOCK DIAGRAM AND TYPICAL APPLICATIONS LP4950C LP4951C Figure1. Figure2. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2002–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. ABSOLUTE MAXIMUM RATINGS (1) InputSupplyVoltage −0.3to+30V SHUTDOWN InputVoltage, −0.3to+30V ErrorComparatorOutput Voltage,(2) FEEDBACK InputVoltage (2)(3) −1.5to+30V Power Dissipation InternallyLimited JunctionTemperature(TJ) +150°C AmbientStorageTemperature −65° to+150°C ESD Rating Human Body Model (4) 2 kV Forsolderingspecifications,see thefollowingdocument:www.ti.com/lit/snoa549 (1) AbsoluteMaximum Ratingsarelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsareconditionsunderwhich operationofthedeviceisspecified.OperatingRatingsdo notimplyspecifiedperformancelimits.Forspecifiedperformancelimitsand associatedtestconditions,see theElectricalCharacteristicstables. (2) May exceed inputsupplyvoltage. (3) When used indual-supplysystemswhere theoutputterminalsees loadsreturnedtoa negativesupply,theoutputvoltageshouldbe diode-clampedtoground. (4) Human Body Model 1.5kΩ inserieswith100 pF.LP4950 -passes2 kV HBM. LP4951 -Allpinspass 2 kV exceptVfb-1000V. OPERATING RATINGS (1) Maximum InputSupplyVoltage 30V JunctionTemperatureRange (2) LP4950C, LP4951C −40°C to125°C (1) AbsoluteMaximum Ratingsarelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsareconditionsunderwhich operationofthedeviceisspecified.OperatingRatingsdo notimplyspecifiedperformancelimits.Forspecifiedperformancelimitsand associatedtestconditions,see theElectricalCharacteristicstables. (2) The junction-to-ambientthermalresistancesareas follows:180°C/W and 160°C/W fortheTO-92 package with0.40inchand 0.25inch leadstotheprintedcircuitboard(PCB) respectively,160°C/W forthemolded plasticSOIC (D).The above thermalresistancesforthe SOIC package applywhen thepackage issoldereddirectlytothePCB.
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS (1) LP4950CZ LP4951CMConditionsParameter Units(1) Tested Design Typ Limit(2) Limit(3) OutputVoltage TJ = 25°C 5.0 5.1 V max
4.9 V min
−25°C ≤ TJ ≤ 85°C 5.15 V max
4.85 V min
FullOperatingTemperatureRange 5.2 V max
4.8 V min
OutputVoltage 100 μA ≤ IL ≤ 100 mA 5.24 V max TJ ≤ TJMAX 4.76 V min OutputVoltageTemperature (4) 150 ppm/°C Coefficient LineRegulation(5) 6V ≤ VIN ≤ 30V (6) 0.04 0.2 % max 0.4 % max Load Regulation(5) 100μA ≤ IL ≤ 100mA 0.1 0.2 % max 0.3 % max DropoutVoltage(7) IL = 100μA 50 80 mV max 150 mV max IL = 100mA 380 450 mV max 600 mV max Ground Current IL = 100μA 75 150 μA max 170 μA max IL = 100mA 8 15 mA max 19 mA max DropoutGround Current VIN = 4.5V 110 200 μA max IL = 100μA 230 μA max CurrentLimit VOUT = 0 160 200 mA max 220 mA max ThermalRegulation (8) 0.05 0.2 %/W max OutputNoise,10 Hz to100 kHz C L = 1μF 430 μV rms C L = 200μF 160 μV rms C L = 3.3μF (Bypass= 0.01μF Pins7 100 μV rms to1 (LP4951C) (1) UnlessotherwisenotedalllimitsspecifiedforVIN = 6V,IL = 100μA and C L = 1μF.Limitsappearinginboldfacetypeapplyoverthe entirejunctiontemperaturerangeforoperation.LimitsappearinginnormaltypeapplyforTA = TJ = 25°C. Additionalconditionsforthe8- pinversionsareFEEDBACK tiedtoVTAP ,OUTPUT tiedtoSENSE (VOUT = 5V),and VSHUTDOWN ≤ 0.8V. (2) Specifiedand 100% productiontested. (3) Specifiedbutnot100% productiontested.These limitsarenotused tocalculateoutgoingAQL levels. (4) Outputorreferencevoltagetemperaturecoefficientisdefinedas theworstcase voltagechange dividedby thetotaltemperaturerange. (5) Regulationismeasured atconstantjunctiontemperature,usingpulsetestingwitha lowdutycycle.Changes inoutputvoltagedue to heatingeffectsarecoveredunderthespecificationforthermalregulation. (6) LineregulationfortheLP4951C istestedat150°C forIL = 1 mA. ForIL = 100μA and TJ = 125°C, lineregulationisspecifiedby designto 0.2%.See TypicalPerformanceCharacteristicsforlineregulationversustemperatureand loadcurrent. (7) DropoutVoltageisdefinedas theinputtooutputdifferentialatwhichtheoutputvoltagedrops100 mV belowitsnominalvalue measured at1V differential.Atverylowvaluesofprogrammed outputvoltage,theminimum inputsupplyvoltageof2V (2.3Vover temperature)must be takenintoaccount. (8) Thermalregulationisdefinedas thechange inoutputvoltageata timeT aftera change inpower dissipationisapplied,excludingload orlineregulationeffects.Specificationsarefora 50 mA loadpulseatVIN = 30V (1.25W pulse)forT = 10ms. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP4950C-5V LP4951C
LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com
ELECTRICAL CHARACTERISTICS
Parameter Conditions(1) Typ Tested Limit Design Limit Units (2) (3) 8-PINVERSIONS ONLY ReferenceVoltage 1.235 1.285 V max
1.295 V max
1.185 V min
1.165 Vmin
ReferenceVoltage (4) 1.335 V max
1.135 V min
Feedback PinBiasCurrent 20 40 nA max 60 nA max ReferenceVoltage (5) 50 ppm/°C TemperatureCoefficient Feedback PinBiasCurrent 0.1 nA/°C TemperatureCoefficient ErrorComparator OutputLeakage Current VOH = 30V 0.01 1 μA max 2 μA max OutputLow Voltage VIN = 4.5V 150 250 mV max IOL = 400μA 400 mV max Upper ThresholdVoltage (3) 60 40 mV min 25 mV min Lower ThresholdVoltage (6) 75 95 mV max 140 mV max Hysteresis (6) 15 mV Shutdown Input InputLogicVoltage 1.3 V Low (RegulatorON) 0.7 V max High(RegulatorOFF) 2.0 V min Shutdown PinInputCurrent VSHUTDOWN = 2.4V 30 50 μA max 100 μA max VSHUTDOWN = 30V 450 600 μA max 750 μA max RegulatorOutputCurrentin (7) 3 10 μA max Shutdown 20 μA max (1) UnlessotherwisenotedalllimitsspecifiedforVIN = 6V,IL = 100μA and C L = 1μF.Limitsappearinginboldfacetypeapplyoverthe entirejunctiontemperaturerangeforoperation.LimitsappearinginnormaltypeapplyforTA = TJ = 25°C. Additionalconditionsforthe8- pinversionsareFEEDBACK tiedtoVTAP ,OUTPUT tiedtoSENSE (VOUT = 5V),and VSHUTDOWN ≤ 0.8V. (2) Specifiedand 100% productiontested. (3) Specifiedbutnot100% productiontested.These limitsarenotused tocalculateoutgoingAQL levels. (4) VREF ≤ VOUT ≤ (VIN − 1V),2.3V≤ VIN ≤ 30V,100μA ≤ IL ≤ 100mA, TJ ≤ TJMAX . (5) Outputorreferencevoltagetemperaturecoefficientisdefinedas theworstcase voltagechange dividedby thetotaltemperaturerange. (6) Comparatorthresholdsareexpressedintermsofa voltagedifferentialattheFeedback terminalbelowthenominalreferencevoltage measured atVIN = 6V.To expressthesethresholdsintermsofoutputvoltagechange,multiplyby theerroramplifiergain= VOUT /VREF = (R1 + R2)/R2.Forexample,ata programmed outputvoltageof5V,theErroroutputisspecifiedtogo lowwhen theoutputdropsby 95 mV × 5V/1.235V= 384 mV. Thresholdsremainconstantas a percentofVOUT as VOUT isvaried,withthedropoutwarningoccurringat typically5% belownominal,7.5% specified. (7) VSHUTDOWN ≥ 2V,VIN ≤ 30V,VOUT = 0,Feedback pintiedtoVTAP .
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 CONNECTION DIAGRAMS TO-92 PlasticPackage Surface-MountPackage (SOIC) Figure3.Bottom View Figure4.Top View Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP4950C-5V LP4951C
LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS QuiescentCurrent Dropout Characteristics Figure5. Figure6. InputCurrent InputCurrent Figure7. Figure8. Output Voltage vs. Temperature of3 RepresentativeUnits QuiescentCurrent Figure9. Figure10.
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) QuiescentCurrent QuiescentCurrent Figure11. Figure12. QuiescentCurrent ShortCircuitCurrent Figure13. Figure14. Dropout Voltage Dropout Voltage Figure15. Figure16. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP4950C-5V LP4951C
COMPARATOR OUTPUT (V) INPUT VOLTAGE (V) VOUT = 5V HYSTERESIS NOTE: PULLUP RESISTOR TO SEPARATE 5V SUPPLY LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) LP4951C Minimum OperatingVoltage LP4951C Feedback Bias Current Figure17. Figure18. LP4951C Feedback Pin Current LP4951C ErrorComparator Output Figure19. Figure20. LP4951C Comparator Sink Current LineTransientResponse Figure21. Figure22.
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Load TransientResponse Load TransientResponse Figure23. Figure24. LP4951C Enable Transient Output Impedance Figure25. Figure26. RippleRejection RippleRejection Figure27. Figure28. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP4950C-5V LP4951C
LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) RippleRejection Output Noise Figure29. Figure30. LP4951C DividerResistance Shutdown ThresholdVoltage Figure31. Figure32. LineRegulation LP4951C Maximum Rated Output Current Figure33. Figure34.
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Thermal Response Figure35. APPLICATION HINTS EXTERNAL CAPACITORS A 1.0μF (orgreater)capacitorisrequiredbetween theoutputand groundforstabilityatoutputvoltagesof5V or more.At loweroutputvoltages,more capacitanceisrequired.Withoutthiscapacitorthepartwilloscillate.Most typesoftantalumor aluminum electrolyticswork finehere;even filmtypeswork butare notrecommended for reasonsofcost.Many aluminum electrolyticshave electrolytesthatfreezeatabout−30°C, so solidtantalumsare recommended foroperationbelow−25°C. The importantparametersofthecapacitorarean ESR ofabout5 Ω or lessand a resonantfrequencyabove 500 kHz.The valueofthiscapacitormay be increasedwithoutlimit. At lowervaluesofoutputcurrent,lessoutputcapacitanceisrequiredforstability.The capacitorcan be reduced to0.33μF forcurrentsbelow10 mA or0.1μF forcurrentsbelow1 mA. Usingthe8-pinversionatvoltagesbelow 5V runstheerroramplifieratlowergainsso thatmore outputcapacitanceisneeded.Fortheworst-casesituation ofa 100 mA loadat1.23Voutput(OutputshortedtoFeedback)a 3.3μF (orgreater)capacitorshouldbe used. Unlikemany otherregulators,theLP4950C willremainstableand inregulationwithno loadinadditiontothe internalvoltagedivider.ThisisespeciallyimportantinCMOS RAM keep-aliveapplications.When settingthe outputvoltageoftheLP4951C versionwithexternalresistors,a minimum loadof1μA isrecommended. A 0.1μF capacitorshouldbe placedfromtheLP4950C/LP4951C inputtogroundifthereismore than10 inches ofwirebetween theinputand theAC filtercapacitororifa batteryisused as theinput. Straycapacitanceto the LP4951C Feedback terminal(pin7) can cause instability.Thismay especiallybe a problemwhen usinghighvalueexternalresistorstosettheoutputvoltage.Adding a 100pF capacitorbetween Outputand Feedback and increasingtheoutputcapacitortoatleast3.3μF willfixthisproblem. ERROR DETECTION COMPARATOR OUTPUT The comparatorproducesa logiclow outputwhenever theLP4951C outputfallsoutofregulationby more than approximately5%. Thisfigureisthecomparator'sbuilt-inoffsetofabout60 mV dividedby the1.235reference voltage.(See to the blockdiagram inthe frontof the datasheet.)Thistriplevelremains“5% below normal” regardlessof the programmed outputvoltageof the 4951C. For example,the errorflagtriplevelistypically 4.75V fora 5V outputor11.4V fora 12V output.The outofregulationconditionmay be due eithertolow input voltage,currentlimiting,orthermallimiting. Figure36 below givesa timingdiagram depictingthe ERROR signaland the regulatedoutputvoltageas the LP4951C inputisramped up and down. The ERROR signalbecomes valid(low)atabout1.3Vinput.Itgoes high at about 5V input(theinputvoltageat which VOUT = 4.75V).Since the LP4951C's dropoutvoltageisload- dependent(seecurveintypicalperformancecharacteristics),theinputvoltagetrippoint(about5V) willvarywith theloadcurrent.The outputvoltagetrippoint(approx.4.75V)does notvarywithload. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP4950C-5V LP4951C
LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com The errorcomparatorhas an open-collectoroutputwhich requiresan externalpullupresistor.Thisresistormay be returnedto the outputor some othersupplyvoltagedependingon system requirements.In determininga valueforthisresistor,notethatwhiletheoutputisratedtosink400μA,thissinkcurrentadds tobatterydrainina low batterycondition.Suggested valuesrange from 100k to1 M Ω.The resistorisnotrequiredifthisoutputis unused. *When VIN ≤ 1.3V,theerrorflagpinbecomes a highimpedance,and theerrorflagvoltagerisestoitspull-upvoltage. UsingVOUT as thepull-upvoltage(seeFigure37),ratherthanan external5V source,willkeep theerrorflagvoltage under1.2V(typ.)inthiscondition.The usermay wishtodividedown theerrorflagvoltageusingequal-valueresistors (10kΩ suggested),toensurea low-levellogicsignalduringany faultcondition,whilestillallowinga validhighlogic levelduringnormaloperation. Figure36. ERROR Output Timing PROGRAMMING THE OUTPUT VOLTAGE (LP4951C) The LP4951C may be pin-strappedfor5V usingitsinternalvoltagedividerby tyingthepin1 (output)topin2 (sense)pinstogether,and alsotyingthepin7 (feedback)and pin6 (VTAP )pinstogether.Alternatively,itmay be programmed forany outputvoltagebetween its1.235V referenceand its30V maximum rating.As seen in Figure37,an externalpairofresistorsisrequired. The completeequationfortheoutputvoltageis (1) where VREF isthenominal1.235referencevoltageand IFB isthefeedbackpinbiascurrent,nominally−20 nA. The minimum recommended load currentof 1μA forcesan upper limitof 1.2 M Ω on the valueof R 2, ifthe regulatormust work withno load(a conditionoftenfound inCMOS instandby).IFB willproduce a 2% typical errorinVOUT whichmay be eliminatedatroom temperatureby trimmingR 1.For betteraccuracy,choosingR 2 = 100k reducesthiserrorto 0.17% whileincreasingthe resistorprogram currentto 12μA. Since the LP4951C typicallydraws 60μA atno loadwithPin2 open-circuited,thisisa smallpricetopay.
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 *See ApplicationHints .**DrivewithTTL-hightoshutdown. Ground orleaveopen ifshutdownfeatureisnottobe used. Note:Pins2 and 6 areleftopen. Figure37. AdjustableRegulator(LP4951C) REDUCING OUTPUT NOISE Inreferenceapplicationsitmay be advantageoustoreducetheAC noisepresentattheoutput.One method isto reducetheregulatorbandwidthby increasingthesizeoftheoutputcapacitor.Thisistheonlyway noisecan be reducedon the3 leadLP4950C butisrelativelyinefficient,as increasingthecapacitorfrom 1μF to220μF only decreasesthenoisefrom430μV to160μV rms fora 100kHz bandwidthat5V output. Noisecan be reducedfourfoldby a bypass capacitoracrossR 1,sinceitreducesthehighfrequencygainfrom4 tounity.Pick (2) or about0.01μF. When doingthis,theoutputcapacitormust be increasedto3.3μF tomaintainstability.These changes reduce the outputnoisefrom 430μV to 100μV rms fora 100kHz bandwidthat 5V output.With the bypass capacitoradded,noiseno longerscaleswithoutputvoltageso thatimprovementsaremore dramaticat higheroutputvoltages. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP4950C-5V LP4951C
LP4950C-5V,LP4951C SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013 www.ti.com SCHEMATIC DIAGRAM
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LP4950C-5V,LP4951C www.ti.com SNVS208C –SEPTEMBER 2002–REVISED APRIL 2013
REVISION HISTORY
Changes from RevisionB (April2013)toRevisionC Page Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP4950C-5V LP4951C
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LP4951CM/NOPB Active Production SOIC (D) | 8 95 | TUBE Yes SN Level-1-260C-UNLIM -40 to 125 LP495 1CM LP4951CM/NOPB.B Active Production SOIC (D) | 8 95 | TUBE Yes SN Level-1-260C-UNLIM -40 to 125 LP495 1CM LP4951CMX/NOPB Active Production SOIC (D) | 8 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 LP495 1CM LP4951CMX/NOPB.B Active Production SOIC (D) | 8 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 LP495 1CM (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
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PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP4951CMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) LP4951CM/NOPB D SOIC 8 95 495 8 4064 3.05 LP4951CM/NOPB.B D SOIC 8 95 495 8 4064 3.05 Pack Materials-Page 3
www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800
www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM
www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5
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