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www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 LMZ105055ASIMPLESWITCHER® PowerModulewith5.5VMaximumInputVoltage Check forSamples: LMZ10505 1FEATURES ELECTRICAL SPECIFICATIONS 2• IntegratedShieldedInductor

  • 25W Maximum TotalOutput Power• FlexibleStartupSequencing Using External
  • Up to5A Output CurrentSoft-Start,Tracking,and PrecisionEnable
  • InputVoltageRange 2.95Vto5.5V• ProtectionAgainstIn-RushCurrentsand
  • Output VoltageRange 0.8Vto5VFaultssuch as InputUVLO and Output Short- Circuit • ±1.63% Feedback VoltageAccuracy Over Temperature• -40°C to+125°C JunctionTemperature OperatingRange • Efficiencyup to96%
  • SingleExposed Pad and Standard Pinoutfor PERFORMANCE BENEFITSEasy Mounting and Manufacturing
  • Pin-to-PinCompatible with • Operates atHigh Ambient Temperatures – LMZ10503 (3A/15W max) • High Efficiencyup to96% Reduces System Heat Generation– LMZ10504 (4A/20W max)
  • Low RadiatedEmissions (EMI)Complies with• FullyEnable forWEBENCH ® and Power EN55022 Class B Standard(2)Designer
  • Passes 10V/m RadiatedImmunity EMI Ttest APPLICATIONS Standard EN61000 4-3
  • Low Output VoltageRippleof10 mV Allows• Point-of-LoadConversions from 3.3Vand 5V forPowering Noise-SensitiveTransceiverandRails SignalingICs• Space constrainedapplications
  • FastTransientResponse forPowering FPGAs• Extreme Temperatures/noAirFlow and ASICsEnvironments
  • Noise SensitiveApplications(i.e.Transceiver, DESCRIPTIONMedical) The LMZ10505 SIMPLE SWITCHER ® power module isa complete,easy-to-useDC-DC solutioncapableof drivingup to a 5A load with exceptionalpower conversionefficiency,outputvoltageaccuracy,line and loadregulation.The LMZ10505 isavailableinan innovative package that enhances thermal performance and allows for hand or machine soldering. Figure1. Easy toUse 7 Pin Package PFM 7 Pin Package θJA = 20°C/W, θJC = 1.9°C/W (1) RoHS Compliant (1) θ JA measured on a 2.25”x 2.25”(5.8cm x 5.8cm) fourlayer board,withone ounce copper,thirtysix10milthermalvias,no airflow,and 1W power dissipation.RefertoPCB Layout DiagramsorEvaluationBoard ApplicationNote:AN-2022 (2) EN 55022:2006,+A1:2007,FCC Part15 SubpartB:2007. (SNVA421 ). See Table9 and layoutforinformationon deviceundertest. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com DESCRIPTION (CONTINUED) The LMZ10505 can acceptan inputvoltagerailbetween 2.95V and 5.5V and deliveran adjustableand highlyaccurateoutputvoltageas low as 0.8V.One megahertzfixedfrequencyPWM switchingprovidesa predictableEMI characteristic.Two externalcompensationcomponents can be adjustedto setthe fastest response time,whileallowingthe optionto use ceramicand/orelectrolyticoutputcapacitors.Externally programmable soft-startcapacitorfacilitatescontrolledstartup.The LMZ10505 is a reliableand robust solutionwiththe followingfeatures:losslesscycle-by-cyclepeak currentlimitto protectforover currentor short-circuitfault,thermalshutdown,inputunder-voltagelock-out,and pre-biasedstartup. System Performance Figure2. CurrentDerating(VOUT = 3.3V) Figure3. Efficiency(VOUT = 3.3V) Figure4. RadiatedEmissions (EN 55022,Class B)

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6 VOUT

1 VIN

4 GND

7 VOUT

3 4, EP 6, 7 LMZ10505 www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 TypicalApplicationCircuit Connection Diagram Figure5. 7-Lead PFM -Top View PIN DESCRIPTIONS Pin Number Name Description 1 VIN Power supplyinput.A lowESR inputcapacitanceshouldbe locatedas closeas possibletotheVIN pinand exposed pad (EP). 2 EN Activehighenableinputforthedevice. 3 SS Soft-startcontrolpin.An internal2 µA currentsourcechargesan externalcapacitorconnectedbetween SS and GND pinstosettheoutputvoltageramp rateduringstartup.The SS pincan alsobe used toconfigure thetrackingfeature. 4 GND Power groundand signalground.Providea directconnectiontotheEP. Placethebottomfeedbackresistor as closeas possibletoGND and FB pin. 5 FB Feedback pin.Thisistheinvertinginputoftheerroramplifierused forsensingtheoutputvoltage.Keep the copperareaofthisnode small. 6,7 VOUT The outputterminaloftheinternalinductor.Connecttheoutputfiltercapacitorbetween VOUT pinand EP. EP Exposed Exposed pad isused as a thermalconnectiontoremove heatfromthedevice.Connectthispad tothePC Pad boardgroundplaneinordertoreducethermalresistancevalue.EP must alsoprovidea directelectrical connectiontotheinputand outputcapacitorsgroundterminals.ConnectEP topin4. These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMZ10505

SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com AbsoluteMaximum Ratings(1)(2) VIN,VOUT, EN, FB, SS toGND -0.3Vto6.0V ESD Susceptibility(3) ±2 kV Power Dissipation InternallyLimited JunctionTemperature 150°C StorageTemperatureRange -65°C to150°C Peak ReflowCase Temperature 245°C (30sec) Forsolderingspecifications,refertothefollowingdocument:www.ti.com/lit/snoa549c (1) AbsoluteMaximum Ratingsarelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsareconditionsunderwhich operationofthedeviceisintendedtobe functional.Forensuredspecificationsand testconditions,see theElectricalCharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) The human body model isa 100 pF capacitordischargedthrougha 1.5kΩ resistorintoeach pin.Testmethod isperJESD22-AI14S. OperatingRatings(1) VIN toGND 2.95Vto5.5V JunctionTemperature(TJ) -40°C to125°C (1) AbsoluteMaximum Ratingsarelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsareconditionsunderwhich operationofthedeviceisintendedtobe functional.Forensuredspecificationsand testconditions,see theElectricalCharacteristics. ElectricalCharacteristics SpecificationswithstandardtypefaceareforTJ = 25°C only;limitsinboldfacetypeapplyovertheoperatingjunction temperaturerangeTJ of-40°C to125°C. Minimum and maximum limitsareensuredthroughtest,design,orstatistical correlation.Typicalvaluesrepresentthemost likelyparametricnorm atTJ = 25°C, and areprovidedforreferencepurposes only.VIN = VEN = 3.3V,unlessotherwiseindicatedintheconditionscolumn. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units SYSTEM PARAMETERS IncludingLineand Load Regulation VOUT = 2.5V IOUT = 0A to5A IOUT = 0A IOUT = 5A VIN(UVLO) InputUVLO Threshold(MeasuredatVIN Rising 2.6 2.95 V pin) Falling 1.95 2.4 ISS Soft-StartCurrent ChargingCurrent 2 µA IQ Non-SwitchingInputCurrent VFB = 1V 1.55 3 mA ISD ShutDown QuiescentCurrent VIN = 5.5V,VEN = 0V 267 500 µA IOCL OutputCurrentLimit(AverageCurrent) VOUT = 2.5V 5.1 7.3 8.7 A fFB FrequencyFold-back Incurrentlimit 250 kHz PWM SECTION fSW SwitchingFrequency 750 1000 1160 kHz D range PWM DutyCycleRange 0 100 % ENABLE CONTROL VEN-IH EN PinRisingThreshold 1.23 1.8 V VEN-IF EN PinFallingThreshold 0.8 1.06 V (1) Min and Max limitsare100% productiontestedatan ambienttemperature(TA)of25°C. Limitsovertheoperatingtemperaturerangeare ensuredthroughcorrelationusingStatisticalQualityControl(SQC) methods.Limitsareused tocalculateAverageOutgoingQuality Level(AOQL). (2) Typicalnumbers areat25°C and representthemost likelyparametricnorm.

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www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 ElectricalCharacteristics(continued) SpecificationswithstandardtypefaceareforTJ = 25°C only;limitsinboldfacetypeapplyovertheoperatingjunction temperaturerangeTJ of-40°C to125°C. Minimum and maximum limitsareensuredthroughtest,design,orstatistical correlation.Typicalvaluesrepresentthemost likelyparametricnorm atTJ = 25°C, and areprovidedforreferencepurposes only.VIN = VEN = 3.3V,unlessotherwiseindicatedintheconditionscolumn. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units THERMAL CONTROL TSD TJ forThermalShutdown 145 °C TSD-HYS HysteresisforThermalShutdown 10 °C THERMAL RESISTANCE θJA JunctiontoAmbient See (3) 20 °C/W θJC JunctiontoCase No airflow 1.9 °C/W PERFORMANCE PARAMETERS ΔVOUT OutputVoltageRipple RefertoTable3 10 mV pk- VOUT = 2.5V pk BandwidthLimit= 2 MHz ΔVOUT OutputVoltageRipple RefertoTable5 5 mV pk- BandwidthLimit= 20 MHz pk ΔVFB /VFB Feedback VoltageLineRegulation ΔVIN = 2.95Vto5.5V 0.04 %IOUT = 0A ΔVOUT /VOUT OutputVoltageLineRegulation ΔVIN = 2.95Vto5.5V 0.04 %IOUT = 0A,VOUT = 2.5V ΔVFB /VFB Feedback VoltageLoad Regulation IOUT = 0A to5A 0.25 % ΔVOUT /VOUT OutputVoltageLoad Regulation IOUT = 0A to5A 0.25 % VOUT = 2.5V Efficiency η Peak Efficiency(1A)VIN = 5V VOUT = 3.3V 96.1 VOUT = 2.5V 94.8 VOUT = 1.8V 93.1 VOUT = 1.5V 92 VOUT = 1.2V 90.4 VOUT = 0.8V 86.8 η Peak Efficiency(1A)VIN = 3.3V VOUT = 2.5V 95.7 % VOUT = 1.8V 94.1 VOUT = 1.5V 93.0 VOUT = 1.2V 91.6 VOUT = 0.8V 88.3 η FullLoad Efficiency(3A)VIN = 5V VOUT = 3.3V 93.1 % VOUT = 2.5V 91.2 VOUT = 1.8V 88.5 VOUT = 1.5V 86.7 VOUT = 1.2V 84.1 VOUT = 0.8V 78.2 η FullLoad Efficiency(3A)VIN = 3.3V VOUT = 2.5V 89.8 % VOUT = 1.8V 86.9 VOUT = 1.5V 85.1 VOUT = 1.2V 82.5 VOUT = 0.8V 76.2 (3) θ JA measured on a 2.25”x 2.25”(5.8cm x 5.8cm) fourlayerboard,withone ounce copper,thirtysix10milthermalvias,no airflow, and 1W power dissipation.RefertoPCB LayoutDiagramsorEvaluationBoard ApplicationNote:AN-2022 (SNVA421 ). Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMZ10505

SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics Unlessotherwisespecified,thefollowingconditionsapply:VIN = VEN = 5.0V,C IN is47 µF 10V X5R ceramiccapacitor;TAMBIENT = 25°C forefficiencycurvesand waveforms. Load TransientResponse Load TransientResponse

20 MHz Bandwidth Limited 20 MHz Bandwidth Limited

RefertoTable5 forBOM, includesoptionalcomponents RefertoTable5 forBOM, includesoptionalcomponents Figure6. Figure7. Output VoltageRipple Output VoltageRipple VIN = 3.3V,VOUT = 2.5V,IOUT = 5A, 20 mV/DIV VIN = 5.0V,VOUT = 2.5V,IOUT = 5A, 20 mV/DIV RefertoTable5 forBOM RefertoTable5 forBOM Figure8. Figure9. Efficiency Efficiency VOUT = 3.3V VOUT = 2.5V Figure10. Figure11.

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www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 TypicalPerformance Characteristics(continued) Unlessotherwisespecified,thefollowingconditionsapply:VIN = VEN = 5.0V,C IN is47 µF 10V X5R ceramiccapacitor;TAMBIENT = 25°C forefficiencycurvesand waveforms. Efficiency Efficiency VOUT = 1.8V VOUT = 1.5V Figure12. Figure13. Efficiency Efficiency VOUT = 1.2V VOUT = 0.8V Figure14. Figure15. CurrentDerating CurrentDerating VIN = 5V,θJA = 20°C /W VIN = 3.3V,θJA = 20°C /W Figure16. Figure17. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMZ10505

SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics(continued) Unlessotherwisespecified,thefollowingconditionsapply:VIN = VEN = 5.0V,C IN is47 µF 10V X5R ceramiccapacitor;TAMBIENT = 25°C forefficiencycurvesand waveforms. RadiatedEmissions (EN 55022,Class B) VIN = 5V,VOUT = 2.5V,IOUT = 5A Startup EvaluationBoard VOUT = 2.5V,IOUT = 0A Figure18. Figure19. Pre-biasedStartup VOUT = 2.5V,IOUT = 0A Figure20.

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IOUT x D x (1 - D) fSW x 'VIN LMZ10505 www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 Block Diagram DESIGN GUIDELINE AND OPERATING DESCRIPTION Design Steps LMZ10505 is fullysupportedby Webench ® and offersthe following:component selection,performance, electrical,and thermalsimulationsas wellas theBuild-Itboard,fora reduceddesigntime.On theotherhand,all externalcomponents can be calculatedby followingthedesignprocedurebelow. 1. Determinetheinputvoltageand outputvoltage.Also,make noteoftheripplevoltageand voltagetransient requirements. 2. Determinethenecessaryinputand outputcapacitance. 3. Calculatethefeedbackresistordivider. 4. Selecttheoptimizedcompensationcomponent values. 5. Estimatethepower dissipationand boardthermalrequirements. 6. FollowthePCB designguideline. 7. Learn about the LMZ10505 featuressuch as enable,inputUVLO, soft-start,tracking,pre-biasedstartup, currentlimit,and thermalshutdown. Design Example Forthisexample thefollowingapplicationparametersexist.

  • VIN = 5V
  • VOUT = 2.5V
  • IOUT = 5A
  • ΔVOUT = 20 mV pk-pk
  • ΔVo_tran= ±20 mV pk-pk InputCapacitorSelection A 22 µF or47 µF highqualitydielectric(X5R,X7R) ceramiccapacitorratedattwicethemaximum inputvoltage istypicallysufficient.The inputcapacitormust be placedas closeas possibletotheVIN pinand GND exposed pad to substantiallyeliminatethe parasiticeffectsof any strayinductanceor resistanceon the PC board and supplylines. Neglectingcapacitorequivalentseriesresistance(ESR), the resultantinputcapacitorAC ripplevoltageisa triangularwaveform.The minimum inputcapacitancefora givenpeak-to-peakvalue(ΔVIN)ofVIN isspecifiedas follows: (1) Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMZ10505

4 x VOUT x (VIN -VOUT ) x 'Vo_tranC ot 'iL = (5V ± 2.5V) x

1.5 PH x 1 MHz

2.5V 5V = 833 mA 'iL = (VIN - VOUT ) x D L x fSW 'C OUT = 'iL 8 x fSW x ['VOUT ± ('iL x RESR )] ICin(RMS) = IOUT x D(1-D) C in 8 5A x ( ) x (1 - )

1 MHz x 50mV

2.5V 2.5V 5V 8 25µF D = VOUT VIN LMZ10505 SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com where thePWM dutycycle,D, isgivenby: (2) IfΔVIN is1% ofVIN,thisequalsto50 mV and fSW = 1 MHz (3) A second criteriabeforefinalizingtheC in bypass capacitoristheRMS currentcapability.The necessaryRMS currentratingoftheinputcapacitortoa buck regulatorcan be estimatedby (4) (5) With thishigh AC currentpresentin the inputcapacitor,the RMS currentratingbecomes an important parameter.The maximum inputcapacitorripplevoltageand RMS currentoccurat 50% dutycycle.Selectan inputcapacitorratedforatleastthemaximum calculatedICin(RMS). Additionalbulk capacitancewithhigherESR may be requiredto damp any resonance effectsof the input capacitanceand parasiticinductance. Output CapacitorSelection In general,22 µF to 100 µF highqualitydielectric(X5R, X7R) ceramiccapacitorratedat twicethe maximum outputvoltageissufficientgiventheoptimalhighfrequencycharacteristicsand low ESR ofceramicdielectrics. Although,theoutputcapacitorcan alsobe ofelectrolyticchemistryforincreasedcapacitancedensity. Two outputcapacitanceequationsare requiredto determinethe minimum outputcapacitance.One equation determinesthe outputcapacitance(CO ) based on PWM ripplevoltage.The second equationdeterminesC O based on theloadtransientcharacteristics.Selectthelargestcapacitancevalueofthetwo. The minimum capacitance,giventhemaximum outputvoltageripple(ΔVOUT ) requirement,isdeterminedby the followingequation: (6) Where thepeak topeak inductorcurrentripple(ΔiL)isequalto: (7) R ESR isthetotaloutputcapacitorESR, L istheinductancevalueoftheinternalpower inductor,where L = 1.5 µH, and fSW = 1 MHz. Therefore,perthedesignexample: (8) The minimum outputcapacitancerequirementdue tothePWM ripplevoltageis: (9) (10) Threemiliohmsisa typicalR ESR valueforceramiccapacitors. The followingequationprovidesa good firstpass capacitancerequirementfora loadtransient: (11) Where Istep isthepeak topeak loadstep(10% to90% ofthemaximum loadforthisexample),VFB = 0.8V,and ΔVo_tranisthemaximum outputvoltagedeviation,whichis±20 mV. Thereforethecapacitancerequirementforthegivendesignparametersis:

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VOUT = 0.8V xR fbt + Rfbb R fbb LMZ10505 www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 (12) (13) Inthisparticulardesigntheoutputcapacitanceisdeterminedby theloadtransientrequirements. Table1 listssome examplesofcommerciallyavailablecapacitorsthatcan be used withtheLMZ10505. Table1.Recommended Output FilterCapacitors C O (µF) Voltage(V),R ESR (mΩ) Make Manufacturer PartNumber Case Size 22 6.3,< 5 Ceramic,X5R TDK C3216X5R0J226M 1206 47 6.3,< 5 Ceramic,X5R TDK C3216X5R0J476M 1206 47 6.3,< 5 Ceramic,X5R TDK C3225X5R0J476M 1210 47 10.0,< 5 Ceramic,X5R TDK C3225X5R1A476M 1210 100 6.3,< 5 Ceramic,X5R TDK C3225X5R0J107M 1210 100 6.3,50 Tantalum AVX TPSD157M006#0050 D, 7.5x 4.3x 2.9mm 100 6.3,25 OrganicPolymer Sanyo 6TPE100MPB2 B2,3.5x 2.8x 1.9mm 150 6.3,18 OrganicPolymer Sanyo 6TPE150MIC2 C2, 6.0x 3.2x 1.8mm 330 6.3,18 OrganicPolymer Sanyo 6TPE330MIL D3L, 7.3x 4.3x 2.8mm 470 6.3,23 NiobiumOxide AVX NOME37M006#0023 E,7.3x 4.3x 4.1mm Output VoltageSetting A resistordividernetworkfromVOUT totheFB pindeterminesthedesiredoutputvoltageas follows: (14) R fbtisdefinedbased on thevoltagelooprequirementsand R fbb isthenselectedforthedesiredoutputvoltage. Resistorsare normallyselectedas 0.5% or 1% tolerance.Higheraccuracyresistorssuch as 0.1% are also available. The feedbackvoltage(atVOUT = 2.5V)isaccuratetowithin-2.5% /+2.5% overtemperatureand overlineand loadregulation.Additionally,theLMZ10505 containserrornullingcircuitrytosubstantiallyeliminatethefeedback voltagevariationovertemperatureas wellas thelongtermagingeffectsoftheinternalamplifiers.Inadditionthe zeronullingcircuitdramaticallyreducesthe1/fnoiseofthebandgap amplifierand reference.The manifestation ofthiscircuitactionisthatthedutycyclewillhave two slightlydifferentbutdistinctoperatingpoints,each evident everyotherswitchingcycle. Loop Compensation The LMZ10505 preservesflexibilityby integratingthecontrolcomponents aroundtheinternalerroramplifierwhile utilizingthreesmallexternalcompensationcomponents from VOUT to FB. An integratedtypeII(twopole,one zero)voltage-modecompensationnetworkisfeatured.To ensurestability,an externalresistorand smallvalue capacitorcan be added acrosstheupperfeedbackresistoras a pole-zeropairtocompletea typeIII(threepole, two zero)compensationnetwork.The compensationcomponents recommended in Table 2 providetype III compensationatan optimalcontrolloopperformance.The typicalphase marginis45° witha bandwidthof80 kHz. Calculatedoutputcapacitancevalues not listedin Table 2 should be verifiedbeforedesigninginto production.A detailedapplicationnote is availableto provideverificationsupport,AN-2013 (SNVA417 ).In general,calculatedoutputcapacitancevaluesbelow thesuggestedvaluewillhave reducedphase marginand highercontrolloopbandwidth.Outputcapacitancevaluesabove thesuggestedvalueswillexperiencea lower bandwidthand increasedphase margin.Higherbandwidthisassociatedwithfastersystem responsetosudden changes such as load transients.Phase margin changes the characteristicsof the response.Lower phase margin is associatedwith underdamped ringingand higherphase margin is associatedwith overdamped response.Losingallphase marginwillcause thesystem tobe unstable;an optimizedareaofoperationis30° to 60° ofphase margin,witha bandwidthof100 kHz ±20 kHz. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMZ10505

Board Area_cm2 8 oC x cm2 W TCA < TJ(MAX) - TA(MAX) PIC_LOSS - TJC LMZ10505 SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com Table2.LMZ10505 Compensation Component Values VIN (V) C O (µF) ESR (mΩ) R fbt(kΩ)(1) C comp (pF)(1) R comp (kΩ)(1) Min Max 22 2 20 200 27 1.5 47 2 20 124 56 1.4 100 1 10 82.5 120 1 150 1 5 63.4 180 1.21 5.0 150 10 25 63.4 220 16.5 150 26 50 44.2 220 23.7 220 15 30 63.4 220 23.7 220 31 60 76.8 220 57.6 22 2 20 118 39 9.09 47 2 20 76.8 82 8.45 100 1 10 49.9 180 4.12 150 1 5 40.2 330 2.0 3.3 150 10 25 43.2 330 11.5 150 26 50 49.9 270 25.5 220 15 30 40.2 390 15.4 220 31 60 48.7 330 35.7 (1) Inthespecialcase where theoutputvoltageis0.8V,itisrecommended toremove R fbband keep R fbt,R comp ,and C comp fora typeIII compensation. EstimatePower DissipationAnd Board Thermal Requirements Use the currentderatingcurvesin the TypicalPerformanceCharacteristicssectionto obtainan estimateof power loss(PIC_LOSS ).For thedesigncase ofVIN = 5V, VOUT = 2.5V,IOUT = 5A, TA(MAX) = 85°C ,and TJ(MAX) = 125°C, thedevicemust see a thermalresistancefromcase toambient(θCA )oflessthan: (15) (16) Given thetypicalthermalresistancefromjunctiontocase (θJC)tobe 1.9°C/W (typ.).Continuouslyoperatingata TJ greaterthan125°C willhave a shortenlifespan. To reachθCA = 27.5°C/W, thePCB isrequiredtodissipateheateffectively.Withno airflowand no externalheat, a good estimateoftherequiredboardareacoveredby 1oz.copperon boththetopand bottommetallayersis: (17) (18) As a result,approximately18 squarecm of1oz.copperon topand bottomlayersisrequiredforthePCB design.

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www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 The PCB copperheatsinkmust be connectedtotheexposed pad (EP).Approximatelythirtysix,10mils(254 μm) thermalviasspaced 59mils(1.5mm) apartmust connectthe top copper to the bottom copper.For an extendeddiscussionand formulationsofthermalrulesofthumb,refertoAN-2020 (SNVA419 ).Foran example of a highthermalperformancePCB layoutwithθJA of20°C/W, refertotheevaluationboard applicationnoteAN- 2022 (SNVA421 )and forresultsofa studyoftheeffectsofthePCB designs,refertoAN-2026 (SNVA424 ). PC Board Layout Guidelines PC boardlayoutisan importantpartofDC-DC converterdesign.Poor boardlayoutcan disrupttheperformance ofa DC-DC converterand surroundingcircuitryby contributingtoEMI, groundbounce and resistivevoltagedrop inthetraces.These can send erroneoussignalstotheDC-DC converterresultinginpoorregulationorinstability. Good layoutcan be implementedby followinga few simpledesignrules. Figure21. High CurrentLoops 1.Minimizeareaofswitchedcurrentloops. From an EMI reductionstandpoint,itisimperativetominimizethehighdi/dtcurrentpaths.The highcurrentthat does notoverlapcontainshighdi/dt,see Figure21.Thereforephysicallyplaceinputcapacitor(Cin1)as closeas possibleto the LMZ10505 VIN pinand GND exposed pad to avoidobservablehighfrequencynoiseon the outputpin.Thiswillminimizethehighdi/dtarea and reduceradiatedEMI. Additionally,groundingforboththe inputand outputcapacitorshouldconsistofa localizedtopsideplanethatconnectstotheGND exposed pad (EP). 2.Have a singlepointground. The groundconnectionsforthefeedback,soft-start,and enablecomponents shouldbe routedonlytotheGND pinofthedevice.Thispreventsany switchedor loadcurrentsfrom flowingintheanalogground traces.Ifnot properlyplaced,poorgroundingcan resultindegradedloadregulationorerraticoutputvoltageripplebehavior. Providethesinglepointgroundconnectionfrompin4 toEP. 3.MinimizetracelengthtotheFB pin. Both feedbackresistors,R fbtand R fbb,and thecompensationcomponents,R comp and C comp ,shouldbe located closetotheFB pin.SincetheFB node ishighimpedance,keep thecopperarea as smallas possible.Thisis most importantas relativelyhighvalueresistorsareused tosettheoutputvoltage. 4.Make inputand outputbus connectionsas wide as possible. Thisreducesany voltagedrops on the inputor outputof the converterand maximizesefficiency.To optimize voltageaccuracyattheload,ensurethata separatefeedbackvoltagesense traceismade attheload.Doing so willcorrectforvoltagedropsand provideoptimum outputaccuracy. 5.Provideadequate deviceheat-sinking. Use an arrayofheat-sinkingviastoconnecttheexposed pad totheground planeon thebottomPCB layer.If thePCB has multiplecopperlayers,thermalviascan alsobe employed tomake connectiontoinnerlayerheat- spreadingground planes.For bestresultsuse a 6 x 6 viaarraywithminimum viadiameterof10mils(254 μm) thermalviasspaced 59mils(1.5mm). Ensure enough copperarea isused forheat-sinkingtokeep thejunction temperaturebelow125°C. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMZ10505

C SS = tSS x ISS VREF VIN EN GND VOUT R enb R ent VIN C in1 Master Power Supply VOUT1 VOUT2 C O1 LMZ10505 VIN EN GND LMZ10505 R enb R ent VIN Cin1 VIN(UVLO) = 1.23V xR trkb + Rtrkt R trkt LMZ10505 SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com AdditionalFeatures ENABLE The LMZ10505 featuresan enable(EN) pinand associatedcomparatortoallowtheusertoeasilysequence the LMZ10505 from an externalvoltagerail,or to manuallyset the inputUVLO threshold.The turn-onor rising thresholdand hysteresisforthiscomparatoraretypically1.23Vand 0.15Vrespectively.The precisereferencefor theenablecomparatorallowstheusertoensurethattheLMZ10505 willbe disabledwhen thesystem demands ittobe. The EN pinshouldnotbe leftfloating.Foralways-onoperation,connectEN toVIN. ENABLE AND UVLO Usinga resistordividerfromVIN toEN as shown intheschematicdiagrambelow,theinputvoltageatwhichthe partbeginsswitchingcan be increasedabove thenormalinputUVLO levelaccordingto (19) For example,suppose thattherequiredinputUVLO levelis3.69V.Choosing R enb = 10 kΩ,thenwe calculate R ent = 20 kΩ. Alternatively,theEN pincan be drivenfromanothervoltagesourcetocatertosystem sequencingrequirements commonly foundinFPGA and othermulti-railapplications.The followingschematicshows an LMZ10505 thatis sequenced tostartbased on thevoltagelevelofa mastersystemrail(VOUT1 ). SOFT-START The LMZ10505 beginsto operatewhen both the VIN and EN, voltagesexceed the risingUVLO and enable thresholds,respectively.A controlledsoft-starteliminatesinrushcurrentsduringstartupand allowstheusermore controland flexibilitywhen sequencingtheLMZ10505 withotherpower supplies. IntheeventofeitherVIN orEN decreasingbelow thefallingUVLO orenablethresholdrespectively,thevoltage on thesoft-startpiniscollapsedby dischargingthesoft-startcapacitorby a 14 µA (typ.)currentsinktoground. SOFT-START CAPACITOR Determinethesoft-startcapacitancewiththefollowingrelationship (20)

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R trkb = R trkt VOUT1 -1.0V VIN EN GND SS R trkb R trkt VIN C in1 Master Power Supply VOUT1 VOUT2 C O1 VSS LMZ10505 VOUT LMZ10505 www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 where VFB istheinternalreferencevoltage(nominally0.8V),ISS isthesoft-startchargingcurrent(nominally2 µA) and C SS istheexternalsoft-startcapacitance. Thus,therequiredsoft-startcapacitorperunitoutputvoltagestartuptimeisgivenby C SS = 2.5nF /ms (21) Forexample,a 4 ms soft-starttimewillyielda 10 nF capacitance.The minimum soft-startcapacitanceis680 pF. TRACKING The LMZ10505 can tracktheoutputofa masterpower supplyduringsoft-startby connectinga resistordividerto theSS pin.Inthisway, theoutputvoltageslew rateoftheLMZ10505 willbe controlledby a mastersupplyfor loadsthatrequireprecisesequencing.When the trackingfunctionisused, a smallvaluesoft-startcapacitor shouldbe connectedto the SS pinto alleviateoutputvoltageovershootwhen recoveringfrom a currentlimit fault. TRACKING -EQUAL SOFT-START TIME One way touse thetrackingfeatureistodesignthetrackingresistordividerso thatthemastersupplyoutput voltage,VOUT1 ,and theLMZ10505 outputvoltage,VOUT2 ,bothrisetogetherand reachtheirtargetvaluesatthe same time.Thisistermedratiometricstartup.For thiscase,theequationgoverningthevaluesoftrackingdivider resistorsR trkband R trktisgivenby (22) The above equationincludesan offsetvoltage,of200 mV, toensurethatthefinalvalueoftheSS pinvoltage exceeds thereferencevoltageoftheLMZ10505. Thisoffsetwillcause theLMZ10505 outputvoltagetoreach regulationslightlybeforethe master supply.A valueof 33 kΩ 1% isrecommended forR trktas a compromise between highprecisionand low quiescentcurrentthroughthedividerwhileminimizingtheeffectofthe2 µA soft- startcurrentsource. For example,ifthemastersupplyvoltageVOUT1 is3.3V and theLMZ10505 outputvoltagewas 1.8V,thenthe valueofR trkbneeded togivethetwo suppliesidenticalsoft-starttimeswould be 14.3kΩ.A timingdiagramfor thisexample,theequalsoft-starttimecase,isshown below. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMZ10505

R trkb = 0.8V VOUT2 - 0.8Vx Rtrkt LMZ10505 SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com TRACKING -EQUAL SLEW RATES Alternatively,thetrackingfeaturecan be used tohave similaroutputvoltageramp rates.Thisisreferredtoas simultaneousstartup.Inthiscase,thetrackingresistorscan be determinedbased on thefollowingequation (23) and toensureproperoverdriveoftheSS pin VOUT2 < 0.8x V OUT1 (24) For theexample case ofVOUT1 = 5V and VOUT2 = 2.5V,withR trktsetto33 kΩ as before,R trkbiscalculatedfrom theabove equationtobe 15.5kΩ.A timingdiagramforthecase ofequalslewratesisshown below. PRE-BIAS STARTUP CAPABILITY At startup,theLMZ10505 isina pre-biasedstatewhen theoutputvoltageisgreaterthanzero.Thisoftenoccurs inmany multi-railapplicationssuch as when poweringan ASIC, FPGA, orDSP. The outputcan be pre-biasedin these applicationsthrough parasiticconductionpaths from one supply railto another.Even though the LMZ10505 isa synchronousconverter,itwillnot pullthe outputlow when a pre-biasconditionexists.The LMZ10505 willnotsinkcurrentduringstartupuntilthesoft-startvoltageexceedsthevoltageon theFB pin.Since the devicedoes not sinkcurrentitprotectsthe load from damage thatmight otherwiseoccur ifcurrentis conductedthroughtheparasiticpathsoftheload. CURRENT LIMIT When a currentgreaterthantheoutputcurrentlimit(IOCL )issensed,theon-timeisimmediatelyterminatedand the low sideMOSFET isactivated.The low sideMOSFET stayson forthe entirenextfourswitchingcycles. Duringtheseskippedpulses,thevoltageon thesoft-startpinisreducedby dischargingthesoft-startcapacitorby a currentsinkon thesoft-startpinofnominally14 µA. Subsequentover-currenteventswilldrainmore and more chargefromthesoft-startcapacitor,effectivelydecreasingthereferencevoltageas theoutputdroopsdue tothe pulseskipping.Reactivationofthesoft-startcircuitryensuresthatwhen theover-currentsituationisremoved,the partwillresume normaloperationsmoothly. OVER-TEMPERATURE PROTECTION When the LMZ10505 senses a junctiontemperaturegreaterthan 145°C (typ.),both switchingMOSFETs are turnedoffand thepartentersa standbystate.Upon sensinga junctiontemperaturebelow 135°C (typ.),thepart willre-initiatethesoft-startsequence and beginswitchingonce again. LMZ10505 ApplicationCircuitSchematic and BOMs Thissectionprovidesseveralapplicationsolutionswithan associatedbillof materials.The compensationfor each solutionwas optimizedtowork overthefullinputrange.Many applicationshave a fixedinputvoltagerail.It ispossibletomodifythecompensationtoobtaina fastertransientresponsefora giveninputvoltageoperating point.

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3 4, EP 6, 7 Optional +C in2 Optional VIN EN GND FB VIN VOUT SS C in1 C O1 R fbt Rcomp C comp R fbb C SS VOUT LMZ10505 3 4, EP 6, 7 LMZ10505 www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 Figure22. Table3. BillofMaterials,VIN = 3.3Vto5V,VOUT = 2.5V,IOUT (MAX) = 5A, OptimizedforElectrolyticInputand Output Capacitance Designator Description Case Size Manufacturer ManufacturerP/N Quantity U1 SIMPLE SWITCHER ® PFM-7 Texas Instruments LMZ10505TZ-ADJ 1 C in1 150 µF,6.3V,18 m Ω C2, 6.0x 3.2x 1.8mm Sanyo 6TPE150MIC2 1 C O1 330 µF,6.3V,18 m Ω D3L, 7.3x 4.3x 2.8 Sanyo 6TPE330MIL 1 mm R fbt 100 kΩ 0603 VishayDale CRCW0603100KFKEA 1 R fbb 47.5kΩ 0603 VishayDale CRCW060347K5FKEA 1 R comp 15 kΩ 0603 VishayDale CRCW060315K0FKEA 1 C comp 330 pF,±5%, C0G, 50V 0603 TDK C1608C0G1H331J 1 C SS 10 nF,±10%, X7R, 16V 0603 Murata GRM188R71C103KA01 1 Table4. BillofMaterials,VIN = 3.3V,VOUT = 0.8V,IOUT (MAX) = 5A, OptimizedforSolutionSizeand TransientResponse Designator Description Case Size Manufacturer ManufacturerP/N Quantity U1 SIMPLE SWITCHER ® PFM-7 Texas Instruments LMZ10505TZ-ADJ 1 C in1,C O1 47 µF,X5R, 6.3V 1206 TDK C3216X5R0J476M 2 R fbt 110 kΩ 0402 VishayDale CRCW0402100KFKED 1 R comp 1.0kΩ 0402 VishayDale CRCW04021K00FKED 1 C comp 27 pF,±5%, C0G, 50V 0402 Murata GRM1555C1H270JZ01 1 C SS 10 nF,±10%, X7R, 16V 0402 Murata GRM155R71C103KA01 1 Figure23. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMZ10505

3 4, EP 6, 7 LMZ10505 SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com Table5. BillofMaterials,VIN = 3.3Vto5V,VOUT = 2.5V,IOUT (MAX) = 5A, OptimizedforLow Inputand Output RippleVoltageand FastTransientResponse Designator Description Case Size Manufacturer ManufacturerP/N Quantity U1 SIMPLE SWITCHER ® PFM-7 Texas Instruments LMZ10505TZ-ADJ 1 C in1 22 µF,X5R, 10V 1210 AVX 1210ZD226MAT 2 C in2 220 µF,10V,AL-Elec E Panasonic EEE1AA221AP 1* C O1 4.7µF,X5R, 10V 0805 AVX 0805ZD475MAT 1* C O2 22 µF,X5R, 6.3V 1206 AVX 12066D226MAT 1* C O3 100 µF,X5R, 6.3V 1812 AVX 18126D107MAT 1 R fbt 75 kΩ 0402 VishayDale CRCW040275K0FKED 1 R fbb 34.8kΩ 0402 VishayDale CRCW040234K8FKED 1 R comp 1.0kΩ 0402 VishayDale CRCW04021K00FKED 1 C comp 100 pF,±5%, C0G, 50V 0402 Murata GRM1555C1H101JZ01 1 C SS 10 nF,±10%, X7R, 16V 0402 Murata GRM155R71C103KA01 1 Table6.Output VoltageSetting(Rfbt= 75 kΩ) VOUT R fbb 2.5V 34.8kΩ 1.8V 59 kΩ 1.5V 84.5kΩ 1.2V 150 kΩ 0.9V 590 kΩ Figure24.

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www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 Table7. BillofMaterials,VIN = 3.3Vto5V,VOUT = 2.5V,IOUT (MAX) = 5A Designator Description Case Size Manufacturer ManufacturerP/N Quantity U1 SIMPLE SWITCHER ® PFM-7 Texas Instruments LMZ10505TZ-ADJ 1 C in1 1 µF,X7R, 16V 0805 TDK C2012X7R1C105K 1 C in2,C O1 4.7µF,X5R, 6.3V 0805 TDK C2012X5R0J475K 2 C in3,C O2 22 µF,X5R, 16V 1210 TDK C3225X5R1C226M 2 C in4 47 µF,X5R, 6.3V 1210 TDK C3225X5R0J476M 1 C in5 220 µF,10V,AL-Elec E Panasonic EEE1AA221AP 1 C O3 100 µF,X5R, 6.3V 1812 TDK C4532X5R0J107M 1 R fbt 75 kΩ 0805 VishayDale CRCW080575K0FKEA 1 R fbb 34.8kΩ 0805 VishayDale CRCW080534K8FKEA 1 R comp 1.1kΩ 0805 VishayDale CRCW08051K10FKEA 1 C comp 180 pF,±5%, C0G, 50V 0603 TDK C1608C0G1H181J 1 R en1 100 kΩ 0805 VishayDale CRCW0805100KFKEA 1 C SS 10 nF,±5%, C0G, 50V 0805 TDK C2012C0G1H103J 1 Table8.Output VoltageSetting(Rfbt= 75 kΩ) VOUT R fbb 2.5V 34.8kΩ 1.8V 59 kΩ 1.5V 84.5kΩ 1.2V 150 kΩ 0.9V 590 kΩ Figure25. Table9. BillofMaterials,VIN = 5V,VOUT = 2.5V,IOUT (MAX) = 5A, Complies withEN55022 Class B RadiatedEmissions Designator Description Case Size Manufacturer ManufacturerP/N Quantity U1 SIMPLE SWITCHER ® PFM-7 Texas Instruments LMZ10505TZ-ADJ 1 C in1 1 µF,X7R, 16V 0805 TDK C2012X7R1C105K 1 C in2 4.7µF,X5R, 6.3V 0805 TDK C2012X5R0J475K 1 C in3 47 µF,X5R, 6.3V 1210 TDK C3225X5R0J476M 1 C O1 100 µF,X5R, 6.3V 1812 TDK C4532X5R0J107M 1 R fbt 75 kΩ 0805 VishayDale CRCW080575K0FKEA 1 R fbb 34.8kΩ 0805 VishayDale CRCW080534K8FKEA 1 R comp 1.1kΩ 0805 VishayDale CRCW08051K10FKEA 1 C comp 180 pF,±5%, C0G, 50V 0603 TDK C1608C0G1H181J 1 C SS 10 nF,±5%, C0G, 50V 0805 TDK C2012C0G1H103J 1 Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LMZ10505

SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com Table10.Output VoltageSetting(Rfbt= 75 kΩ) VOUT R fbb 3.3V 23.7kΩ 2.5V 34.8kΩ 1.8V 59 kΩ 1.5V 84.5kΩ 1.2V 150 kΩ 0.9V 590 kΩ PCB Layout Diagrams The PCB designisavailableintheLMZ10505 productfolderatwww.ti.com. Figure26. Top Copper Figure27. InternalLayer 1 (Ground)

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www.ti.com SNVS633G –JANUARY 2010–REVISED APRIL 2013 Figure28. InternalLayer 2 (Ground and SignalTraces) Figure29. Bottom Copper Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LMZ10505

SNVS633G –JANUARY 2010–REVISED APRIL 2013 www.ti.com

REVISION HISTORY

Changes from RevisionF (April2013)toRevisionG Page

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www.ti.com 16-Aug-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LMZ10505TZ-ADJ/NOPB ACTIVE TO-PMOD NDW 7 250 Green (RoHS & no Sb/Br) CU SN Level-3-245C-168 HR -40 to 85 LMZ10505 TZ-ADJ LMZ10505TZE-ADJ/NOPB ACTIVE TO-PMOD NDW 7 45 Green (RoHS & no Sb/Br) CU SN Level-3-245C-168 HR -40 to 85 LMZ10505 TZ-ADJ LMZ10505TZX-ADJ/NOPB ACTIVE TO-PMOD NDW 7 500 Green (RoHS & no Sb/Br) CU SN Level-3-245C-168 HR -40 to 85 LMZ10505 TZ-ADJ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

www.ti.com 16-Aug-2013 Addendum-Page 2 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant LMZ10505TZ-ADJ/NOPB TO- PMOD LMZ10505TZX-ADJ/NOP B TO- PMOD PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMZ10505TZ-ADJ/NOPB TO-PMOD NDW 7 250 367.0 367.0 45.0 LMZ10505TZX-ADJ/NOPB TO-PMOD NDW 7 500 367.0 367.0 45.0 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2013 Pack Materials-Page 2

www.ti.com TZA07A (Rev D) TOP SIDE OF PACKAGE BOTTOM SIDE OF PACKAGE

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