LMZ10505_1006

LMZ10505_1006 NSC | Alldatasheet

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June 10, 2010 5A SIMPLE SWITCHER® Power Module with 5.5V Maximum Input Voltage Easy to Use 7 Pin Package 30107402 TO-PMOD 7 Pin Package θJA = 20°C/W, θJC = 1.9°C/W (Note 3) RoHS Compliant Electrical Specifications ■ 25W maximum total output power ■ Up to 5A output current ■ Input voltage range 2.95V to 5.5V ■ Output voltage range 0.8V to 5V ■ ±1.63% feedback voltage accuracy over temperature ■ Efficiency up to 96% Key Features ■ Integrated shielded inductor ■ Flexible startup sequencing using external soft-start, tracking, and precision enable ■ Protection against in-rush currents and faults such as input UVLO and output short-circuit ■ -40°C to +125°C junction temperature operating range ■ Single exposed pad and standard pinout for easy mounting and manufacturing ■ Pin-to-pin compatible with LMZ10503 (3A/15W max) LMZ10504 (4A/20W max) ■ Fully enable for WEBENCH® and Power Designer

Applications

■ Point-of-load conversions from 3.3V and 5V rails ■ Space constrained applications ■ Extreme temperatures/no air flow environments ■ Noise sensitive applications (i.e. transceiver, medical) Performance Benefits ■ Operates at high ambient temperatures ■ High efficiency up to 96% reduces system heat generation ■ Low radiated emissions (EMI) complies with EN55022 class B standard (Note 4) ■ Passes 10V/m radiated immunity EMI test standard EN61000 4-3 ■ Low output voltage ripple of 10 mV allows for powering noise-sensitive transceiver and signaling ICs ■ Fast transient response for powering FPGAs and ASICs System Performance Current Derating (VOUT = 3.3V) 30107413 Efficiency (VOUT = 3.3V) 30107471 Radiated Emissions (EN 55022, Class B) 30107412 AN-2022. Note 2: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See Figure 5 and layout for information on device under test. © 2010 National Semiconductor Corporation 301074 www.national.com LMZ10505 5A SIMPLE SWITCHER® Power Module with 5.5V Maximum Input Voltage

Typical Application Circuit 30107401 Connection Diagram 30107472 Top View 7-Lead TO-PMOD

Ordering Information

Order Number Supplied As Package Type NSC Package Drawing Package Marking LMZ10505TZE-ADJ 45 Units in a Rail TO-PMOD-7 TZA07A LMZ10505TZ-ADJLMZ10505TZ-ADJ 250 Units in Tape and Reel LMZ10505TZX-ADJ 500 Units in Tape and Reel Pin Descriptions Pin Number Name Description 1 VIN Power supply input. A low ESR input capacitance should be located as close as possible to the VIN pin and exposed pad (EP). 2 EN Active high enable input for the device. 3 SS Soft-start control pin. An internal 2 µA current source charges an external capacitor connected between SS and GND pins to set the output voltage ramp rate during startup. The SS pin can also be used to configure the tracking feature. 4 GND Power ground and signal ground. Provide a direct connection to the EP. Place the bottom feedback resistor as close as possible to GND and FB pin. 5 FB Feedback pin. This is the inverting input of the error amplifier used for sensing the output voltage. Keep the copper area of this node small. www.national.com 2 LMZ10505

Pin Number Name Description 6, 7 VOUT The output terminal of the internal inductor. Connect the output filter capacitor between VOUT pin and EP. EP Exposed Pad Exposed pad is used as a thermal connection to remove heat from the device. Connect this pad to the PC board ground plane in order to reduce thermal resistance value. EP must also provide a direct electrical connection to the input and output capacitors ground terminals. Connect EP to pin 4. 3 www.national.com LMZ10505

Absolute Maximum Ratings (Note 5) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN, VOUT, EN, FB, SS to GND -0.3V to 6.0V ESD Susceptibility (Note 6) ±2 kV Power Dissipation Internally Limited Junction Temperature 150°C Storage Temperature Range -65°C to 150°C Peak Reflow Case Temperature (30 sec) 245°C Operating Ratings (Note 5) VIN to GND 2.95V to 5.5V Junction Temperature (TJ) -40°C to 125°C Electrical Characteristics Specifications with standard typeface are for TJ = 25°C only; limits in bold face type apply over the operating junction temperature range TJ of -40°C to 125°C. Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = VEN = 3.3V, unless otherwise indicated in the conditions column. Symbol Parameter Conditions Min (Note 7) Typ (Note 8) Max (Note 7) Units SYSTEM PARAMETERS V FB Total Feedback Voltage Variation Including Line and Load Regulation VIN = 2.95V to 5.5V VOUT = 2.5V IOUT = 0A to 5A 0.78 0.8 0.82 V V FB Feedback Voltage Variation VIN = 3.3V, VOUT = 2.5V IOUT = 0A 0.787 0.8 0.812 V V FB Feedback Voltage Variation VIN = 3.3V, VOUT = 2.5V IOUT = 5A 0.785 0.798 0.81 V VIN(UVLO) Input UVLO Threshold (Measured at VIN pin) Rising 2.6 2.95 V Falling 1.95 2.4 ISS Soft-Start Current Charging Current 2 µA IQ Non-Switching Input Current VFB = 1V 1.55 3 mA ISD Shut Down Quiescent Current VIN = 5.5V, VEN = 0V 267 500 µA IOCL Output Current Limit (Average Current) VOUT = 2.5V 5.1 7.3 8.7 A fFB Frequency Fold-back In current limit 250 kHz PWM SECTION fSW Switching Frequency 750 1000 1160 kHz Drange PWM Duty Cycle Range 0 100 % ENABLE CONTROL VEN-IH EN Pin Rising Threshold 1.23 1.8 V VEN-IF EN Pin Falling Threshold 0.8 1.06 V THERMAL CONTROL TSD TJ for Thermal Shutdown 145 °C TSD-HYS Hysteresis for Thermal Shutdown 10 °C THERMAL RESISTANCE θJA Junction to Ambient (Note 3) 20 °C/W θJC Junction to Case No air flow 1.9 °C/W www.national.com 4 LMZ10505

Electrical Characteristics Specifications with standard typeface are for TJ = 25°C only; limits in bold face type apply over the operating junction temperature range TJ of -40°C to 125°C. Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = VEN = 3.3V, unless otherwise indicated in the conditions column. Symbol Parameter Conditions Min (Note 7) Typ (Note 8) Max (Note 7) Units PERFORMANCE PARAMETERS ΔVOUT Output Voltage Ripple Refer to Table 3 VOUT = 2.5V Bandwidth Limit = 2 MHz 10 mVpk-pk ΔVOUT Output Voltage Ripple Refer to Table 5 Bandwidth Limit = 20 MHz 5 mVpk-pk ΔVFB / VFB Feedback Voltage Line Regulation ΔVIN = 2.95V to 5.5V IOUT = 0A 0.04 % ΔVOUT / VOUT Output Voltage Line Regulation ΔVIN = 2.95V to 5.5V IOUT = 0A, VOUT = 2.5V 0.04 % ΔVFB / VFB Feedback Voltage Load Regulation IOUT = 0A to 5A 0.25 % ΔVOUT / VOUT Output Voltage Load Regulation IOUT = 0A to 5A VOUT = 2.5V 0.25 % Efficiency η Peak Efficiency (1A) VIN = 5V VOUT = 3.3V 96.1 VOUT = 2.5V 94.8 VOUT = 1.8V 93.1 VOUT = 1.5V 92 VOUT = 1.2V 90.4 VOUT = 0.8V 86.8 η Peak Efficiency (1A) VIN = 3.3V VOUT = 2.5V 95.7 VOUT = 1.8V 94.1 VOUT = 1.5V 93.0 VOUT = 1.2V 91.6 VOUT = 0.8V 88.3 η Full Load Efficiency (5A) VIN = 5V VOUT = 3.3V 93.1 VOUT = 2.5V 91.2 VOUT = 1.8V 88.5 VOUT = 1.5V 86.7 VOUT = 1.2V 84.1 VOUT = 0.8V 78.2 η Full Load Efficiency (5A) VIN = 3.3V VOUT = 2.5V 89.8 VOUT = 1.8V 86.9 VOUT = 1.5V 85.1 VOUT = 1.2V 82.5 VOUT = 0.8V 76.2 Note 3: θ JA measured on a 2.25” x 2.25” (5.8 cm x 5.8 cm) four layer board, with one ounce copper, thirty six 10mil thermal vias, no air flow, and 1W power dissipation. Refer to PCB Layout Diagrams or Evaluation Board Application Note: AN-2022. Note 4: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See Table 9 and layout for information on device under test. Note 5: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 6: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD22-AI14S. Note 7: Min and Max limits are 100% production tested at an ambient temperature (TA) of 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 8: Typical numbers are at 25°C and represent the most likely parametric norm. 5 www.national.com LMZ10505

Typical Performance Characteristics Unless otherwise specified, the following conditions apply: VIN = VEN = 5.0V, CIN is 47 µF 10V X5R ceramic capacitor; TAMBIENT = 25°C for efficiency curves and waveforms. Load Transient Response

20 MHz Bandwidth Limited

Refer to Table 5 for BOM, includes optional components 30107462 Load Transient Response Refer to Table 5 for BOM, includes optional components 30107463 Output Voltage Ripple VIN = 3.3V, VOUT = 2.5V, IOUT = 5A, 20 mV/DIV Refer to Table 5 for BOM 30107464 Output Voltage Ripple VIN = 5.0V, VOUT = 2.5V, IOUT = 5A, 20 mV/DIV Refer to Table 5 for BOM 30107465 Efficiency VOUT = 3.3V 30107471 Efficiency VOUT = 2.5V 30107470 www.national.com 6 LMZ10505

VOUT = 1.8V 30107469 Efficiency VOUT = 1.5V 30107411 Efficiency VOUT = 1.2V 30107468 Efficiency VOUT = 0.8V 30107467 Current Derating VIN = 5V, θJA = 20°C / W 30107414 Current Derating VIN = 3.3V, θJA = 20°C / W 30107415 7 www.national.com LMZ10505

Radiated Emissions (EN 55022, Class B) VIN = 5V, VOUT = 2.5V, IOUT = 5A Evaluation Board 30107412 Startup VOUT = 2.5V, IOUT = 0A 30107456 Pre-biased Startup VOUT = 2.5V, IOUT = 0A 30107455 www.national.com 8 LMZ10505

The LMZ10505 SIMPLE SWITCHER® power module is a complete, easy-to-use DC-DC solution capable of driving up to a 5A load with exceptional power conversion efficiency, output voltage accuracy, line and load regulation. The LMZ10505 is available in an innovative package that en- hances thermal performance and allows for hand or machine soldering. The LMZ10505 can accept an input voltage rail between 2.95V and 5.5V and deliver an adjustable and highly accurate output voltage as low as 0.8V. One megahertz fixed frequen- cy PWM switching provides a predictable EMI characteristic. Two external compensation components can be adjusted to set the fastest response time, while allowing the option to use ceramic and/or electrolytic output capacitors. Externally pro- grammable soft-start capacitor facilitates controlled startup. The LMZ10505 is a reliable and robust solution with the fol- lowing features: lossless cycle-by-cycle peak current limit to protect for over current or short-circuit fault, thermal shut- down, input under-voltage lock-out, and pre-biased startup. Design Guideline And Operating

Description

LMZ10505 is fully supported by Webench® and offers the following: component selection, performance, electrical, and thermal simulations as well as the Build-It board, for a reduced design time. On the other hand, all external components can be calculated by following the design procedure below. 1. Determine the input voltage and output voltage. Also, make note of the ripple voltage and voltage transient requirements. 2. Determine the necessary input and output capacitance. 3. Calculate the feedback resistor divider. 4. Select the optimized compensation component values. 5. Estimate the power dissipation and board thermal require- ments. 6. Follow the PCB design guideline. 7. Learn about the LMZ10505 features such as enable, input UVLO, soft-start, tracking, pre-biased startup, current limit, and thermal shutdown. Design Example For this example the following application parameters exist.

• VIN = 5V
• VOUT = 2.5V
• IOUT = 5A
• ΔVOUT = 20 mVpk-pk
• ΔVo_tran = ±20 mVpk-pk Input Capacitor Selection A 22 µF or 47 µF high quality dielectric (X5R, X7R) ceramic capacitor rated at twice the maximum input voltage is typically sufficient. The input capacitor must be placed as close as possible to the VIN pin and GND exposed pad to substantially eliminate the parasitic effects of any stray inductance or re- sistance on the PC board and supply lines. Neglecting capacitor equivalent series resistance (ESR), the resultant input capacitor AC ripple voltage is a triangular waveform. The minimum input capacitance for a given peak- to-peak value (ΔVIN) of VIN is specified as follows: where the PWM duty cycle, D, is given by: If ΔVIN is 1% of VIN, this equals to 50 mV and fSW = 1 MHz 9 www.national.com LMZ10505

A second criteria before finalizing the Cin bypass capacitor is the RMS current capability. The necessary RMS current rat- ing of the input capacitor to a buck regulator can be estimated by With this high AC current present in the input capacitor, the RMS current rating becomes an important parameter. The maximum input capacitor ripple voltage and RMS current oc- cur at 50% duty cycle. Select an input capacitor rated for at least the maximum calculated ICin(RMS). Additional bulk capacitance with higher ESR may be required to damp any resonance effects of the input capacitance and parasitic inductance. Output Capacitor Selection In general, 22 µF to 100 µF high quality dielectric (X5R, X7R) ceramic capacitor rated at twice the maximum output voltage is sufficient given the optimal high frequency characteristics and low ESR of ceramic dielectrics. Although, the output ca- pacitor can also be of electrolytic chemistry for increased capacitance density. Two output capacitance equations are required to determine the minimum output capacitance. One equation determines the output capacitance (C O) based on PWM ripple voltage. The second equation determines CO based on the load tran- sient characteristics. Select the largest capacitance value of the two. The minimum capacitance, given the maximum output volt- age ripple (ΔVOUT) requirement, is determined by the follow- ing equation: Where the peak to peak inductor current ripple (ΔiL) is equal to: RESR is the total output capacitor ESR, L is the inductance value of the internal power inductor, where L = 1.5 µH, and fSW = 1 MHz. Therefore, per the design example: The minimum output capacitance requirement due to the PWM ripple voltage is: Three miliohms is a typical RESR value for ceramic capacitors. The following equation provides a good first pass capacitance requirement for a load transient: Where Istep is the peak to peak load step (10% to 90% of the maximum load for this example), VFB = 0.8V, and ΔVo_tran is the maximum output voltage deviation, which is ±20 mV. Therefore the capacitance requirement for the given design parameters is: In this particular design the output capacitance is determined by the load transient requirements. Table 1 lists some examples of commercially available ca- pacitors that can be used with the LMZ10505. www.national.com 10 LMZ10505

TABLE 1. Recommended Output Filter Capacitors racy resistors such as 0.1% are also available. erating points, each evident every other switching cycle. type III compensation at an optimal control loop performance. The typical phase margin is 45° with a bandwidth of 80 kHz. TABLE 2. LMZ10505 Compensation Component Values

greater than 125°C will have a shorten life span. top and bottom layers is required for the PCB design. mented by following a few simple design rules. FIGURE 1. High Current Loops

1. Minimize area of switched current loops.
2. Have a single point ground.

ground connection from pin 4 to EP.

1. Minimize trace length to the FB pin.

high value resistors are used to set the output voltage.

1. Make input and output bus connections as wide as

age drops and provide optimum output accuracy.

1. Provide adequate device heat-sinking.

to keep the junction temperature below 125°C.

The LMZ10505 features an enable (EN) pin and associated comparator to allow the user to easily sequence the LMZ10505 from an external voltage rail, or to manually set the input UVLO threshold. The turn-on or rising threshold and hysteresis for this comparator are typically 1.23V and 0.15V respectively. The precise reference for the enable comparator allows the user to guarantee that the LMZ10505 will be dis- abled when the system demands it to be. The EN pin should not be left floating. For always-on opera- tion, connect EN to VIN. ENABLE AND UVLO Using a resistor divider from VIN to EN as shown in the schematic diagram below, the input voltage at which the part begins switching can be increased above the normal input UVLO level according to For example, suppose that the required input UVLO level is 3.69V. Choosing Renb = 10 k Ω, then we calculate R ent = 20 kΩ. 30107444 Alternatively, the EN pin can be driven from another voltage source to cater to system sequencing requirements common- ly found in FPGA and other multi-rail applications. The fol- lowing schematic shows an LMZ10505 that is sequenced to start based on the voltage level of a master system rail (VOUT1). 30107445 SOFT-START The LMZ10505 begins to operate when both the VIN and EN, voltages exceed the rising UVLO and enable thresholds, re- spectively. A controlled soft-start eliminates inrush currents during startup and allows the user more control and flexibility when sequencing the LMZ10505 with other power supplies. In the event of either VIN or EN decreasing below the falling UVLO or enable threshold respectively, the voltage on the soft-start pin is collapsed by discharging the soft-start capac- itor by a 14 µA (typ.) current sink to ground. SOFT-START CAPACITOR Determine the soft-start capacitance with the following rela- tionship where VFB is the internal reference voltage (nominally 0.8V), ISS is the soft-start charging current (nominally 2 µA) and CSS is the external soft-start capacitance. Thus, the required soft-start capacitor per unit output voltage startup time is given by CSS = 2.5 nF / ms For example, a 4 ms soft-start time will yield a 10 nF capaci- tance. The minimum soft-start capacitance is 680 pF. TRACKING The LMZ10505 can track the output of a master power supply during soft-start by connecting a resistor divider to the SS pin. In this way, the output voltage slew rate of the LMZ10505 will be controlled by a master supply for loads that require precise sequencing. When the tracking function is used, a small value soft-start capacitor should be connected to the SS pin to al- leviate output voltage overshoot when recovering from a cur- rent limit fault. 30107457 TRACKING - EQUAL SOFT-START TIME One way to use the tracking feature is to design the tracking resistor divider so that the master supply output voltage, VOUT1, and the LMZ10505 output voltage, VOUT2, both rise to- gether and reach their target values at the same time. This is termed ratiometric startup. For this case, the equation gov- erning the values of tracking divider resistors Rtrkb and Rtrkt is given by The above equation includes an offset voltage, of 200 mV, to ensure that the final value of the SS pin voltage exceeds the reference voltage of the LMZ10505. This offset will cause the LMZ10505 output voltage to reach regulation slightly before the master supply. A value of 33 kΩ 1% is recommended for Rtrkt as a compromise between high precision and low quies- cent current through the divider while minimizing the effect of the 2 µA soft-start current source. 13 www.national.com LMZ10505

For example, if the master supply voltage V OUT1 is 3.3V and the LMZ10505 output voltage was 1.8V, then the value of Rtrkb needed to give the two supplies identical soft-start times would be 14.3 k Ω. A timing diagram for this example, the equal soft-start time case, is shown below. 30107459 TRACKING - EQUAL SLEW RATES Alternatively, the tracking feature can be used to have similar output voltage ramp rates. This is referred to as simultaneous startup. In this case, the tracking resistors can be determined based on the following equation and to ensure proper overdrive of the SS pin VOUT2 < 0.8 x V OUT1 For the example case of V OUT1 = 5V and VOUT2 = 2.5V, with Rtrkt set to 33 kΩ as before, Rtrkb is calculated from the above equation to be 15.5 kΩ. A timing diagram for the case of equal slew rates is shown below. 30107461 PRE-BIAS STARTUP CAPABILITY At startup, the LMZ10505 is in a pre-biased state when the output voltage is greater than zero. This often occurs in many multi-rail applications such as when powering an ASIC, FP- GA, or DSP. The output can be pre-biased in these applica- tions through parasitic conduction paths from one supply rail to another. Even though the LMZ10505 is a synchronous converter, it will not pull the output low when a pre-bias con- dition exists. The LMZ10505 will not sink current during start- up until the soft-start voltage exceeds the voltage on the FB pin. Since the device does not sink current it protects the load from damage that might otherwise occur if current is conduct- ed through the parasitic paths of the load. CURRENT LIMIT When a current greater than the output current limit (I OCL) is sensed, the on-time is immediately terminated and the low side MOSFET is activated. The low side MOSFET stays on for the entire next four switching cycles. During these skipped pulses, the voltage on the soft-start pin is reduced by dis- charging the soft-start capacitor by a current sink on the soft- start pin of nominally 14 µA. Subsequent over-current events will drain more and more charge from the soft-start capacitor, effectively decreasing the reference voltage as the output droops due to the pulse skipping. Reactivation of the soft-start circuitry ensures that when the over-current situation is re- moved, the part will resume normal operation smoothly. OVER-TEMPERATURE PROTECTION When the LMZ10505 senses a junction temperature greater than 145°C (typ.), both switching MOSFETs are turned off and the part enters a standby state. Upon sensing a junction temperature below 135°C (typ.), the part will re-initiate the soft-start sequence and begin switching once again. www.national.com 14 LMZ10505

for a given input voltage operating point. TABLE 3. Bill of Materials, VIN = 3.3V to 5V, VOUT = 2.5V, IOUT (MAX) = 5A, Optimized for Electrolytic Input and Output TABLE 4. Bill of Materials, VIN = 3.3V, VOUT = 0.8V, IOUT (MAX) = 5A, Optimized for Solution Size and Transient Response In the case where the output voltage is 0.8V, it is recommended to remove Rfbb and keep Rfbt, Rcomp, and Ccomp for a type III compensation.

TABLE 5. Bill of Materials, VIN = 3.3V to 5V, VOUT = 2.5V, IOUT (MAX) = 5A, Optimized for Low Input and Output Ripple Voltage

• Optional components, include for low input and output voltage ripple.

TABLE 6. Output Voltage Setting (Rfbt = 75 kΩ)

1.8 V 59 kΩ

1.2 V 150 kΩ

0.9 V 590 kΩ

TABLE 7. Bill of Materials, VIN = 3.3V to 5V, VOUT = 2.5V, IOUT (MAX) = 5A TABLE 8. Output Voltage Setting (Rfbt = 75 kΩ)

TABLE 9. Bill of Materials, VIN = 5V, VOUT = 2.5V, IOUT (MAX) = 5A, Complies with EN55022 Class B Radiated Emissions TABLE 10. Output Voltage Setting (Rfbt = 75 kΩ)

Physical Dimensions inches (millimeters) unless otherwise noted TO-PMOD-7 Pin Package 21 www.national.com LMZ10505

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