LMX2330LSLDX

LMX2332LTMX NSC | Alldatasheet

Document overview

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Technical content

Features

n Ultra low current consumption n 2.7V to 5.5V operation n Selectable synchronous or asynchronous powerdown mode: ICC = 1 µA typical at 3V n Dual modulus prescaler: LMX2330L (RF) 32/33 or 64/65 LMX2331L/32L (RF) 64/65 or 128/129 LMX2330L/31L/32L (IF) 8/9 or 16/17 n Selectable charge pump TRI-STATE® mode n Selectable charge pump current levels n Selectable Fastlock™mode n Upgrade and compatible to LMX233XA family

Applications

n Portable Wireless Communications (PCS/PCN, cordless) n Cordless and cellular telephone systems n Wireless Local Area Networks (WLANs) n Cable TV tuners (CATV) n Other wireless communication systems Functional Block Diagram 01280601 October 2001 LMX2330L/LMX2331L/LMX2332L PLLatinum Low Power Dual Frequency Synthesizer for RF Personal Communications © 2001 National Semiconductor Corporation DS012806 www.national.com

Chip Scale Package (SLB) (Top View) Thin Shrink Small Outline Package (TM) (Top View) 01280639 Order Number LMX2330LSBX, LMX2331LSLBX or LMX2332LSLBX 01280602 Order Number LMX2330LTM, LMX2331LTM or LMX2332LTM Order Number LMX2330LTMX, LMX2331LTMX, or LMX2332LTMX 20-Pin Thin Chipscale Package (SLD) (Top View) 01280640 Order Number LMX2330LSLDX, LMX2331LSLDX, or LMX2332LSLDX LMX2330L/LMX2331L/LMX2332L www.national.com

Pin No. LMX233XLSLD 20-pin Thin Pin No. LMX233XLSLB 24-pin CSP Package Pin No. LMX233XLTM 20-pin TSSOP Package Pin Name I/O

Description

Power supply voltage input for RF analog and RF digital circuits. Input may range from 2.7V to 5.5V. VCC1 must equal VCC2. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. VP1 Power Supply for RF charge pump. Must be ≥VCC. Do RF O Internal charge pump output. For connection to a loop filter for driving the input of an external VCO. GND Ground for RF digital circuitry. fIN RF I RF prescaler input. Small signal input from the VCO. fIN RF I RF prescaler complementary input. A bypass capacitor should be placed as close as possible to this pin and be connected directly to the ground plane. Capacitor is optional with some loss of sensitivity. GND Ground for RF analog circuitry. OSCin I Oscillator input. The input has a VCC/2 input threshold and can be driven from an external CMOS or TTL logic gate. GND Ground for IF digital, MICROWIRE™, FoLD, and oscillator circuits. FoLD O Multiplexed output of the RF/IF programmable or reference dividers, RF/IF lock detect signals and Fastlock mode. CMOS output (see Programmable Modes). Clock I High impedance CMOS Clock input. Data for the various counters is clocked in on the rising edge, into the 22-bit shift register. Data I Binary serial data input. Data entered MSB first. The last two bits are the control bits. High impedance CMOS input. LE I Load enable high impedance CMOS input. When LE goes HIGH, data stored in the shift registers is loaded into one of the 4 appropriate latches (control bit dependent). GND Ground for IF analog circuitry. fIN IF I IF prescaler complementary input. A bypass capacitor should be placed as close as possible to this pin and be connected directly to the ground plane. Capacitor is optional with some loss of sensitivity. fIN RF I IF prescaler input. Small signal input from the VCO. GND Ground for IF digital, MICROWIRE, FoLD, and oscillator circuits. Do IF O IF charge pump output. For connection to a loop filter for driving the input of an external VCO. VP2 Power Supply for IF charge pump. Must be ≥VCC. VCC2 Power supply voltage input for IF analog, IF digital, MICROWIRE, FoLD, and oscillator circuits. Input may range from 2.7V to 5.5V. VCC2 must equal VCC1. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. X 1, 9, 13, 21 X NC No connect. LMX2330L/LMX2331L/LMX2332L www.national.com

Note: The RF prescaler for the LMX2331L/32L is either 64/65 or 128/129, while the prescaler for the LMX2330L is 32/33 or 64/65. Note: VCC1 supplies power to the RF prescaler, N-counter, R-counter and phase detector. VCC2 supplies power to the IF prescaler, N-counter, phase detector, R-counter along with the OSCin buffer, MICROWIRE, and FoLD. VCC1 and VCC2 are clamped to each other by diodes and must be run at the same voltage level. Note: VP1 and VP2 can be run separately as long as VP ≥VCC. LMX2330L/LMX2331L/LMX2332L www.national.com

Absolute Maximum Ratings (Notes 1, If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Power Supply Voltage VCC −0.3V to +6.5V VP −0.3V to +6.5V Voltage on Any Pin with GND = 0V (VI) −0.3V to VCC+0.3V Storage Temperature Range (TS) −65˚C to +150˚C Lead Temperature (solder 4 sec.) (TL) +260˚C Recommended Operating Conditions Power Supply Voltage VCC 2.7V to 5.5V VP VCC to +5.5V Operating Temperature (TA) −40˚C to +85˚C Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate condi- tions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test condi- tions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: This device is a high performance RF integrated circuit with an ESD rating <2 keV and is ESD sensitive. Handling and assembly of this device should only be done at ESD protected work stations.

Electrical Characteristics

VCC = 3.0V, VP = 3.0V; −40˚C < TA < 85˚C, except as specified Symbol Parameter Conditions Value Units Min Typ Max ICC Power LMX2330L RF + IF VCC = 2.7V to 5.5V 5.0 6.6 Supply LMX2330L RF Only 4.0 5.2 Current LMX2331L RF + IF 4.0 5.4 LMX2331L RF Only 3.0 4.0 mA LMX2332L IF + RF 3.0 4.1 LMX2332L RF Only 2.0 2.7 LMX233xL IF Only 1.0 1.4 ICC-PWDN Powerdown Current (Note 3) µA fIN RF Operating LMX2330L 0.5 2.5 Frequency LMX2331L 0.2 2.0 GHz LMX2332L 0.1 1.2 fIN IF Operating LMX233xL 510 MHz Frequency fOSC Oscillator Frequency MHz fφ Maximum Phase Detector MHz Frequency PfIN RF RF Input Sensitivity VCC = 3.0V −15 dBm VCC = 5.0V −10 dBm PfIN IF IF Input Sensitivity VCC = 2.7V to 5.5V −10 dBm VOSC Oscillator Sensitivity OSCin 0.5 VPP VIH High-Level Input Voltage (Note 4)

0.8 VCC

V VIL Low-Level Input Voltage (Note 4)

0.2 VCC

V IIH High-Level Input Current VIH = VCC = 5.5V (Note −1.0 1.0 µA IIL Low-Level Input Current VIL = 0V, VCC = 5.5V (Note 4) −1.0 1.0 µA IIH Oscillator Input Current VIH = VCC = 5.5V 100 µA IIL Oscillator Input Current VIL = 0V, VCC = 5.5V −100 µA VOH High-Level Output Voltage (for FoLD, pin number 10) IOH = −500 µA VCC −0.4 V VOL Low-Level Output Voltage (for FoLD, pin number 10) IOL = 500 µA 0.4 V tCS Data to Clock Set Up Time See Data Input Timing ns tCH Data to Clock Hold Time See Data Input Timing ns LMX2330L/LMX2331L/LMX2332L www.national.com

(Continued) VCC = 3.0V, VP = 3.0V; −40˚C < TA < 85˚C, except as specified Symbol Parameter Conditions Value Units Min Typ Max tCWH Clock Pulse Width High See Data Input Timing ns tCWL Clock Pulse Width Low See Data Input Timing ns tES Clock to Load Enable Set Up Time See Data Input Timing ns tEW Load Enable Pulse Width See Data Input Timing ns Note 3: Clock, Data and LE = GND or Vcc. Note 4: Clock, Data and LE does not include fIN RF, fIN IF and OSCIN. Charge Pump Characteristics VCC = 3.0V, VP = 3.0V; −40˚C < TA ≤85˚C, except as specified Symbol Parameter Conditions Value Units Min Typ Max IDo-SOURCE Charge Pump Output VDo = VP/2, ICPo = HIGH (Note 5) −4.0 mA IDo-SINK Current VDo = VP/2, ICPo = HIGH (Note 5) 4.0 mA IDo-SOURCE VDo = VP/2, ICPo = LOW (Note 5) mA IDo-SINK VDo = VP/2, ICPo = LOW (Note 5) mA IDo-TRI Charge Pump 0.5V ≤VDo ≤VP −0.5V −2.5 2.5 nA TRI-STATE Current IDo-SINK vs CP Sink vs VDo = VP/2 IDo-SOURCE Source Mismatch (Note 7) TA = 25˚C IDo vs VDo CP Current vs Voltage 0.5 ≤VDo ≤VP −0.5V (Note 6) TA = 25˚C IDo vs TA CP Current vs VDo = VP/2 Temperature (Note 8) Note 5: See PROGRAMMABLE MODES for ICPo description. LMX2330L/LMX2331L/LMX2332L www.national.com

Charge Pump Current Specification Definitions 01280637 I1 = CP sink current at VDo = VP −∆V I2 = CP sink current at VDo = VP/2 I3 = CP sink current at VDo = ∆V I4 = CP source current at VDo = VP −∆V I5 = CP source current at VDo = VP/2 I6 = CP source current at VDo = ∆V Note 6: IDo vs VDo = Charge Pump Output Current magnitude variation vs Voltage = and Note 7: IDo-sink vs IDo-source = Charge Pump Output Current Sink vs Source Mismatch = Note 8: IDo vs TA = Charge Pump Output Current magnitude variation vs Temperature = and LMX2330L/LMX2331L/LMX2332L www.national.com

RF Sensitivity Test Block Diagram 01280638 Note 1: N = 10,000 R = 50 P = 64 Note 2: Sensitivity limit is reached when the error of the divided RF output, FoLD, is ≥1 Hz. Typical Performance Characteristics ICC vs VCC LMX2330L ICC vs VCC LMX2331L 01280619 01280620 ICC vs VCC LMX2332L IDo TRI-STATE vs Do Voltage 01280621 01280622 LMX2330L/LMX2331L/LMX2332L www.national.com

Typical Performance Characteristics (Continued) Charge Pump Current vs Do Voltage ICP = HIGH Charge Pump Current vs Do Voltage ICP = LOW 01280623 01280624 Charge Pump Current Variation (See (Note 6) under Charge Pump Current Specification Definitions) Sink vs Source Mismatch (See (Note 7) under Charge Pump Current Specification Definitions) 01280625 01280626 LMX2330L/LMX2331L/LMX2332L www.national.com

Typical Performance Characteristics (Continued) RF Input Impedance VCC = 2.7V to 5.5V, fIN = 50 MHz to 3 GHz IF Input Impedance VCC = 2.7V to 5.5V, fIN = 50 MHz to 1000 MHz 01280627 01280628 LMX2330L/LMX2331L/LMX2332L www.national.com

Typical Performance Characteristics (Continued) LMX233xSLD RF Input Impedance VCC = 2.7V to 5.5V, fIN = 500 MHz to 3 GHz, fINRF CAP = 100 pF LMX233xSLD IF Input Impedance VCC = 2.7V to 5.5V, fINIF = 100 MHz to 400 MHz, fINIF CAP = 100 pF 01280641 Marker 1 = 500 MHz, Real = 202.98, Imaginary = −200.09 Marker 2 = 1.8 GHz, Real = 32.36, Imaginary = −91.42 Marker 3 = 2.5GHz, Real = 25.51, Imaginary = −46.41 Marker 4 = 3.0 GHz, Real = 30.46, Imaginary = −9.50 01280642 Marker 1 = 100 MHz, Real = 374.33, Imaginary = −301.45 Marker 2 = 200 MHz, Real = 257.14, Imaginary = −245.79 Marker 3 = 300 MHz, Real = 194.08, Imagniary = −224.24 Marker 4 = 400 MHz, Real = 89.03, Imaginary = −131.21 LMX2330L RF Sensitivity vs Frequency LMX2331L RF Sensitivity vs Frequency 01280629 01280630 LMX2330L/LMX2331L/LMX2332L www.national.com

Typical Performance Characteristics (Continued) LMX2332L RF Sensitivity vs Frequency IF Input Sensitivity vs Frequency 01280631 01280632 Oscillator Input Sensitivity vs Frequency 01280633 Functional Description The simplified block diagram below shows the 22-bit data register, two 15-bit R Counters and the 15- and 18-bit N Counters (intermediate latches are not shown). The data stream is clocked (on the rising edge of Clock) into the DATA register, MSB first. The data stored in the shift register is loaded into one of 4 appropriate latches on the rising edge of LE. The last two bits are the Control Bits. The DATA is transferred into the counters as follows: Control Bits DATA Location IF R Counter RF R Counter IF N Counter RF N Counter LMX2330L/LMX2331L/LMX2332L www.national.com

(Continued) 01280606 PROGRAMMABLE REFERENCE DIVIDERS (IF AND RF R COUNTERS) If the Control Bits are 00 or 01 (00 for IF and 01 for RF) data is transferred from the 22-bit shift register into a latch which sets the 15-bit R Counter. Serial data format is shown below. 01280607 15-BIT PROGRAMMABLE REFERENCE DIVIDER RATIO (R COUNTER) Divide R R R R R R R R R R R R R R R Ratio 15 14 13 12 11 10 32767 Notes: Divide ratios less than 3 are prohibited. Divide ratio: 3 to 32767 R1 to R15: These bits select the divide ratio of the programmable reference divider. Data is shifted in MSB first. PROGRAMMABLE DIVIDER (N COUNTER) The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control Bits are 10 or 11 (10 for IF counter and 11 for RF counter) data is transferred from the 22-bit shift register into a 4-bit or 7-bit latch (which sets the Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter), MSB first. Serial data format is shown below. For the IF N counter bits 5, 6, and 7 are don’t care bits. The RF N counter does not have don’t care bits. LMX2330L/LMX2331L/LMX2332L www.national.com

(Continued) 01280608 7-BIT SWALLOW COUNTER DIVIDE RATIO (A COUNTER) RF Divide N N N N N N N Ratio A 127 Notes: Divide ratio: 0 to 127 B ≥A IF Divide N N N N N N N Ratio A X X X X X X X X X X = DON’T CARE condition 11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER) Divide N N N N N N N N N N N Ratio B 2047 Note: Divide ratio: 3 to 2047 (Divide ratios less than 3 are prohibited) B ≥A PULSE SWALLOW FUNCTION fVCO = [(P x B) + A] x fOSC/R fVCO: Output frequency of external voltage controlled oscillator (VCO) Preset divide ratio of binary 11-bit programmable counter (3 to 2047) Preset divide ratio of binary 7-bit swallow counter fOSC: Output frequency of the external reference frequency oscillator Preset divide ratio of binary 15-bit programmable reference counter (3 to 32767) Preset modulus of dual moduIus prescaler (for IF; P = 8 or 16; for RF; LMX2330L: P = 32 or 64 LMX2331L/32L: P = 64 or 128) LMX2330L/LMX2331L/LMX2332L www.national.com

TABLE 1. Programmable Modes TABLE 2. Mode Select Truth Table Note 9: Refer to POWERDOWN OPERATION in Functional Description. Note 10: The ICPo LOW current state = 1/4 x ICPo HIGH current. When VCO characteristics are negative like (2), R16 should be set LOW.

TABLE 3. The FoLD (Pin 10) Output Truth Table Note 12: When the FoLD output is disabled, it is actively pulled to a low logic state. is HIGH, with narrow pulses LOW. In the RF/IF lock detect mode a locked condition is indicated when RF and IF are both locked. occurs whenever the RF loop’s lcpo magnitude bit #17 is selected HIGH (while the #19 and #20 mode bits are set for Fastlock). occurs if the loop’s R18 bit is HI when its N20 bit becomes HI. control register remains active and capable of loading and latching data during all of the powerdown modes. latching LOW data into bit N20.

(Continued) SERIAL DATA INPUT TIMING 01280610 Note 1: Parenthesis data indicates programmable reference divider data. Data shifted into register on clock rising edge. Data is shifted in MSB first. Note 2: tcs = Data to Clock Set-Up Time tCH = Data to Clock Hold Time tCWH = Clock Pulse Width High tCWL = Clock Pulse Width Low tES = Clock to Load Enable Set-Up Time tEW = Load Enable Pulse Width Test Conditions: The Serial Data Input Timing is tested using a symmetrical waveform around VCC/2. The test waveform has an edge rate of 0.6 V/ns with PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS 01280611 Notes: Phase difference detection range: −2π to +2π The minimum width pump up and pump down current pulses occur at the Do pin when the loop is locked. R16 = HIGH LMX2330L/LMX2331L/LMX2332L www.national.com

Typical Application Example 01280612 Operational Notes: VCO is assumed AC coupled. RIN increases impedance so that VCO output power is provided to the load rather than the PLL. Typical values are 10Ωto 200Ωdepending on the VCO power level. fIN RF impedance ranges from 40Ωto 100Ω. fIN IF impedances are higher. *** Adding RC filters to the VCC lines is recommended to reduce loop-to-loop noise coupling. 01280613 Application Hints: Proper use of grounds and bypass capacitors is essential to achieve a high level of performance. Crosstalk between pins can be reduced by careful board layout. This is an electrostatic sensitive device. It should be handled only at static free work stations. LMX2330L/LMX2331L/LMX2332L www.national.com

inches (millimeters) unless otherwise noted 20-Lead (0.173" Wide) Thin Shrink Small Outline Package (TM) Order Number LMX2330LTM, LMX2331LTM or LMX2332LTM *For Tape and Reel (2500 units per reel) Order Number LMX2330LTMX, LMX2331LTMX or LMX2332LTMX LMX2330L/LMX2331L/LMX2332L www.national.com

inches (millimeters) unless otherwise noted (Continued) 24-Pin Chip Scale Package For Tape and Reel (2500 Units per Reel) Order Number LMX2330LSLBX, LMX2331LSLBX or LMX2332LSLBX LMX2330L/LMX2331L/LMX2332L www.national.com

inches (millimeters) unless otherwise noted (Continued) 20-Pin Thin Chip Scale Package (SLD) Order Number LMX2330LSLDX, LMX2331LSLDX or LMX2332LSLDX LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com LMX2330L/LMX2331L/LMX2332L PLLatinum Low Power Dual Frequency Synthesizer for RF Personal Communications National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.