LMS4684 0.5Ω Low-Voltage, Dual SPDT Analog Switch (Rev. C)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SNOSAL0,C]
- PDF pages: 18
Technical content
www.ti.com SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 LMS46840.5ΩLow-Voltage,DualSPDTAnalogSwitch Check forSamples: LMS4684 1FEATURES DESCRIPTION The LMS4684 is a low on-resistance,low voltage 2• NC Switch R ON 0.5Ω max @ 2.7V
- 5 nA (typ)Supply CurrentTA = 25°C LMS4684 featuresa 0.5Ω R ON foritsNC switchand digitallogicinputsare 1.8V logic-compatiblewitha• 12-Bump DSBGA Package 2.7V to3.3V supplyand featuresbreak-before-make
- WSON-10 Package, 3x4mm switchingaction. The LMS4684 is availablein the 12-bump DSBGAAPPLICATIONS and the 10-leadWSON miniaturepackages.These
- Power Routing PCB real estate saving packages offerextreme performance while saving money with small• Battery-OperatedEquipment footprints.• Communications Circuits
- Modems
- CellPhones Connection Diagram CenterBumps B2 and C2 areNot ElectricallyConnected Exposed pad on back ofpackage needs tobe connectedtopin6 on theboard Figure1.10-WSON Package-Top View Figure2.12-Bump DSBGA Package-Top View (Bumped Side Down) Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2004–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
10 NO2
SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 www.ti.com SCHEMATIC DIAGRAM IN NO NC
0 Off On
1 On Off
Switchesshown forLogic"0"input PIN DESCRIPTIONS Name Pin ID Description WSON DSBGA NC 5,7 D3, D1 Analogswitchnormallyclosedterminal IN 4,8 C3, C1 Digitalcontrolinput COM 3,9 B3,B1 Analogswitchcommon terminal NO 2,10 A3,A1 Analogswitchnormallyopen terminal V+ 1 A2 Positivesupplyvoltage GND 6 D2 Ground Not electricallyconnected.Can be used tohelpdissipateheatby connectingtoGNDB2,C2 pin. These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. ABSOLUTE MAXIMUM RATINGS (1)(2)(3) V+ −0.3Vto6.0V IN −0.3Vto6.0V COM, NO, NC −0.3Vto(V+ + 0.3V) ContinuousSwitchCurrent ±400 mA ESD Tolerance(4) Human Body Model 2000V Machine Model 200V StorageTemperatureRange −65°C to150°C JunctionTemperature(5) 150°C Max (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotguaranteed. (2) AllvoltagesarewithrespecttoGND, unlessotherwisespecified. (3) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications. (4) Human body model:1.5kΩ inserieswith100 pF.Machine model,0Ω inserieswith200 pF. (5) The maximum power dissipationisa functionofTJ(max),θJA and TA.
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www.ti.com SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 OPERATING RATINGS NominalSupplyVoltage 1.8Vto5.5V IN Voltage(regardlessofsupply) −0.3Vto5.5V TemperatureRange −40°C to85°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotguaranteed. (2) AllvoltagesarewithrespecttoGND, unlessotherwisespecified. PACKAGE THERMAL RESISTANCE Package θJ-A WSON-10 43°C /W DSBGA-12 57°C /W
ELECTRICAL CHARACTERISTICS
Boldfacelimitsapplyattemperatureextremes. Symbol Parameter Conditions Min Typ Max Units VNO ,VNC ,VCOM AnalogSignalRange 0 V+ V V+ = 2.7V,ICOM = 100 mA,R ON (NC) NC On-Resistance(1) 0.3 0.5 ΩVNC =0 toV+ NO On-Resistance V+ = 2.7V,ICOM = 100 mA,R ON (NO) 0.45 0.8 Ω(1) VNO =0 toV+ On-ResistanceMatch V+ = 2.7V,ICOM = 100 mA,ΔR ON 1.11 60 m ΩBetween Channels (1),(2) VNC orVNO =1.5V WSON TJ = -40°C to 0.1 0.25 V+ = 2.7V, 85°CNC-On-ResistanceR FLAT(NC) ICOM = 100 mA, ΩFlatness(3) DSBGAVNC = 0 toV+ TJ = -40°C to 0.1 0.25 85°C NO On-Resistance V+ = 2.7V,ICOM = 100 mA,R FLAT(NO) 0.18 0.35 ΩFlatness(3) VNO = 0 toV+ −1 0.014 1NO orNC OffLeakage V+ = 3.3V,VNO orVNC = 3V,INO(OFF) orINC(OFF) nACurrent 0.3V;VCOM = 0.3V,3V −10 10 V+ = 3.3V,VNO orVNC = 3V, −2 2 ICOM (ON) COM On Leakage Current 0.3V,orfloating;VCOM = 3V,or nA −20 20floating Dynamic Characteristics 38 60V+ = 2.7V,VNO orVNC = 1.5V;tON Turn-OnTime nsR L = 50Ω;C L = 35 pF; 70 22 40V+ = 2.7V,VNO orVNC = 1.5V;tOFF Turn-OffTime nsR L = 50Ω;C L = 35 pF; 50 V+ = 2.7V,VNO orVNC = 1.5V;tBBM Break-Before-MakeDelay 2 15 nsR L = 50Ω;C L = 35 pF; Q Charge Injection COM = 0;R S = 0;C L= 1 nF; 200 pC VISO Off-Isolation(4) R L = 50Ω;C L= 5 pF;f= 100 kHz -68 dB VCT Crosstalk -72 dB DigitalI/O VIH InputLogicHigh 1.4 V VIL InputLogicLow 0.5 V (1) Guaranteedby design. (2) ΔR ON isequaltothedifferencebetween NC1/NC2 R ON orNO1/NO2 R ON ata specifiedvoltage. (3) Flatnessisdefinedas thedifferencebetween themaximum and minimum valueofon-resistanceas measured overthespecifiedanalog signalranges. (4) Off-isolation= 20 log10(VCOM /VNO ),where VCOM = output,VNO = inputswitchoff. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMS4684
0.9 x VOUT 50% VIH VIL LOGIC INPUT tD GNDLOGIC INPUT NO NC IN C L INCLUDES FIXTURE AND STRAY CAPACITANCE COM VOUT R L 50: C L 100pF VIN 0.047PF 50% VIH VIL LOGIC INPUT 0.9 x VOUT SWITCH OUPUT VOUT tOFF tON 0.9 x VOUT VOUT R L 50: VIN GNDLOGIC INPUT C L 100pF NO or NC IN C L INCLUDES FIXTURE AND STRAY CAPACITANCE COM 0.047PF LMS4684 SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Boldfacelimitsapplyattemperatureextremes. Symbol Parameter Conditions Min Typ Max Units IIN IN InputLeakage Current VIN = 0 orV+ −1 1 μA Power Supply V+ Power-SupplyRange 1.8 5.5 V I+ SupplyCurrent V+ = 5.5V 5 nA PARAMETRIC MEASUREMENT INFORMATION Figure3. tON /tOFF Time Figure4. Break-BeforeMake Delay
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f = 1 MHz COM GND IN 0.047 PF NC or NO VIL or VIH VOUT IN IN OFF ON OFF OFF OFF ON Q = ( VOUT )(CL) VOUT or NO NC IN COM VOUT C L GND VIL to VIH R GEN VGEN 0.047PF LMS4684 www.ti.com SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 Figure5. Charge Injection Figure6. Channel Capacitance Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMS4684
VSUPPLY (V) 0.5 1.5 LOGIC THRESHOLD VOLTAGE (V) VIN RISING VIN FALLING -40 -15 10 35 60 85 tON , t OFF (ns) TEMPERATURE V+ = 3V C L = 100 pF R L = 50: tON (ns) tOFF (ns) 0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 R ON (:) VCOM (V) V+ = 1.8V V+ = 2.0V V+ = 2.3V V+ = 2.5V V+ = 3.0V V+ = 5.0V 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 R ON (:) VCOM (V) VS = 2.3V VS = 2.5V VS = 2.0V VS = 3.0V VS = 1.8V VS = 5.0V LMS4684 SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS NO ON Resistance NC ON Resistance vs. vs. COM Voltage COM Voltage Figure7. Figure8. Logic ThresholdVoltage Turn-on /Turn-offTimes vs. vs. Supply Voltage Temperature Figure9. Figure10.
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0.10 0.15 0.20 0.25 0.30 0.35 0.40 R ON (:) VCOM (V) V+ = 5V TA = +85ºC TA = +25ºC TA = -40ºC 0 0.5 1 1.5 2 2.5 3 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 R ON (:) VCOM (V) V+ = 3VTA = +85ºC TA = +25ºC TA = -40ºC 0 0.5 1 1.5 2 2.5 3 VCOM (V) 0.10 0.15 0.20 0.25 0.30 0.35 R ON (:) V+ = 3V TA = +85ºC TA = +25ºC TA = -40ºC 0 1 2 3 4 5 6 VCOM (V) -700 -500 -300 -100 100 300 500 Q (pC) 0 1 2 3 4 5 0.10 0.12 0.14 0.16 0.18 0.20 0.22 0.24 0.26 0.28 0.30 R ON (:) VCOM (V) V+ = 5V TA = +85ºC TA = +25ºC TA = -40ºC LMS4684 www.ti.com SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Charge Injection NC On-Resistance vs. vs. COM Voltage COM Voltage Figure11. Figure12. NC On-Resistance NO On-Resistance vs. vs. COM Voltage COM Voltage Figure13. Figure14. NO On-Resistance vs. COM Voltage Figure15. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMS4684
0.047PF Protection Diode Motor or inductive load LMS4684 SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 www.ti.com FUNCTIONAL DESCRIPTION The LMS4684 isa low voltagedual,extremelylow On-Resistanceanalogswitchthatcan operateovera supply voltagerange of 1.8V to 5.5V.The LMS4684 has been fullycharacterizedto operateinapplicationswith3V nominalsupplyvoltageand featuresverylow on resistanceand fastTurn-Offand Turn-On timeswithbreak- before-makeswitching. The switchoperatesasymmetrically;one terminalisnormallyclosed(NC) and theotherterminalnormallyopen (NO). Both NC and NO terminalsare connected to a common terminal(COM). This configurationis idealfor applicationswithasymmetricloadssuch as speakerhandsetsand internalspeakers. ApplicationsInformation ANALOG INPUT SIGNAL Analoginputsignalscan rangefromGND toV+ and arepassed throughtheswitchwithverylittlechange.Each switchisbidirectionalso any pincan be an inputoroutput. Exercisecarewhen making connectiontoan inductiveload,such as a motor.As istruewithany analogswitch used withan inductiveload,theback emf producedwhen theswitchisturnedoffcan damage theLMS4684 by electricaloverstress.For such applications,a diodeshouldbe connectedacrossthemotortopreventdamage to theswitch,as indicatedinFigure16.Be surethediodehas adequatecurrentcarryingcapabilities. Figure16. InductiveLoad Over-VoltageProtection DIGITAL CONTROL INPUTS The IN pin can be drivento 5.5V regardlessof the voltagelevelof the supplypin V+. For example,ifthe LMS4684 isoperatedwitha supplyof2V, thedigitalcontrolinputcouldstillbe drivento5V. Power consumption isincreasedwhen thecontrolpinisdrivenrail-to-rail. SUPPLY VOLTAGE Itisgood generalpracticetofirstapplythesupplyvoltagetoa CMOS devicebeforesrivingany otherpins.This isalsotruefortheLMS4684 analogswitch,whichisa CMOS device. However,ifitisnecessarytohave an analogsignalappliedbeforethesupplyvoltageisappliedand theanalog signalsourceisnot limitedto 20 mA max, a diodeconnectedbetween the supplyvoltageand the V+ pinas shown inFigure17 willprovideinputprotection.Thiswilllimitthemax analogvoltagetoa diodedropbelow V+. Thisdiode,D1, willalsoprovideprotectionagainstsome overvoltagesituations.
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0.047 PF LMS4684 www.ti.com SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 Itisalsogood practiceto provideadequate supplybypassingto allanalog circuits.We recommend a that minimum bypass capacitorvalueof0.047µF be providedfortheLMS4684. An inadequatebypass capacitorcan leadtoexcessivesupplycurrent. Figure17. InputOver VoltageProtectionCircuitry OFF-ISOLATION Analog switchesare composed ofFETs (fieldEffectTransistors).The channelresistanceislow when thepass transistorsare "on"and thatresistanceishighwhen the pass transistorsare "off".However, when the pass transistorsare "off",the source to draincapacitanceof the pass transistorswillpass some energy.This capacitanceisinverselyproportionaltotheswitch"on"resistance,so a switchwitha low"on"resistancemay not be suitableforsome highfrequencyapplications. Figure18 shows the equivalentcircuitof an analog switch.Unless the load impedance afterthe switchis relativelylow, the switchcapacitancewillcouple excessiveenergy across the "open" switchat higher frequencies,degradingoffisolationperformance.Off Isolationof the LMS4684 isspecifiedwitha 50Ω load. Higherloadimpedanceswilldegradeoffisolationperformancecompared withwhat isspecified. Figure18. EquivalentCircuitofan Analog Switch Offisolationmay be improvedby decreasingtheLMS4684 loadimpedance below50Ω.When doingthis,be sure thattheLMS4684 maximum currentratingisnotexceeded.Also,decreasingtheloadimpedance toomuch can resultinexcessivesignaldistortionbecause thechannelresistancevariationwithinputsignalvoltagewould then be a greaterpercentageoftheloadimpedance. Ifitisdesiredto extend the usablebandwidthof the LMS4684 whilemaintainingreasonableoff-isolationis throughtheuse ofthecircuitofFigure19. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMS4684
0.047 PF LMS4684 SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013 www.ti.com Figure19. Using theLMS4684 athigherfrequencies PCB LAYOUT AND THERMAL CONSIDERATIONS Both the WSON and DSBGA packages offerenhanced board realestatesavingsbecause of theirsmall footprints.These tinypackages are capableof handlinghigh continuouscurrentsbecause of the advanced package thermalhandlingcapabilities. The WSON package has theexposed dieattachpad internallyconnectedtotheinternalcircuitGND. When this pad issolderedtocopperon thePCB boardaccordingtoApplicationNote AN-1187,thefullthermalcapabilityof the WSON package can be achievedwithoutadditionalbulkyheat sinksto dissipatethe heat generated.The DSBGA package has a similarcapabilitytodissipateheatthroughBumps B2 and C2, whicharenotelectrically connected.To enhance heatdissipationoftheDSBGA package B2 and C2 couldbe connectedtotheGND pin throughcoppertraceson theboard. See ApplicationNote AN-1112 forDSBGA package considerations.
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www.ti.com SNOSAL0C –DECEMBER 2004–REVISED APRIL 2013
REVISION HISTORY
Changes from RevisionB (April2013)toRevisionC Page Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMS4684
www.ti.com 29-Aug-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LMS4684ITL/NOPB ACTIVE DSBGA YZR 12 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 F09A LMS4684ITLX/NOPB ACTIVE DSBGA YZR 12 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 F09A LMS4684LD/NOPB ACTIVE WSON NGZ 10 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 L4684 LMS4684LDX/NOPB ACTIVE WSON NGZ 10 TBD Call TI Call TI -40 to 85 L4684 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.
www.ti.com 29-Aug-2015 Addendum-Page 2 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMS4684ITL/NOPB DSBGA YZR 12 250 210.0 185.0 35.0 LMS4684ITLX/NOPB DSBGA YZR 12 3000 210.0 185.0 35.0 LMS4684LD/NOPB WSON NGZ 10 1000 213.0 191.0 55.0 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 Pack Materials-Page 2
www.ti.com LDA10B (Rev B)
www.ti.com TLA12XXX (Rev C) 0.600±0.075 D E A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. 4215049/A 12/12 NOTES: D: Max = E: Max = 2.378 mm, Min = 1.641 mm, Min = 2.317 mm 1.581 mm
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