LMR62421 TI | Alldatasheet

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www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 LMR62421SIMPLESWITCHER® 24Vout,2.1AStep-UpVoltageRegulatorinSOT-23 Check forSamples: LMR62421 1FEATURES DESCRIPTION The LMR62421 is an easy-to-use,space-efficient 2• InputVoltageRange of2.7Vto5.5V 2.1A low-sideswitchregulatoridealforBoost and• Output Voltageup to24V SEPIC DC-DC regulation.Itprovidesallthe active

  • Switch Currentup to2.1A functionstoprovidelocalDC/DC conversionwithfast- transientresponse and accurateregulationin the• 1.6MHz SwitchingFrequency smallestPCB area.Switchingfrequencyisinternally• Low Shutdown Iq,80 nA setto 1.6 MHz, allowingthe use of extremelysmall
  • Cycle-by-CycleCurrentLimiting surfacemount inductorand chip capacitorswhile providingefficienciesnear90%. Current-modecontrol• InternallyCompensated and internalcompensation provide ease-of-use,• InternalSoft-Start minimal component count, and high-performance• 5-PinSOT-23 (2.92x 2.84x 1mm) and 6-Pin regulationovera wide range ofoperatingconditions. WSON (3x 3 x 0.8mm) Packaging Externalshutdown featuresan ultra-lowstandby currentof 80 nA idealforportableapplications.Tiny• FullyEnabled forWEBENCH ® Power Designer 5-pinSOT-23 and 6-pinWSON packages provide space-savings.AdditionalfeaturesincludeinternalPERFORMANCE BENEFITS soft-start,circuitrytoreduceinrushcurrent,pulse-by-
  • ExtremelyEasy toUse pulsecurrentlimit,and thermalshutdown.
  • TinyOverallSolutionReduces System Cost

APPLICATIONS

  • Boost /SEPIC Conversions from 3.3V,5V Rails
  • Space ConstrainedApplications
  • Embedded Systems
  • LCD Displays
  • LED Applications System Performance Efficiencyvs Load Current Efficiencyvs Load Current VOUT = 20V VOUT = 12V Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2011–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com TypicalApplication Connection Diagrams Figure1.5-PinSOT-23 (Top View) Figure2.6-PinWSON (Top View) See DBV Package See NGG0006A Package

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www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 PIN DESCRIPTIONS -5-PinSOT-23 Pin Name Function 1 SW Switchnode.Connecttotheinductor,outputdiode. 2 GND Signaland power groundpin.Placethebottomresistorofthefeedbacknetworkas closeas possibletothispin. 3 FB Feedback pin.ConnectFB toexternalresistordividertosetoutputvoltage. 4 EN Shutdown controlinput.Logichighenablesoperation.Do notallowthispintofloatorbe greaterthanVIN + 0.3V. 5 VIN Supplyvoltageforpower stage,and inputsupplyvoltage. PIN DESCRIPTIONS -6-PinWSON Pin Name Function 1 PGND Power groundpin.PlacePGND and outputcapacitorGND closetogether. 2 VIN Supplyvoltageforpower stage,and inputsupplyvoltage. 3 EN Shutdown controlinput.Logichighenablesoperation.Do notallowthispintofloatorbe greaterthanVIN + 0.3V. 4 FB Feedback pin.ConnectFB toexternalresistordividertosetoutputvoltage. 5 AGND Signalgroundpin.Placethebottomresistorofthefeedbacknetworkas closeas possibletothispin& pin4. 6 SW Switchnode.Connecttotheinductor,outputdiode. DAP GND Signal& Power ground.Connecttopin1 & pin5 on toplayer.Place4-6viasfromDAP tobottomlayerGND plane. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMR62421

SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1)(2) VIN -0.5Vto7V SW Voltage -0.5Vto26.5V FB Voltage -0.5Vto3.0V EN Voltage -0.5VtoVIN + 0.3V ESD Susceptibility(3) 2kV JunctionTemperature(4) 150°C StorageTemp. Range -65°C to150°C Forsolderingspecifications:SNOA549 (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotensured.Forspecifiedspecificationsand thetest conditions,see ElectricalCharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) The human body model isa 100 pF capacitordischargedthrougha 1.5kΩ resistorintoeach pin. (4) Thermalshutdownwilloccurifthejunctiontemperatureexceedsthemaximum junctiontemperatureofthedevice. OperatingRatings(1) VIN 2.7Vto5.5V VEN (2) 0V toVIN JunctionTemperatureRange −40°C to+125°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotensured.Forspecifiedspecificationsand thetest conditions,see ElectricalCharacteristics. (2) Do notallowthispintofloatorbe greaterthanVIN +0.3V.

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www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 ElectricalCharacteristics(1)(2) LimitsinstandardtypeareforTJ = 25°C only;limitsinboldfacetypeapplyoverthejunctiontemperaturerangeof (TJ = -40°C to125°C).Minimum and Maximum limitsareensuredthroughtest,design,orstatisticalcorrelation.Typicalvalues representthemost likelyparametricnorm atTJ = 25°C, and areprovidedforreferencepurposesonly.VIN = 5V unless otherwiseindicatedundertheConditionscolumn. Symbol Parameter Conditions Min Typ Max Units −40°C ≤ toTJ ≤ +125°C (SOT-23) 1.230 1.255 1.280 0°C ≤ toTJ ≤ +125°C (SOT-23) 1.236 1.255 1.274 VFB Feedback Voltage V −40°C ≤ toTJ ≤ +125°C (WSON) 1.225 1.255 1.285 −0°C ≤ toTJ ≤ +125°C (WSON) 1.229 1.255 1.281 ΔVFB /VIN Feedback VoltageLineRegulation VIN = 2.7Vto5.5V 0.06 %/V IFB Feedback InputBiasCurrent 0.1 1 µA FSW SwitchingFrequency 1200 1600 2000 kHz D MAX Maximum DutyCycle 88 96 % D MIN Minimum DutyCycle 5 % SOT-23 170 330 R DS(ON) SwitchOn Resistance m Ω WSON 190 350 ICL SwitchCurrentLimit 2.1 3 A SS SoftStart 4 ms QuiescentCurrent(switching) 7.0 11 mA IQ QuiescentCurrent(shutdown) VEN = 0V 80 nA UndervoltageLockout VIN Rising 2.3 2.65 V UVLO VIN Falling 1.7 1.9 Shutdown ThresholdVoltage See (3) 0.4 VEN_TH V EnableThresholdVoltage See (3) 1.8 I-SW SwitchLeakage VSW = 24V 1.0 µA I-EN EnablePinCurrent Sink/Source 100 nA WSON 80JunctiontoAmbientθJA °C/W0 LFPM AirFlow(4) SOT-23 118 WSON 18 θJC JunctiontoCase °C/W SOT-23 60 TSD ThermalShutdown Temperature(5) 160 °C ThermalShutdown Hysteresis 10 (1) Min and Max limitsare100% productiontestedat25°C. Limitsovertheoperatingtemperaturerangeareensuredthroughcorrelation usingStatisticalQualityControl(SQC) methods.Limitsareused tocalculateAverageOutgoingQualityLevel(AOQL). (2) Typicalnumbers areat25°C and representthemost likelyparametricnorm. (3) Do notallowthispintofloatorbe greaterthanVIN +0.3V. (4) Appliesforpackagessoldereddirectlyontoa 3”x 3”PC boardwith2oz.copperon 4 layersinstillair. (5) Thermalshutdownwilloccurifthejunctiontemperatureexceedsthemaximum junctiontemperatureofthedevice. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMR62421

SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics CurrentLimitvs Temperature FB Pin Voltagevs Temperature Figure3. Figure4. OscillatorFrequency vs Temperature TypicalMaximum Output Currentvs VIN Figure5. Figure6. R DSON vs Temperature Efficiencyvs Load Current,Vo = 20V Figure7. Figure8.

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www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 TypicalPerformance Characteristics(continued) Efficiencyvs Load Current,Vo = 12V Output VoltageLoad Regulation Figure9. Figure10. Output VoltageLineRegulation Figure11. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMR62421

1.6 MHz

S R R Q EN VIN ThermalSHDN SW ILIMIT NMOS UVLO = 2.3V ISENSE-AMP Internal Compensation Soft-Start Corrective - Ramp Oscillator Control Logic VREF = 1.255V FB GND LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com SimplifiedInternalBlock Diagram Figure12. SimplifiedBlock Diagram

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+ - Control ( )t OV ( )t CI ( )t LI ( )t LV ( )t SWV INV LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013

APPLICATION INFORMATION

The followingoperatingdescriptionoftheLMR62421 willrefertotheSimplifiedBlockDiagram (Figure12) the simplifiedschematic(Figure13),and itsassociatedwaveforms (Figure14).The LMR62421 suppliesa regulated outputvoltageby switchingtheinternalNMOS controlswitchatconstantfrequencyand variabledutycycle.A switchingcyclebeginsatthefallingedge oftheresetpulsegeneratedby theinternaloscillator.When thispulse goes low,the outputcontrollogicturnson the internalNMOS controlswitch.Duringthison-time,the SW pin voltage(VSW ) decreasestoapproximatelyGND, and theinductorcurrent(IL) increaseswitha linearslope.IL is measured by the currentsense amplifier,which generatesan outputproportionalto the switchcurrent.The sensed signalissummed withtheregulator’s correctiveramp and compared totheerroramplifier’s output,which isproportionaltothedifferencebetween thefeedbackvoltageand VREF .When thePWM comparatoroutputgoes high,theoutputswitchturnsoffuntilthenextswitchingcyclebegins.Duringtheswitchoff-time,inductorcurrent dischargesthroughdiodeD1, which forcestheSW pintoswing totheoutputvoltageplustheforwardvoltage (VD )ofthediode.The regulatorloopadjuststhedutycycle(D)tomaintaina constantoutputvoltage. Figure13. SimplifiedSchematic Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMR62421

t t DO VV + t t t INV ( )t swV Li VIN-VOUT - DV ( )t LV ( )t LI ( )tDIODEI ( )tCapacitorI ( )t OUTV STSDT OUT- i ( )-Li OUT- i LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com Figure14. TypicalWaveforms CURRENT LIMIT The LMR62421 uses cycle-by-cyclecurrentlimitingtoprotecttheinternalNMOS switch.Itisimportanttonote thatthiscurrentlimitwillnotprotecttheoutputfrom excessivecurrentduringan outputshortcircuit.The input supplyisconnectedtotheoutputby theseriesconnectionofan inductorand a diode.Ifa shortcircuitisplaced on theoutput,excessivecurrentcan damage boththeinductorand diode. Design Guide ENABLE PIN /SHUTDOWN MODE The LMR62421 has a shutdown mode thatiscontrolledby the Enable pin(EN).When a logiclow voltageis appliedtoEN, thepartisinshutdown mode and itsquiescentcurrentdropstotypically80 nA. Switchleakage adds up toanother1 µA fromtheinputsupply.The voltageatthispinshouldneverexceed VIN + 0.3V. THERMAL SHUTDOWN Thermalshutdown limitstotalpower dissipationby turningofftheoutputswitchwhen theIC junctiontemperature exceeds 160°C. Afterthermalshutdown occurs,theoutputswitchdoesn’tturnon untilthejunctiontemperature dropstoapproximately150°C.

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L t Li Li' STSDT ( )t LI L VIN VV OUTIN - K= cD VOUT VIN D = VOUT - INV OUTV -D 1 1 1= cD=VOUT VIN LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 SOFT-START ThisfunctionforcesVOUT toincreaseata controlledrateduringstartup.Duringsoft-start,theerroramplifier’s referencevoltageramps toitsnominalvalueof1.255V inapproximately4.0ms.Thisforcestheregulatoroutput toramp up ina more linearand controlledfashion,whichhelpsreduceinrushcurrent. INDUCTOR SELECTION The DutyCycle(D)can be approximatedquicklyusingtheratioofoutputvoltage(VO )toinputvoltage(VIN): (1) Therefore: (2) Power lossesdue tothediode(D1)forwardvoltagedrop,thevoltagedropacrosstheinternalNMOS switch,the voltagedrop acrosstheinductorresistance(RDCR ) and switchinglossesmust be includedtocalculatea more accuratedutycycle(See CalculatingEfficiencyand JunctionTemperaturefora detailedexplanation).A more accurateformulaforcalculatingtheconversionratiois: where

  • η equalstheefficiencyoftheLMR62421 application. (3) The inductorvaluedeterminestheinputripplecurrent.Lower inductorvaluesdecreasethesizeoftheinductor, butincreasetheinputripplecurrent.An increaseintheinductorvaluewilldecreasetheinputripplecurrent. Figure15. InductorCurrent Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMR62421

L = VIN 2 x 'iL x DTS¨ § ¸ INV LÂi x SDT §= L VIN 'i 2L DTS LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com (4) A good designpracticeisto designthe inductorto produce 10% to 30% rippleof maximum load.From the previousequations,theinductorvalueisthenobtained. where

  • 1/TS = FSW = switchingfrequency (5) One must alsoensurethattheminimum currentlimit(2.1A)isnotexceeded,so thepeak currentintheinductor must be calculated.The peak current(ILPK )intheinductoriscalculatedby: ILpk = IIN + ΔIL (6) or ILpk = IOUT /D'+ ΔIL (7) When selectingan inductor,make surethatitiscapableofsupportingthepeak inputcurrentwithoutsaturating. Inductorsaturationwillresultin a sudden reductionin inductanceand preventthe regulatorfrom operating correctly.Because of the speed of the internalcurrentlimit,the peak currentof the inductorneed onlybe specifiedfortherequiredmaximum inputcurrent.For example,ifthedesignedmaximum inputcurrentis1.5A and the peak currentis1.75A,then the inductorshouldbe specifiedwitha saturationcurrentlimitof>1.75A. Thereisno need tospecifythesaturationorpeak currentoftheinductoratthe3A typicalswitchcurrentlimit. Because of the operatingfrequencyof the LMR62421, ferritebased inductorsare preferredto minimizecore losses.Thispresentslittlerestrictionsincethe varietyof ferrite-basedinductorsishuge. Lastly,inductorswith lowerseriesresistance(DCR) willprovidebetteroperatingefficiency.For recommended inductorssee Example Circuits. INPUT CAPACITOR An inputcapacitorisnecessaryto ensure thatVIN does not drop excessivelyduringswitchingtransients.The primaryspecificationsoftheinputcapacitorare capacitance,voltage,RMS currentrating,and ESL (Equivalent SeriesInductance).The recommended inputcapacitanceis10 µF to44 µF dependingon theapplication.The capacitormanufacturerspecificallystatesthe inputvoltagerating.Make sure to check any recommended deratingsand alsoverifyifthereisany significantchange incapacitanceattheoperatinginputvoltageand the operatingtemperature.The ESL ofan inputcapacitorisusuallydeterminedby theeffectivecrosssectionalarea ofthecurrentpath.At theoperatingfrequenciesoftheLMR62421, certaincapacitorsmay have an ESL so large thatthe resultingimpedance (2πfL)willbe higherthan thatrequiredto providestableoperation.As a result, surfacemount capacitorsarestronglyrecommended. Multilayerceramiccapacitors(MLCC) aregood choicesfor both inputand outputcapacitorsand have verylow ESL. For MLCCs itisrecommended to use X7R or X5R dielectrics.Consultcapacitormanufacturerdatasheetto see how ratedcapacitancevariesover operating conditions.

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REFV¨¨ § OUTV=2R 1¸¸

  • - x 1R LOADR OV 3C2R FBV +x= ESRLOUT RÂIÂV xxx OUTLoadSW CRF 2 xOUT DV ¹¸¸· LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 OUTPUT CAPACITOR The LMR62421 operatesat frequenciesallowingthe use of ceramicoutputcapacitorswithoutcompromising transientresponse.Ceramic capacitorsallowhigherinductorripplewithoutsignificantlyincreasingoutputripple. The outputcapacitorisselectedbased upon thedesiredoutputrippleand transientresponse.The initialcurrent ofa loadtransientisprovidedmainlyby theoutputcapacitor.The outputimpedance willthereforedeterminethe maximum voltageperturbation.The outputrippleoftheconverterisa functionofthecapacitor’s reactanceand itsequivalentseriesresistance(ESR): (8) When usingMLCCs, theESR istypicallyso low thatthecapacitiveripplemay dominate.When thisoccurs,the outputripplewillbe approximatelysinusoidaland 90° phase shiftedfromtheswitchingaction. Given theavailabilityand qualityofMLCCs and theexpectedoutputvoltageofdesignsusingtheLMR62421, thereisreallyno need toreviewany othercapacitortechnologies.Anotherbenefitofceramiccapacitorsistheir abilityto bypass highfrequencynoise.A certainamount of switchingedge noisewillcouplethroughparasitic capacitancesintheinductortotheoutput.A ceramiccapacitorwillbypass thisnoisewhilea tantalumwillnot. Sincetheoutputcapacitorisone ofthetwo externalcomponents thatcontrolthestabilityoftheregulatorcontrol loop,most applicationswillrequirea minimum at 4.7 µF of outputcapacitance.Like the inputcapacitor, recommended multilayerceramiccapacitorsare X7R or X5R. Again,verifyactualcapacitanceat the desired operatingvoltageand temperature. SETTING THE OUTPUT VOLTAGE The outputvoltageissetusingthefollowingequationwhere R1 isconnectedbetween theFB pinand GND, and R2 isconnectedbetween VOUT and theFB pin. Figure16. SettingVout A good valueforR1 is10kΩ. (9) Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMR62421

-80 -60 -40 -20 dB -180 -90 180 RHP-Zero Ext (Cf) gm-Pole RC-Pole Vi = 5V Vo = 12V Io = 500 mA Co = 10 mF Lo = 5 mH Ext (Cf)-Pole gm-zero -Zero D = 0.625 Cf = 220 pF Fz-cf = 8 kHz RHP-Zero = 107 kHz Fp-rc = 660 Hz Fp-cf = 77 kHz 10 100 1k 10k 100k 1M FREQUENCY -80 -60 -40 -20 dB -180 -90 180 RHP-Zero gm-Zero gm-Pole RC-Pole Vi = 5V Vo = 12V Io = 500 mA Co = 10 PF Lo = 5 PH LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com COMPENSATION The LMR62421 uses constantfrequencypeak currentmode control.Thismode of controlallowsfora simple externalcompensationscheme thatcan be optimizedforeach application.A complicatedmathematicalanalysis can be completed to fullyexplainthe LMR62421 ’s internal& externalcompensation,but forsimplicity,a graphicalapproach withsimpleequationswillbe used. Below isa Gain & Phase plotof a LMR62421 that produces a 12V outputfrom a 5V inputvoltage.The Bode plotshows the totalloop Gain & Phase without externalcompensation. Figure17. LMR62421 WithoutExternalCompensation One can see thattheCrossoverfrequencyisfine,butthephase marginat0dB isverylow (22°).A zerocan be placedjustabove thecrossoverfrequencyso thatthephase marginwillbe bumped up toa minimum of45°. Below isthesame applicationwitha zeroadded at8 kHz. Figure18. LMR62421 With ExternalCompensation

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= 1 (RLoadC OUT )2S F RC P- 10 kHz5 kHzo== 1 ( )R 2 xC f2S F CFZERO- REFV¨¨ § OUTV=2R 1¸¸

  • - x 1R LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 The simplestmethod todeterminethecompensationcomponent valueisas follows. Settheoutputvoltagewiththefollowingequation. where
  • R1 isthebottomresistor and
  • R2 istheresistortiedtotheoutputvoltage. (10) The nextstepistocalculatethevalueofC3. The internalcompensationhas been designedso thatwhen a zero isadded between 5 kHz & 10 kHz theconverterwillhave good transientresponsewithplentyofphase margin forallinput& outputvoltagecombinations. (11) Lower outputvoltageswillhave thezerosetcloserto10 kHz, and higheroutputvoltageswillusuallyhave the zerosetcloserto5 kHz.Itisalwaysrecommended toobtaina Gain/Phaseplotforyouractualapplication.One couldreferto the TypicalAppplicationsectionto obtainexamples of workingapplicationsand the associated component values. Pole@ origindue tointernalgm amplifier: FP-ORIGIN (12) Poledue tooutputloadand capacitor: (13) Thisequationonlydeterminesthe frequencyof the poleforperfectcurrentmode control(CMC). Therefore,it doesn’t takeintoaccountthe additionalinternalartificialramp thatisadded to the currentsignalforstability reasons.By addingartificialramp, you beginto move away from CMC to voltagemode control(VMC). The artifactisthatthepoledue totheoutputloadand outputcapacitorwillactuallybe slightlyhigherinfrequency thancalculated.Inthisexample itiscalculatedat650 Hz,butinrealityitisaround1 kHz. The zerocreatedwithcapacitorC3 & resistorR2: Figure19. SettingExternalPole-Zero Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMR62421

D = OV OV + INV Vo VIN = D' D ( )R Load L x 2SRHP ZERO 1=F CFPOLE - 2S((R1 R 2) x C3) = 1 ( )R 2 xC 32S F CFZERO- LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com (14) Thereisan associatedpolewiththezerothatwas createdintheabove equation. (15) Itisalwayshigherinfrequencythanthezero. A right-halfplanezero(RHPZ) isinherenttoallboostconverters.One must remember thatthegainassociated witha right-halfplanezeroincreasesat20dB perdecade,butthephase decreasesby 45° perdecade.For most applicationsthereislittleconcernwiththeRHPZ due tothefactthatthefrequencyatwhichitshows up iswell beyond crossover,and has littletono effecton loopstability.One must be concernedwiththisconditionforlarge inductorvaluesand highoutputcurrents. (16) There are miscellaneouspoles and zeros associatedwith parasiticsinternalto the LMR62421, external components, and the PCB. They are locatedwellover the crossoverfrequency,and forsimplicityare not discussed. PCB Layout Considerations When planninglayoutthereare a few thingstoconsiderwhen tryingtoachievea clean,regulatedoutput.The most importantconsiderationwhen completinga Boost Converterlayoutis the closecouplingof the GND connectionsoftheC OUT capacitorand theLMR62421 PGND pin.The GND ends shouldbe closetoone another and be connectedtotheGND planewithatleasttwo through-holes.There shouldbe a continuousgroundplane on the bottom layerof a two-layerboard.The FB pinisa highimpedance node and care shouldbe takento make the FB traceshortto avoidnoisepickupand inaccurateregulation.The feedbackresistorsshouldbe placedas closeas possibletotheIC,withtheAGND ofR1 placedas closeas possibletotheGND (pin5 forthe WSON) oftheIC.The VOUT tracetoR2 shouldbe routedaway fromtheinductorand any othertracesthatare switching.High AC currentsflowthroughtheVIN,SW and VOUT traces,so theyshouldbe as shortand wide as possible.However, making thetraceswide increasesradiatednoise,so thedesignermust make thistrade-off. Radiatednoisecan be decreasedby choosinga shieldedinductor.The remainingcomponents shouldalsobe placedas closeas possibletotheIC.Pleasesee ApplicationNote AN-1229 SNVA054 forfurtherconsiderations and theLMR62421 demo boardas an example ofa good layout. SEPIC Converter The LMR62421 can easilybe convertedintoa SEPIC converter.A SEPIC converterhas theabilitytoregulatean outputvoltagethatiseitherlargeror smallerinmagnitudethan the inputvoltage.Other convertershave this abilityas well(CUK and Buck-Boost),butusuallycreatean outputvoltagethatisoppositeinpolaritytotheinput voltage.Thistopologyisa perfectfitforLithiumIonbatteryapplicationswhere theinputvoltagefora singlecell Li-Ionbatterywillvarybetween 3V & 4.5V and theoutputvoltageissomewhere inbetween.Most oftheanalysis oftheLMR62421 BoostConverterisapplicabletotheLMR62421 SEPIC Converter. SEPIC Design Guide: SEPIC Conversionratiowithoutlosselements: (17) Therefore: (18)

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D ( )VoVIN D DV C1 = ( )Vo 2AREA 1AREA STSDT ( )t LV (s)t I R VO L2 = x= R ¸

  • VO D D '¸
  • IL1 and L2I x L1I D LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 Small rippleapproximation: Ina well-designedSEPIC converter,theoutputvoltage,and inputvoltageripple,theinductorrippleand issmall in comparisonto the DC magnitude.Thereforeitisa safe approximationto assume a DC valueforthese components.The main objectiveoftheSteadyStateAnalysisistodeterminethesteadystateduty-cycle,voltage and currentstresseson allcomponents,and propervaluesforallcomponents. In a steady-stateconverter,the net volt-secondsacrossan inductorafterone cyclewillequalzero.Also,the chargeintoa capacitorwillequalthechargeoutofa capacitorinone cycle. Therefore: (19) SubstitutingIL1 intoIL2 (20) The averageinductorcurrentofL2 istheaverageoutputload. Figure20. InductorVolt-SecBalance Waveform ApplyingCharge balanceon C1: (21) Sincethereareno DC voltagesacrosseitherinductor,and capacitorC6 isconnectedtoVinthroughL1 atone end,ortogroundthroughL2 on theotherend,we can say that VC1 = VIN (22) Therefore: (23) Thisverifiestheoriginalconversionratioequation. Itisimportanttoremember thattheinternalswitchcurrentisequaltoIL1 and IL2.DuringtheD interval.Design theconverterso thattheminimum ensuredpeak switchcurrentlimit(2.1A)isnotexceeded. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMR62421

+ - swi i ) t (1 L 1 LR vL1( )t INV 2 LR i ) t (2 L i ) t (1 D+ - vC1( )t vD1( )t vL2( )t onR i ) t (2 C vC2 ( )t vO ( )t i ) t (1 C VO VIN L1 D 1 C 1 C 2 R 2 R 1 C 3 R 3 C 5 C 4 C 6 LMR62421 LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com Figure21. SEPIC CONVERTER Schematic Steady StateAnalysiswithLoss Elements

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VO=D ¸ (VIN x K)+VO VO VIN = 1 - D D x K¸ + + ¸ R R L1 D 2 D R R ON ¸ D D 1+ + ¸¸ R R L2VD VO¨¨ + + ¸ R R L1 D 2 D R R ON ¸ D D 1+ + ¸¸ R R L2VD VO¨¨ § D= Vo VIN D' x=IL1 and D R ¸

  • VO =L2I R ¸
  • VO LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 Usinginductorvolt-secondbalance& capacitorchargebalance,thefollowingequationsarederived: (24) (25) Therefore: (26) One can see thatallvariablesareknown exceptforthedutycycle(D).A quadraticequationisneeded tosolve forD. A lessaccuratemethod ofdeterminingthedutycycleistoassume efficiency,and calculatethedutycycle. (27) (28) Table1.EfficienciesforTypicalSEPIC Application Vin 2.7V Vin 3.3V Vin 5V5V Vo 3.1V Vo 3.1V Vo 3.1V lin 770 mA lin 600mA lin 375 mA lo 500 mA lo 500mA lo 500 mA η 75% η 80% η 83% Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LMR62421

SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com SEPIC ConverterPCB Layout The layoutguidelinesdescribedforthe LMR62421 Boost-Converterare applicableto the SEPIC Converter. Below isa properPCB layoutfora SEPIC Converter. Figure22. SEPIC PCB Layout The LMR62421 packaged inthe6–pinWSON: Figure23. InternalWSON Connection

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1 M: 10 PF 10V 6.8 PH 2.9A 2A 20V 86.6k 220 pF 25V 10.2k 10 PF 25V FB SW Vin EN AGND PGND COPPER COPPER LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 For certainhighpower applications,the PCB landmay be modifiedto a "dog bone" shape (see Figure24). Increasingthesizeofgroundplane,and addingthermalviascan reducetheR θJA fortheapplication. Figure24. PCB Dog Bone Layout LMR62421 Design Example 1 Figure25. Vin = 3V -5V,Vout = 12V @ 500 mA Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LMR62421

1 M: 22 PF 6.3V 10 PH 1.2A 500 mA 30V 470 pF 50V 10k 4.7 PF 50V 150k GND FB Vin SW LOADR VIN SHDN 1 M: 10 PF 6.3V 10 PH 1.2A 1A 20V 1 nF30.1k 10 PF 10V 10k LMR62421 SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com LMR62421 Design Example 2 Figure26. Vin = 3V,Vout = 5V @ 500 mA LMR62421 Design Example 3 Figure27. Vin = 3.3V,Vout = 20V @ 100 mA

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6.8 PH 1.2A 1A 20V 2.2 nF16.5k 2.2 PF 16V 10.2k 6.8 PH 1.2A 100k22 PF 10V (opt) (opt) LMR62421 www.ti.com SNVS734B –OCTOBER 2011–REVISED APRIL 2013 LMR62421 SEPIC Design Example 4 Figure28. Vin = 2.7V-5V,Vout = 3.3V@ 500mA Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LMR62421

SNVS734B –OCTOBER 2011–REVISED APRIL 2013 www.ti.com

REVISION HISTORY

Changes from RevisionA (April2013)toRevisionB Page

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www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LMR62421XMF/NOPB Active Production SOT-23 (DBV) | 5 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH8B LMR62421XMF/NOPB.A Active Production SOT-23 (DBV) | 5 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH8B LMR62421XMFE/NOPB Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH8B LMR62421XMFE/NOPB.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH8B LMR62421XMFX/NOPB Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH8B LMR62421XMFX/NOPB.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH8B LMR62421XSD/NOPB Active Production WSON (NGG) | 6 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 L270B LMR62421XSD/NOPB.A Active Production WSON (NGG) | 6 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 L270B LMR62421XSDE/NOPB Active Production WSON (NGG) | 6 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 L270B LMR62421XSDE/NOPB.A Active Production WSON (NGG) | 6 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 L270B LMR62421XSDX/NOPB Active Production WSON (NGG) | 6 4500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 L270B LMR62421XSDX/NOPB.A Active Production WSON (NGG) | 6 4500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 L270B (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Addendum-Page 1

www.ti.com 23-May-2025 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 8-Jun-2023 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 8-Jun-2023 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR62421XMF/NOPB SOT-23 DBV 5 1000 208.0 191.0 35.0 LMR62421XMFE/NOPB SOT-23 DBV 5 250 208.0 191.0 35.0 LMR62421XMFX/NOPB SOT-23 DBV 5 3000 208.0 191.0 35.0 LMR62421XSD/NOPB WSON NGG 6 1000 208.0 191.0 35.0 LMR62421XSDE/NOPB WSON NGG 6 250 208.0 191.0 35.0 LMR62421XSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0 Pack Materials-Page 2

www.ti.com SDE06A (Rev A)

www.ti.com PACKAGE OUTLINE C 0.22

0.08 TYP

0.25 3.0 2.6 2X 0.95 1.9 1.45 0.90 0.15

0.00 TYP

5X 0.5 0.3 0.6

0.3 TYP

0 TYP

1.9 (0.1) (0.15) 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (1.1) SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR 4214839/K 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.25 mm per side. 5. Support pin may differ or may not be present.

0.2 C A B

0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

5X (1.1) 5X (0.6) (2.6) (1.9) 2X (0.95) (R0.05) TYP 4214839/K 08/2024 SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.6) (1.9) 2X(0.95) 5X (1.1) 5X (0.6) (R0.05) TYP SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR 4214839/K 08/2024 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X SYMM PKG 3 4

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