LMR10515YMF/NOPB.A

LMR10515 TI | Alldatasheet

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Technical content

Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMR10515 SNVS728D –OCTOBER 2011–REVISED JUNE 2019 LMR105155.5-VIN,1.5-AStep-DownVoltageRegulatorinSOT-23andWSONPackages

1 Features

1• Input Voltage Range of 3 V to 5.5 V

Output Voltage Range of 0.6 V to 4.5 V
Output Current up to 1.5 A
1.6-MHz (LMR10515X) and 3-MHz (LMR10515Y) Switching Frequencies
Low Shutdown IQ, 30 nA Typical
Internal Soft-Start
Internally Compensated
Current-Mode PWM Operation
Thermal Shutdown
Tiny Overall Solution Reduces System Cost
SOT-23 (2.92 × 2.84 × 1 mm) and WSON (3 × 3 × 0.8 mm) Packaging
Create a custom design using the LMR10515 with the WEBENCH® Power Designer

2 Applications

Point-of-Load Conversions from 3.3-V and 5-V Rails
Space Constrained Applications
Battery Powered Equipment
Industrial Distributed Power Applications
Power Meters
Portable Hand-Held Instruments

3 Description

The LMR10515 regulator is a monolithic, high frequency, PWM step-down DC/DC converter in a 5- pin SOT-23 and a 6-pin WSON package. It provides all the active functions to provide local DC/DC conversion with fast transient response and accurate regulation in the smallest possible PCB area. With a minimum of external components, the LMR10515 is easy to use. The ability to drive 1.5-A loads with an internal 130-mΩ PMOS switch results in the best power density available. The world-class control circuitry allows on-times as low as 30ns, thus supporting exceptionally high frequency conversion over the entire 3-V to 5.5-V input operating range down to the minimum output voltage of 0.6 V. The LMR10515 is internally compensated, so it is simple to use and requires few external components. Switching frequency is internally set to 1.6 MHz, or 3 MHz, allowing the use of extremely small surface mount inductors and chip capacitors. Even though the operating frequency is high, efficiencies up to 93% are easy to achieve. External shutdown is included, featuring an ultra-low stand-by current of 30 nA. The LMR10515 utilizes current-mode control and internal compensation to provide high-performance regulation over a wide range of operating conditions. Additional features include internal soft-start circuitry to reduce inrush current, pulse-by-pulse current limit, thermal shutdown, and output over-voltage protection. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LMR10515 SOT-23 (5) 2.90 mm × 1.60 mm WSON (6) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. space space Simplified Application

11.2 Receiving Notification of Documentation Updates 24

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (April 2013) to Revision D Page Changes from Revision B (April 2013) to Revision C Page

5 Description, continued

The LMR10515 is internally compensated, so it is simple to use and requires few external components. Switching frequency is internally set to 1.6 MHz, or 3 MHz, allowing the use of extremely small surface mount inductors and chip capacitors. Even though the operating frequency is high, efficiencies up to 93% are easy to achieve. External shutdown is included, featuring an ultra-low stand-by current of 30 nA. The LMR10515 utilizes current-mode control and internal compensation to provide high-performance regulation over a wide range of operating conditions. Additional features include internal soft-start circuitry to reduce inrush current, pulse-by- pulse current limit, thermal shutdown, and output overvoltage protection.

6 Pin Configuration and Functions

Pin Description: 5-Pin SOT-23 PIN

DESCRIPTION

NO. NAME 1 SW Switch node. Connect to the inductor and catch diode. 2 GND Signal and power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin. 3 FB Feedback pin. Connect to external resistor divider to set output voltage. 4 EN Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3 V. 5 VIN Input supply voltage. Pin Descriptions 6-Pin WSON PIN NO. NAME 1 FB Feedback pin. Connect to external resistor divider to set output voltage. 2 GND Signal and power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin. 3 SW Switch node. Connect to the inductor and catch diode. 4 VIND Power Input supply. 5 VINA Control circuitry supply voltage. Connect VINA to VIND on PC board. 6 EN Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VINA + 0.3 V. DAP Die Attach Pad Connect to system ground for low thermal impedance, but it cannot be used as a primary GND connection.

www.ti.com SNVS728D –OCTOBER 2011–REVISED JUNE 2019 Product Folder Links: LMR10515 Submit Documentation FeedbackCopyright © 2011–2019, Texas Instruments Incorporated (1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Range indicates conditions for which the device is intended to be functional, but does not ensure specfic performance limits. For ensured specifications and test conditions, see Electrical Characteristics. (2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications (3) Thermal shutdown occurs if the junction temperature exceeds the maximum junction temperature of the device.

7 Specifications

7.1 Absolute Maximum Ratings(1)(2)

VIN -0.5V to 7V FB Voltage -0.5V to 3V EN Voltage -0.5V to 7V SW Voltage -0.5V to 7V ESD Susceptibility 2kV Junction Temperature(3) 150°C Storage Temperature −65°C to +150°C Soldering Information For soldering specifications: http://www.ti.com/lit/SNOA549C

7.2 Recommended Operating Ratings

VIN 3V to 5.5V Junction Temperature −40°C to +125°C

SNVS728D –OCTOBER 2011–REVISED JUNE 2019 www.ti.com Product Folder Links: LMR10515 Submit Documentation Feedback Copyright © 2011–2019, Texas Instruments Incorporated (1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate TI's Average Outgoing Quality Level (AOQL). (2) Typical numbers are at 25°C and represent the most likely parametric norm. (3) Applies for packages soldered directly onto a 3-inch x 3-inch PC board with 2 oz. copper on 4 layers in still air.

7.3 Electrical Characteristics

VIN = 5V unless otherwise indicated under the conditions column. Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.(1)(2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VFB Feedback Voltage 0.588 0.600 0.612 V ΔVFB/VIN Feedback Voltage Line Regulation VIN = 3V to 5V 0.02 %/V IB Feedback Input Bias Current 0.1 100 nA UVLO Undervoltage Lockout VIN Rising 2.73 2.90 V VIN Falling 1.85 2.3 UVLO Hysteresis 0.43 V FSW Switching Frequency LMR10515-X 1.2 1.6 1.95 MHz LMR10515-Y 2.25 3.0 3.75 DMAX Maximum Duty Cycle LMR10515-X 86 94 LMR10515-Y 82 90 DMIN Minimum Duty Cycle LMR10515-X 5 LMR10515-Y 7 RDS(ON) Switch On Resistance mΩ ICL Switch Current Limit VIN = 3.3V 1.8 2.5 A VEN_TH Shutdown Threshold Voltage 0.4 V Enable Threshold Voltage 1.8 ISW Switch Leakage 100 nA IEN Enable Pin Current Sink/Source 100 nA IQ Quiescent Current (switching) LMR10515X VFB = 0.55 3.3 5 mA LMR10515Y VFB = 0.55 4.3 6.5 Quiescent Current (shutdown) All Options VEN = 0V 30 nA θJA Junction to Ambient

0 LFPM Air Flow(3)

°C/W θJC Junction to Case °C/W TSD Thermal Shutdown Temperature 165 °C

7.4 Typical Characteristics

25°C, unless otherwise specified. Figure 1. Efficiency vs Load Figure 2. Efficiency vs Load "Y" Figure 3. Efficiency vs Load "X and Y" Figure 4. Oscillator Frequency vs Temperature - "X" Figure 5. Oscillator Frequency vs Temperature - "Y" Figure 6. Current Limit vs Temperature Vin = 3.3v

25°C, unless otherwise specified. Figure 13. Phase Plot vs Frequency

8 Detailed Description

8.1 Overview

Figure 14. The LMR10515 supplies a regulated output voltage by switching the internal PMOS control switch at adjusts the duty cycle (D) to maintain a constant output voltage. Figure 14. Typical Waveforms

S R R Q GND FB SW VINEN DRIVER ArtificialRamp SHDNThermal SHDNOVP

1.6 MHz

15 . 1 xREFV Control Logic VREF = 0.6V LMR10515 www.ti.com SNVS728D –OCTOBER 2011–REVISED JUNE 2019 Product Folder Links: LMR10515 Submit Documentation FeedbackCopyright © 2011–2019, Texas Instruments Incorporated

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Soft-Start

This function forces VOUT to increase at a controlled rate during start up. During soft-start, the error amplifier’s reference voltage ramps from 0 V to its nominal value of 0.6 V in approximately 600 µs. This forces the regulator output to ramp up in a controlled fashion, which helps reduce inrush current.

8.3.2 Output Overvoltage Protection

The over-voltage comparator compares the FB pin voltage to a voltage that is 15% higher than the internal reference VREF. Once the FB pin voltage goes 15% above the internal reference, the internal PMOS control switch is turned off, which allows the output voltage to decrease toward regulation.

8.3.3 Undervoltage Lockout

Under-voltage lockout (UVLO) prevents the LMR10515 from operating until the input voltage exceeds 2.73 V (typical). The UVLO threshold has approximately 430 mV of hysteresis, so the part will operate until VIN drops below 2.3 V (typical). Hysteresis prevents the part from turning off during power up if VIN is non-monotonic.

8.3.4 Current Limit

The LMR10515 uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle, a current limit comparator detects if the output switch current exceeds 2.5A (typical), and turns off the switch until the next switching cycle begins.

8.3.5 Thermal Shutdown

Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature exceeds 165°C. After thermal shutdown occurs, the output switch doesn’t turn on until the junction temperature drops to approximately 150°C.

2.2 PF 22 PF 22 nF

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.2 Typical Application

Figure 15. Typical Application Schematic

9.2.1 Detailed Design Procedure

9.2.1.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LMR10515 device with the WEBENCH® Power Designer.

Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
Compare the generated design with other possible solutions from Texas Instruments.

pricing and component availability.

Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.

9.2.1.2 Inductor Selection

VD, the higher the operating efficiency of the converter. The inductor value determines the output ripple current. inductor value will decrease the output ripple current. Figure 16. Inductor Current be safe enough. The typical current limit is 2.5 A. transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple. When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating. and the peak current is 1.25 A, then the inductor should be specified with a saturation current limit of > 1.25 A. There is no need to specify the saturation or peak current of the inductor at the 2.5-A typical switch current limit. efficiency. For recommended inductors see Example Circuits.

'VOUT = 'IL R ESR +8 x FSW x COUT IRMS_IN = IOUT x D(1 - D) IRMS_IN D IOUT 2 (1-D) +'i2 LMR10515 www.ti.com SNVS728D –OCTOBER 2011–REVISED JUNE 2019 Product Folder Links: LMR10515 Submit Documentation FeedbackCopyright © 2011–2019, Texas Instruments Incorporated Typical Application (continued)

9.2.1.3 Input Capacitor

An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and equivalent series inductance (ESL). The recommended input capacitance is 22 µF.The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any recommended deratings and also verify if there is any significant change in capacitance at the operating input voltage and the operating temperature. The input capacitor maximum RMS input current rating (IRMS-IN) must be greater than: Neglecting inductor ripple simplifies t to: It can be shown from the above equation that maximum RMS capacitor current occurs when D = 0.5. Always calculate the RMS at the point where the duty cycle D is closest to 0.5. The ESL of an input capacitor is usually determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the LMR10515, leaded capacitors may have an ESL so large that the resulting impedance (2πfL) will be higher than that required to provide stable operation. As a result, surface mount capacitors are strongly recommended. Sanyo POSCAP, Tantalum or Niobium, Panasonic SP, and multilayer ceramic capacitors (MLCC) are all good choices for both input and output capacitors and have very low ESL. For MLCCs it is recommended to use X7R or X5R type capacitors due to their tolerance and temperature characteristics. Consult capacitor manufacturer datasheets to see how rated capacitance varies over operating conditions.

9.2.1.4 Output Capacitor

The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load transient is provided mainly by the output capacitor. The output ripple of the converter is: When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the availability and quality of MLCCs and the expected output voltage of designs using the LMR10515, there is really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass high frequency noise. A certain amount of switching edge noise will couple through parasitic capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not. Since the output capacitor is one of the two external components that control the stability of the regulator control loop, most applications will require a minimum of 22 µF of output capacitance. Capacitance often, but not always, can be increased significantly with little detriment to the regulator stability. Like the input capacitor, recommended multilayer ceramic capacitors are X7R or X5R types.

9.2.1.5 Catch Diode

The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than: ID1 = IOUT × (1-D) The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin. To improve efficiency, choose a Schottky diode with a low forward voltage drop.

PCOND = (IOUT 2 x D) 1 31 + x 'iL IOUT R DSON D = VOUT + VD + VDCR VIN + VD + VDCR - VSW D = VOUT + VD VIN + VD - VSW K = POUT POUT + PLOSS K = POUT PIN x R2R1 = VREF VOUT - 1 LMR10515 SNVS728D –OCTOBER 2011–REVISED JUNE 2019 www.ti.com Product Folder Links: LMR10515 Submit Documentation Feedback Copyright © 2011–2019, Texas Instruments Incorporated Typical Application (continued)

9.2.1.6 Output Voltage

The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and R1 is connected between VO and the FB pin. A good value for R2 is 10 k. When designing a unity gain converter (VOUT = 0.6 V), R1 should be between 0 Ω and 100 Ω, and R2 must be equal or greater than 1 0kΩ. VREF = 0.60V

9.2.1.7 Calculating Efficiency, And Junction Temperature

The complete LMR10515 DC/DC converter efficiency can be calculated in the following manner. Or Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are not discussed. Power loss (PLOSS) is the sum of two basic types of losses in the converter: switching and conduction. Conduction losses usually dominate at higher output loads, whereas switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D): VSW is the voltage drop across the internal PFET when it is on, and is equal to: VSW = IOUT x RDSON VD is the forward voltage drop across the Schottky catch diode. It can be obtained from the diode manufactures Electrical Characteristics section. If the voltage drop across the inductor (VDCR) is accounted for, the equation becomes: The conduction losses in the free-wheeling Schottky diode are calculated as follows: PDIODE = VD × IOUT x (1-D) Often this is the single most significant power loss in the circuit. Care should be taken to choose a Schottky diode that has a low forward voltage drop. Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to: PIND = IOUT 2 x RDCR The LMR10515 conduction loss is mainly associated with the internal PFET: If the inductor ripple current is fairly small, the conduction losses can be simplified to: PCOND = IOUT 2 x RDSON x D

is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node. IQ is the quiescent operating current, and is typically around 3.3 mA for the 1.6 MHz frequency option. Table 1. Power Loss Tabulation

9.2.2 Application Curves

Figure 17. Line Regulation Figure 18. Load Regulation Figure 19. Load Regulation Figure 20. Load Regulation

9.2.3 Other System Examples

9.2.3.1 LMR10510x Design Example 1

Figure 21. Lmr10515x (1.6mhz): Vin = 5v, Vo = 1.2v @ 1.5a Figure 22. LMR10510X (1.6 MHz): VIN = 5 V, VOUT = 1.2 V at 1 A

9.2.3.2 Lmr10510X Design Example 2

Figure 23. LMR10510X (1.6 MHz): VIN = 5 V, VOUT = 3.3 V at 1 A

9.2.3.3 LMR10510Y Design Example 3

Figure 24. LMR10510Y (3 MHz): VIN = 5 V, VOUT = 3.3 V at 1 A

9.2.3.4 LMR10510Y Design Example 4

Figure 25. LMR10510Y (3 MHz): VIN = 5 V, VOUT = 1.2 V at 1 A

10 Layout

10.1 Layout Guidelines

10.2 Layout Example

Figure 26. 6-Lead WSON PCB Dog Bone Layout

10.3 Thermal Definitions

Heat in the LMR10515 due to internal power dissipation is removed through conduction and/or convection. transfer of heat can be considered to have poor to good thermal conductivity properties (insulator vs. conductor). convection occurs when air currents rise from the hot device to cooler air.

R TJA= 165° - Ta PINTERNAL R TJC= TJ - TC Power R TJA= TJ - TA Power LMR10515 SNVS728D –OCTOBER 2011–REVISED JUNE 2019 www.ti.com Product Folder Links: LMR10515 Submit Documentation Feedback Copyright © 2011–2019, Texas Instruments Incorporated Thermal Definitions (continued) The PCB size, weight of copper used to route traces and ground plane, and number of layers within the PCB can greatly effect RθJA. The type and number of thermal vias can also make a large difference in the thermal impedance. Thermal vias are necessary in most applications. They conduct heat from the surface of the PCB to the ground plane. Four to six thermal vias should be placed under the exposed pad to the ground plane if the WSON package is used. Thermal impedance also depends on the thermal properties of the application operating conditions (Vin, Vo, Io etc), and the surrounding circuitry. Silicon Junction Temperature Determination Method 1: To accurately measure the silicon temperature for a given application, two methods can be used. The first method requires the user to know the thermal impedance of the silicon junction to case temperature. RθJC is approximately 18°C/Watt for the 6-pin WSON package with the exposed pad. Knowing the internal dissipation from the efficiency calculation given previously, and the case temperature, which can be empirically measured on the bench we have: where TC is the temperature of the exposed pad and can be measured on the bottom side of the PCB. Therefore: Tj = (RθJC × PLOSS) + TC From the previous example: Tj = (RθJC × PINTERNAL) + TC Tj = 18°C/W × 0.213W + TC The second method can give a very accurate silicon junction temperature. The first step is to determine RθJA of the application. The LMR10515 has over-temperature protection circuitry. When the silicon temperature reaches 165°C, the device stops switching. The protection circuitry has a hysteresis of about 15°C. Once the silicon temperature has decreased to approximately 150°C, the device will start to switch again. Knowing this, the RθJA for any application can be characterized during the early stages of the design one may calculate the RθJA by placing the PCB circuit into a thermal chamber. Raise the ambient temperature in the given working application until the circuit enters thermal shutdown. If the SW-pin is monitored, it will be obvious when the internal PFET stops switching, indicating a junction temperature of 165°C. Knowing the internal power dissipation from the above methods, the junction temperature, and the ambient temperature RθJA can be determined. Once this is determined, the maximum ambient temperature allowed for a desired junction temperature can be found. An example of calculating RθJA for an application using the LMR10515 is shown below. A sample PCB is placed in an oven with no forced airflow. The ambient temperature was raised to 140°C, and at that temperature, the device went into thermal shutdown. From the previous example: PINTERNAL = 213 mW

10.4 WSON Package

Figure 27. Internal WSON Connection the size of ground plane, and adding thermal vias, the RθJA for the application can be reduced.

11 Device and Documentation Support

11.1 Device Support

11.1.1 Development Support

11.1.1.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LMR10515 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available:

Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LMR10515XMF/NOPB Active Production SOT-23 (DBV) | 5 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMF/NOPB.A Active Production SOT-23 (DBV) | 5 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMFE/NOPB Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMFE/NOPB.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMFX/NOPB Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMFX/NOPB.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XSD/NOPB Active Production WSON (NGG) | 6 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L265B LMR10515XSD/NOPB.A Active Production WSON (NGG) | 6 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L265B LMR10515XSDE/NOPB Active Production WSON (NGG) | 6 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L265B LMR10515XSDE/NOPB.A Active Production WSON (NGG) | 6 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L265B LMR10515YMF/NOPB Active Production SOT-23 (DBV) | 5 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMF/NOPB.A Active Production SOT-23 (DBV) | 5 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMFE/NOPB Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMFE/NOPB.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMFX/NOPB Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMFX/NOPB.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YSD/NOPB Active Production WSON (NGG) | 6 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSD/NOPB.A Active Production WSON (NGG) | 6 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSDE/NOPB Active Production WSON (NGG) | 6 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSDE/NOPB.A Active Production WSON (NGG) | 6 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSDX/NOPB Active Production WSON (NGG) | 6 4500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSDX/NOPB.A Active Production WSON (NGG) | 6 4500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 125 L269B (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. Addendum-Page 1

www.ti.com 23-May-2025 (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR10515XMF/NOPB SOT-23 DBV 5 1000 208.0 191.0 35.0 LMR10515XMFE/NOPB SOT-23 DBV 5 250 208.0 191.0 35.0 LMR10515XMFX/NOPB SOT-23 DBV 5 3000 208.0 191.0 35.0 LMR10515XSD/NOPB WSON NGG 6 1000 208.0 191.0 35.0 LMR10515XSDE/NOPB WSON NGG 6 250 208.0 191.0 35.0 LMR10515YMF/NOPB SOT-23 DBV 5 1000 208.0 191.0 35.0 LMR10515YMFE/NOPB SOT-23 DBV 5 250 208.0 191.0 35.0 LMR10515YMFX/NOPB SOT-23 DBV 5 3000 208.0 191.0 35.0 LMR10515YSD/NOPB WSON NGG 6 1000 208.0 191.0 35.0 LMR10515YSDE/NOPB WSON NGG 6 250 208.0 191.0 35.0 LMR10515YSDX/NOPB WSON NGG 6 4500 356.0 356.0 36.0 Pack Materials-Page 2

www.ti.com SDE06A (Rev A)

www.ti.com PACKAGE OUTLINE C 0.22

0.08 TYP

0.25 3.0 2.6 2X 0.95 1.9 1.45 0.90 0.15

0.00 TYP

5X 0.5 0.3 0.6

0.3 TYP

0 TYP

1.9 (0.1) (0.15) 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (1.1) SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR 4214839/K 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.25 mm per side. 5. Support pin may differ or may not be present.

0.2 C A B

0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

5X (1.1) 5X (0.6) (2.6) (1.9) 2X (0.95) (R0.05) TYP 4214839/K 08/2024 SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.6) (1.9) 2X(0.95) 5X (1.1) 5X (0.6) (R0.05) TYP SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR 4214839/K 08/2024 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X SYMM PKG 3 4

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Summary

LMR10515 5.5-VIN, 1.5-A Step-Down Voltage Regulator in SOT-23 and WSON Packages REVISED JUNE 2019

Description