LMR10515XMFX/NOPB

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www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 LMR10515SIMPLESWITCHER® 5.5Vin,1.5AStep-DownVoltageRegulator inSOT-23andWSON Check forSamples: LMR10515 1FEATURES PERFORMANCE BENEFITS 23• InputVoltageRange of3V to5.5V • Extremelyeasy touse

• Output VoltageRange of0.6Vto4.5V • Tinyoverallsolutionreduces system cost
• Output Currentup to1.5A DESCRIPTION• 1.6MHz (LMR10515X) and 3 MHz (LMR10515Y) The LMR10515 regulatoris a monolithic,highSwitchingFrequencies frequency,PWM step-downDC/DC converterina 5• Low Shutdown Iq,30 nA Typical pinSOT-23 and a 6 Pin WSON package.Itprovides
• InternalSoft-Start allthe activefunctionsto provide localDC/DC conversionwithfasttransientresponseand accurate• InternallyCompensated regulationinthesmallestpossiblePCB area.With a• Current-Mode PWM Operation minimum of externalcomponents,the LMR10515 is
• Thermal Shutdown easy to use.The abilityto drive1.5A loadswithan internal130 m Ω PMOS switchresultsin the best• SOT-23 (2.92x 2.84x 1 mm) and WSON power densityavailable.The world-classcontrol(3x 3 x 0.8mm) Packaging circuitryallows on-times as low as 30ns, thus• FullyEnabled forWEBENCH ® Power Designer supportingexceptionallyhigh frequencyconversion overtheentire3V to5.5Vinputoperatingrangedown APPLICATIONS to the minimum output voltage of 0.6V. The LMR10515 isinternallycompensated,so itissimple• Point-of-LoadConversions from 3.3V,and 5V to use and requiresfew externalcomponents.Rails Switchingfrequencyisinternallysetto 1.6 MHz, or• Space ConstrainedApplications 3.0MHz, allowingtheuse ofextremelysmallsurface
• BatteryPowered Equipment mount inductorsand chipcapacitors.Even thoughthe operatingfrequencyishigh,efficienciesup to 93%• IndustrialDistributedPower Applications are easy to achieve.Externalshutdown isincluded,• Power Meters featuringan ultra-lowstand-bycurrentof30 nA. The
• PortableHand-Held Instruments LMR10515 utilizescurrent-modecontroland internal compensationtoprovidehigh-performanceregulation overa wide range ofoperatingconditions.Additional featuresincludeinternalsoft-startcircuitryto reduce inrushcurrent,pulse-by-pulsecurrentlimit,thermal shutdown,and outputover-voltageprotection. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2WEBENCH isa registeredtrademarkofTexas Instruments. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2011–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

EFFICIENCY (%) LOAD CURRENT (A) 1.8Vout 3.3Vout 100 EFFICIENCY (%) LOAD CURRENT (A) 1.8Vout 3.3Vout LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com System Performance Efficiencyvs Load Current-"X" VIN = 5V Efficiencyvs Load Current-"Y" VIN = 5V TypicalApplication Connection Diagram Figure1.6-PinWSON Figure2.5-PinSOT-23 See Package Number NGG0006A See Package Number DBV (R-PDSO-G5)

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www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 PIN DESCRIPTIONS 5-PinSOT-23 Pin Name Function 1 SW Switchnode.Connecttotheinductorand catchdiode. 2 GND Signaland power groundpin.Placethebottomresistorofthefeedbacknetworkas closeas possible tothispin. 3 FB Feedback pin.Connecttoexternalresistordividertosetoutputvoltage. 4 EN Enablecontrolinput.Logichighenablesoperation.Do notallowthispintofloatorbe greaterthanVIN + 0.3V. 5 VIN Inputsupplyvoltage. PIN DESCRIPTIONS 6-PinWSON Pin Name Function 1 FB Feedback pin.Connecttoexternalresistordividertosetoutputvoltage. 2 GND Signaland power groundpin.Placethebottomresistorofthefeedbacknetworkas closeas possibletothispin. 3 SW Switchnode.Connecttotheinductorand catchdiode. 4 VIND Power Inputsupply. 5 VINA Controlcircuitrysupplyvoltage.ConnectVINA toVIND on PC board. 6 EN Enablecontrolinput.Logichighenablesoperation.Do notallowthispintofloatorbe greaterthan VINA + 0.3V. DAP DieAttachPad Connecttosystemgroundforlowthermalimpedance,butitcannotbe used as a primaryGND connection. These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1)(2) VIN -0.5Vto7V FB Voltage -0.5Vto3V EN Voltage -0.5Vto7V SW Voltage -0.5Vto7V ESD Susceptibility 2kV JunctionTemperature(3) 150°C StorageTemperature −65°C to+150°C SolderingInformation Forsolderingspecifications:http://www.ti.com/lit/SNOA549C (1) Absolutemaximum ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRange indicatesconditionsfor whichthedeviceisintendedtobe functional,butdoes notensurespecficperformancelimits.Forensuredspecificationsand test conditions,see theElectricalCharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications (3) Thermalshutdownwilloccurifthejunctiontemperatureexceedsthemaximum junctiontemperatureofthedevice. OperatingRatings VIN 3V to5.5V JunctionTemperature −40°C to+125°C Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMR10515

SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com ElectricalCharacteristics(1)(2) VIN = 5V unlessotherwiseindicatedundertheConditionscolumn.LimitsinstandardtypeareforTJ = 25°C only;limitsin boldfacetypeapplyoverthejunctiontemperature(TJ)rangeof-40°C to+125°C. Minimum and Maximum limitsareensured throughtest,design,orstatisticalcorrelation.Typicalvaluesrepresentthemost likelyparametricnorm atTJ = 25°C, and are providedforreferencepurposesonly. Symbol Parameter Conditions Min Typ Max Units VFB Feedback Voltage 0.588 0.600 0.612 V ΔVFB /VIN Feedback VoltageLineRegulation VIN = 3V to5V 0.02 %/V IB Feedback InputBiasCurrent 0.1 100 nA VIN Rising 2.73 2.90 V UndervoltageLockout UVLO VIN Falling 1.85 2.3 UVLO Hysteresis 0.43 V LMR10515-X 1.2 1.6 1.95 FSW SwitchingFrequency MHz LMR10515-Y 2.25 3.0 3.75 LMR10515-X 86 94 D MAX Maximum DutyCycle % LMR10515-Y 82 90 LMR10515-X 5 D MIN Minimum DutyCycle % LMR10515-Y 7 R DS(ON) SwitchOn Resistance m Ω ICL SwitchCurrentLimit VIN = 3.3V 1.8 2.5 A Shutdown ThresholdVoltage 0.4 VEN_TH V EnableThresholdVoltage 1.8 ISW SwitchLeakage 100 nA IEN EnablePinCurrent Sink/Source 100 nA LMR10515X VFB = 0.55 3.3 5 mA QuiescentCurrent(switching) IQ LMR10515Y VFB = 0.55 4.3 6.5 QuiescentCurrent(shutdown) AllOptionsVEN = 0V 30 nA θJC JunctiontoCase °C/W TSD ThermalShutdown Temperature 165 °C (1) Min and Max limitsare100% productiontestedat25°C. Limitsovertheoperatingtemperaturerangeareensuredthroughcorrelation usingStatisticalQualityControl(SQC) methods.Limitsareused tocalculateTI's AverageOutgoingQualityLevel(AOQL). (2) Typicalnumbers areat25°C and representthemost likelyparametricnorm. (3) Appliesforpackagessoldereddirectlyontoa 3”x 3”PC boardwith2oz.copperon 4 layersinstillair.

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1.794 1.796 1.798 1.800 1.802 1.804 1.806 LOAD (A) OUTPUT (V) 3.297 3.298 3.299 3.300 3.301 3.302 LOAD (A) OUTPUT (V) 100 EFFICIENCY (%) LOAD CURRENT (A) LMR10515X LMR10515Y 1.796 1.797 1.798 1.799 1.800 1.801 1.802 1.803 1.804 LOAD (A) OUTPUT (V) 100 EFFICIENCY (%) LOAD CURRENT (A) 1.8Vout 3.3Vout 100 EFFICIENCY (%) LOAD CURRENT (A) 1.8Vout 3.3Vout LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 TypicalPerformance Characteristics Unlessstatedotherwise,allcurvestakenatVIN = 5.0Vwithconfigurationintypicalapplicationcircuitshown inFigure22.TJ = 25°C, unlessotherwisespecified. η vs Load "X" Vin = 5V,Vo = 1.8V& 3.3V η vs Load "Y" Vin = 5V,Vo = 3.3V& 1.8V Figure3. Figure4. Load Regulation η vs Load "X,and Y" Vin = 3.3V,Vo = 1.8V Vin = 3.3V,Vo = 1.8V(AllOptions) Figure5. Figure6. Load Regulation Load Regulation Vin = 5V,Vo = 1.8V(AllOptions) Vin = 5V,Vo = 3.3V(AllOptions) Figure7. Figure8. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMR10515

-45 -40 -10 20 50 80 110 125 130 TEMPERATURE (ºC) 3.0 3.1 3.2 3.3 3.4 3.5 3.6 IQ (mA) -45 -40 -10 20 50 80 110 125 130 TEMPERATURE (° C) 210 2200 2300 2400 250 2600 2700 2800 2900 CURRENT LIMIT (mA) -45 -40 -10 20 50 80 110 125 130 TEMPERATURE (ºC) OSCILLATOR FREQUENCY (MHz) 2.55 2.65 2.75 2.85 2.95 3.05 3.15 3.25 3.35 3.45 -45 -40 -10 20 50 80 110 125 130 TEMPERATURE (ºC) OSCILLATOR FREQUENCY (MHz) 1.36 1.41 1.46 1.51 1.56 1.61 1.66 1.71 1.76 1.81 LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics(continued) Unlessstatedotherwise,allcurvestakenatVIN = 5.0Vwithconfigurationintypicalapplicationcircuitshown inFigure22.TJ = 25°C, unlessotherwisespecified. OscillatorFrequency vs Temperature -"X" OscillatorFrequency vs Temperature -"Y" Figure9. Figure10. CurrentLimitvs Temperature Vin = 3.3V RDSON vs Temperature (WSON Package) Figure11. Figure12. RDSON vs Temperature (SOT-23 Package) LMR10515X IQ (QuiescentCurrent) Figure13. Figure14.

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-45 -40 -10 20 50 80 110 125 130 TEMPERATURE (ºC) FEEBACK VOLTAGE (V) 0.590 0.595 0.600 0.605 0.610 -45 -40 -10 20 50 80 110 125 130 TEMPERATURE (ºC) 4.0 4.1 4.2 4.3 4.4 4.5 4.6 IQ (mA) LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 TypicalPerformance Characteristics(continued) Unlessstatedotherwise,allcurvestakenatVIN = 5.0Vwithconfigurationintypicalapplicationcircuitshown inFigure22.TJ = 25°C, unlessotherwisespecified. LineRegulation LMR10515Y IQ (QuiescentCurrent) Vo = 1.8V,Io= 500mA Figure15. Figure16. Gain vs Frequency VFB vs Temperature (Vin= 5V,Vo = 1.2V@ 1A) Figure17. Figure18. Phase Plotvs Frequency (Vin= 5V,Vo = 1.2V@ 1A) Figure19. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMR10515

S R R Q GND FB SW VINEN DRIVER ArtificialRamp SHDNThermal SHDNOVP

1.6 MHz

15 . 1 xREFV Control Logic VREF = 0.6V LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com SimplifiedBlock Diagram Figure20.

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t t Inductor Current D = TON /TSW VSW TOFF TSW IL IPK SW Voltage LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 APPLICATIONS INFORMATION THEORY OF OPERATION The followingoperatingdescriptionoftheLMR10515 willrefertotheSimplifiedBlockDiagram Figure20 and to thewaveforms inFigure21.The LMR10515 suppliesa regulatedoutputvoltageby switchingtheinternalPMOS controlswitchatconstantfrequencyand variabledutycycle.A switchingcyclebeginsatthefallingedge ofthe resetpulsegeneratedby theinternaloscillator.When thispulsegoes low,theoutputcontrollogicturnson the internalPMOS controlswitch.Duringthison-time,theSW pinvoltage(VSW )swingsup toapproximatelyVIN,and the inductorcurrent(IL) increaseswitha linearslope.IL ismeasured by the currentsense amplifier,which generatesan outputproportionalto the switchcurrent.The sense signalis summed with the regulator’s correctiveramp and compared totheerroramplifier’s output,whichisproportionaltothedifferencebetween the feedbackvoltageand VREF .When thePWM comparatoroutputgoes high,theoutputswitchturnsoffuntilthe nextswitchingcyclebegins.Duringtheswitchoff-time,inductorcurrentdischargesthroughtheSchottkycatch diode,whichforcestheSW pintoswingbelow groundby theforwardvoltage(VD )oftheSchottkycatchdiode. The regulatorloopadjuststhedutycycle(D)tomaintaina constantoutputvoltage. Figure21. TypicalWaveforms SOFT-START ThisfunctionforcesVOUT toincreaseata controlledrateduringstartup.Duringsoft-start,theerroramplifier’s referencevoltageramps from0V toitsnominalvalueof0.6V inapproximately600 µs.Thisforcestheregulator outputtoramp up ina controlledfashion,whichhelpsreduceinrushcurrent. OUTPUT OVERVOLTAGE PROTECTION The over-voltagecomparatorcompares the FB pinvoltageto a voltagethatis15% higherthan the internal referenceVREF . Once the FB pinvoltagegoes 15% above the internalreference,the internalPMOS control switchisturnedoff,whichallowstheoutputvoltagetodecreasetowardregulation. UNDERVOLTAGE LOCKOUT Under-voltagelockout(UVLO) preventsthe LMR10515 from operatinguntilthe inputvoltageexceeds 2.73V (typ).The UVLO thresholdhas approximately430 mV ofhysteresis,so thepartwilloperateuntilVIN dropsbelow 2.3V(typ).Hysteresispreventsthepartfromturningoffduringpower up ifVIN isnon-monotonic. CURRENT LIMIT The LMR10515 uses cycle-by-cyclecurrentlimitingtoprotecttheoutputswitch.Duringeach switchingcycle,a currentlimitcomparatordetectsiftheoutputswitchcurrentexceeds 2.5A (typ),and turnsofftheswitchuntilthe nextswitchingcyclebegins. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMR10515

L = 2'iL DT S t Li' OUTI STSDT L VOUT L - VOUTVIN D = VOUT + VD VIN + VD - VSW D = VOUT VIN FBGND SWEN VOUTL1 VINA/VIND C1 C4 GND EN 4, 5 Chf 2.2 PF VIN GND 22 PF 20k 10k

2.2 PF 22 PF 22 nF

(opt.) 1.0 PH 3.3 PH (³;´YHUVLRQ) 1.8V LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com THERMAL SHUTDOWN Thermalshutdown limitstotalpower dissipationby turningofftheoutputswitchwhen theIC junctiontemperature exceeds 165°C. Afterthermalshutdown occurs,theoutputswitchdoesn’tturnon untilthejunctiontemperature dropstoapproximately150°C. Figure22. TypicalApplicationSchematic Design Guide INDUCTOR SELECTION The DutyCycle(D)can be approximatedquicklyusingtheratioofoutputvoltage(VO )toinputvoltage(VIN): The catchdiode(D1)forwardvoltagedropand thevoltagedrop acrosstheinternalPMOS must be includedto calculatea more accuratedutycycle.CalculateD by usingthefollowingformula: VSW can be approximatedby: VSW = IOUT x R DSON The diodeforwarddrop (VD ) can range from 0.3V to0.7V dependingon thequalityofthediode.The lowerthe VD ,thehighertheoperatingefficiencyoftheconverter.The inductorvaluedeterminestheoutputripplecurrent. Lower inductorvaluesdecreasethesizeoftheinductor,butincreasetheoutputripplecurrent.An increaseinthe inductorvaluewilldecreasetheoutputripplecurrent. One must ensurethattheminimum currentlimit(1.8A)isnotexceeded,so thepeak currentintheinductormust be calculated.The peak current(ILPK )intheinductoriscalculatedby: ILPK = IOUT + ΔiL Figure23. InductorCurrent Ingeneral,

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'VOUT = 'IL R ESR +8 x FSW x COUT IRMS_IN = IOUT x D(1 - D) IRMS_IN D IOUT 2 (1-D) +'i2 TS = fS x (VIN - VOUT )L = 2'iL DT S LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 ΔiL = 0.1x (IOUT )→ 0.2x (IOUT ) IfΔiL = 20% of1.50A,thepeak currentintheinductorwillbe 1.8A.The minimum specifiedcurrentlimitoverall operatingconditionsis1.8A.One can eitherreduceΔiL,ormake theengineeringjudgmentthatzeromarginwill be safeenough.The typicalcurrentlimitis2.5A. The LMR10515 operatesat frequenciesallowingthe use of ceramicoutputcapacitorswithoutcompromising transientresponse.Ceramic capacitorsallowhigherinductorripplewithoutsignificantlyincreasingoutputripple. See theOUTPUT CAPACITOR sectionformore detailson calculatingoutputvoltageripple.Now thattheripple currentisdetermined,theinductanceiscalculatedby: where When selectingan inductor,make surethatitiscapableofsupportingthepeak outputcurrentwithoutsaturating. Inductorsaturationwillresultin a sudden reductionin inductanceand preventthe regulatorfrom operating correctly.Because of the speed of the internalcurrentlimit,the peak currentof the inductorneed onlybe specifiedfortherequiredmaximum outputcurrent.For example,ifthedesignedmaximum outputcurrentis1.0A and thepeak currentis1.25A,thentheinductorshouldbe specifiedwitha saturationcurrentlimitof> 1.25A. There isno need tospecifythesaturationorpeak currentoftheinductoratthe2.5A typicalswitchcurrentlimit. The differenceininductorsizeisa factorof 5. Because of the operatingfrequencyof the LMR10515, ferrite based inductorsare preferredtominimizecorelosses.Thispresentslittlerestrictionsincethevarietyofferrite- based inductorsis huge. Lastly,inductorswithlower seriesresistance(RDCR ) willprovidebetteroperating efficiency.Forrecommended inductorssee Example Circuits. INPUT CAPACITOR An inputcapacitorisnecessaryto ensure thatVIN does not drop excessivelyduringswitchingtransients.The primaryspecificationsoftheinputcapacitorare capacitance,voltage,RMS currentrating,and ESL (Equivalent SeriesInductance).The recommended inputcapacitanceis22 µF.The inputvoltageratingisspecificallystated by thecapacitormanufacturer.Make suretocheck any recommended deratingsand alsoverifyifthereisany significantchange in capacitanceat the operatinginputvoltageand the operatingtemperature.The input capacitormaximum RMS inputcurrentrating(IRMS-IN )must be greaterthan: Neglectinginductorripplesimplifiestheabove equationto: Itcan be shown from theabove equationthatmaximum RMS capacitorcurrentoccurswhen D = 0.5.Always calculatetheRMS atthepointwhere thedutycycleD isclosestto0.5.The ESL ofan inputcapacitorisusually determinedby theeffectivecrosssectionalareaofthecurrentpath.A largeleadedcapacitorwillhave highESL and a 0805 ceramicchipcapacitorwillhave very low ESL. At the operatingfrequenciesof the LMR10515, leadedcapacitorsmay have an ESL so largethattheresultingimpedance (2πfL)willbe higherthanthatrequired toprovidestableoperation.As a result,surfacemount capacitorsarestronglyrecommended. Sanyo POSCAP, Tantalumor Niobium,PanasonicSP, and multilayerceramiccapacitors(MLCC) are allgood choicesforbothinputand outputcapacitorsand have verylow ESL. For MLCCs itisrecommended touse X7R or X5R typecapacitorsdue to theirtoleranceand temperaturecharacteristics.Consultcapacitormanufacturer datasheetstosee how ratedcapacitancevariesoveroperatingconditions. OUTPUT CAPACITOR The outputcapacitorisselectedbased upon thedesiredoutputrippleand transientresponse.The initialcurrent ofa loadtransientisprovidedmainlyby theoutputcapacitor.The outputrippleoftheconverteris: Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMR10515

K = POUT POUT + PLOSS K = POUT PIN x R2R1 = VREF VOUT - 1 LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com When usingMLCCs, theESR istypicallyso low thatthecapacitiveripplemay dominate.When thisoccurs,the outputripplewillbe approximatelysinusoidaland 90° phase shiftedfrom the switchingaction.Given the availabilityand qualityofMLCCs and theexpectedoutputvoltageofdesignsusingtheLMR10515, thereisreally no need to reviewany othercapacitortechnologies.Anotherbenefitof ceramiccapacitorsistheirabilityto bypass high frequencynoise.A certainamount of switchingedge noise willcouple through parasitic capacitancesintheinductortotheoutput.A ceramiccapacitorwillbypass thisnoisewhilea tantalumwillnot. Sincetheoutputcapacitorisone ofthetwo externalcomponents thatcontrolthestabilityoftheregulatorcontrol loop,most applicationswillrequirea minimum of22 µF ofoutputcapacitance.Capacitanceoften,butnotalways, can be increasedsignificantlywithlittledetrimenttotheregulatorstability.Liketheinputcapacitor,recommended multilayerceramiccapacitorsareX7R orX5R types. CATCH DIODE The catchdiode(D1)conductsduringtheswitchoff-time.A Schottkydiodeisrecommended foritsfastswitching timesand lowforwardvoltagedrop.The catchdiodeshouldbe chosen so thatitscurrentratingisgreaterthan: ID1 = IOUT x (1-D) The reversebreakdown ratingofthediodemust be atleastthemaximum inputvoltageplusappropriatemargin. To improveefficiency,choose a Schottkydiodewitha lowforwardvoltagedrop. OUTPUT VOLTAGE The outputvoltageissetusingthefollowingequationwhere R2 isconnectedbetween theFB pinand GND, and R1 isconnectedbetween VO and theFB pin.A good valueforR2 is10k.When designinga unitygainconverter (Vo = 0.6V),R1 shouldbe between 0Ω and 100Ω,and R2 shouldbe equalorgreaterthan10kΩ. VREF = 0.60V PCB LAYOUT CONSIDERATIONS When planninglayoutthereare a few thingstoconsiderwhen tryingtoachievea clean,regulatedoutput.The most importantconsiderationistheclosecouplingoftheGND connectionsoftheinputcapacitorand thecatch diodeD1. These groundends shouldbe closetoone anotherand be connectedtotheGND planewithatleast two through-holes.Placethesecomponents as closetotheIC as possible.Next inimportanceisthelocationof theGND connectionoftheoutputcapacitor,whichshouldbe neartheGND connectionsofCIN and D1. There shouldbe a continuousgroundplaneon thebottomlayerofa two-layerboardexceptundertheswitchingnode island.The FB pinisa highimpedance node and careshouldbe takentomake theFB traceshorttoavoidnoise pickupand inaccurateregulation.The feedbackresistorsshouldbe placedas closeas possibletotheIC,with theGND ofR1 placedas closeas possibletotheGND oftheIC.The VOUT tracetoR2 shouldbe routedaway fromtheinductorand any othertracesthatareswitching.High AC currentsflowthroughtheVIN,SW and VOUT traces,so theyshouldbe as shortand wide as possible.However, making thetraceswide increasesradiated noise,so the designermust make thistrade-off.Radiatednoisecan be decreased by choosinga shielded inductor.The remainingcomponents should also be placed as close as possibleto the IC. Please see ApplicationNote AN-1229 forfurtherconsiderationsand theLMR10515 demo board as an example ofa good layout. CalculatingEfficiency,and JunctionTemperature The completeLMR10515 DC/DC converterefficiencycan be calculatedinthefollowingmanner. Or Calculationsfordeterminingthemost significantpower lossesareshown below.Otherlossestotalinglessthan 2% arenotdiscussed.

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PCOND = (IOUT 2 x D) 1 31 + x 'iL IOUT R DSON D = VOUT + VD + VDCR VIN + VD + VDCR - VSW D = VOUT + VD VIN + VD - VSW LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 Power loss (PLOSS ) is the sum of two basic types of lossesin the converter:switchingand conduction. Conductionlossesusuallydominateathigheroutputloads,whereas switchinglossesremainrelativelyfixedand dominateatloweroutputloads.The firststepindeterminingthelossesistocalculatethedutycycle(D): VSW isthevoltagedropacrosstheinternalPFET when itison,and isequalto: VSW = IOUT x R DSON VD istheforwardvoltagedropacrosstheSchottkycatchdiode.Itcan be obtainedfromthediodemanufactures ElectricalCharacteristicssection.Ifthe voltagedrop acrossthe inductor(VDCR ) isaccountedfor,the equation becomes: The conductionlossesinthefree-wheelingSchottkydiodearecalculatedas follows: PDIODE = VD x IOUT x (1-D) Oftenthisisthe singlemost significantpower lossinthe circuit.Care shouldbe takento choose a Schottky diodethathas a lowforwardvoltagedrop. Another significantexternalpower lossis the conductionlossin the outputinductor.The equationcan be simplifiedto: PIND = IOUT 2 x R DCR The LMR10515 conductionlossismainlyassociatedwiththeinternalPFET: Iftheinductorripplecurrentisfairlysmall,theconductionlossescan be simplifiedto: PCOND = IOUT 2 x R DSON x D Switchinglossesare alsoassociatedwiththeinternalPFET. They occurduringtheswitchon and offtransition periods,where voltagesand currentsoverlapresultinginpower loss.The simplestmeans todeterminethisloss istoempiricallymeasuringtheriseand falltimes(10% to90%) oftheswitchattheswitchnode. SwitchingPower Loss iscalculatedas follows: PSWR = 1/2(VIN x IOUT x FSW x TRISE) PSWF = 1/2(VIN x IOUT x FSW x TFALL ) PSW = PSWR + PSWF Anotherlossisthepower requiredforoperationoftheinternalcircuitry: PQ = IQ x VIN IQ isthequiescentoperatingcurrent,and istypicallyaround3.3mA forthe1.6MHz frequencyoption. TypicalApplicationpower lossesare: Table1.Power Loss Tabulation VIN 5.0V VOUT 3.3V POUT 4.125W IOUT 1.25A VD 0.45V PDIODE 188mW Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMR10515

R TJC= TJ - TC Power R TJA= TJ - TA Power R T= 'T Power LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com Table1.Power Loss Tabulation(continued) FSW 1.6MHz IQ 3.3mA PQ 16.5mW TRISE 4nS PSWR 20mW TFALL 4nS PSWF 20mW R DS(ON) 150m Ω PCOND 156mW INDDCR 70m Ω PIND 110mW D 0.667 PLOSS 511mW η 88% PINTERNAL 213mW ΣPCOND + PSW + PDIODE + PIND + PQ = PLOSS ΣPCOND + PSWF + PSWR + PQ = PINTERNAL PINTERNAL = 213 mW Thermal Definitions TJ = Chipjunctiontemperature TA = Ambienttemperature R θJC = Thermalresistancefromchipjunctiontodevicecase R θJA = Thermalresistancefromchipjunctiontoambientair Heat intheLMR10515 due tointernalpower dissipationisremoved throughconductionand/orconvection. Conduction:Heat transferoccursthroughcrosssectionalareas of material.Depending on the material,the transferofheatcan be consideredtohave poortogood thermalconductivityproperties(insulatorvs.conductor). Heat Transfergoes as: Silicon→ package → leadframe→ PCB Convection:Heat transferis by means of airflow.This could be from a fan or naturalconvection.Natural convectionoccurswhen aircurrentsrisefromthehotdevicetocoolerair. Thermalimpedance isdefinedas: Thermalimpedance fromthesiliconjunctiontotheambientairisdefinedas: The PCB size,weightofcopperused toroutetracesand groundplane,and number oflayerswithinthePCB can greatlyeffectR θJA. The type and number of thermalviascan also make a largedifferencein the thermal impedance.Thermalviasarenecessaryinmost applications.They conductheatfromthesurfaceofthePCB to theground plane.Four tosixthermalviasshouldbe placedunder theexposed pad totheground planeifthe WSON package isused. Thermal impedance alsodepends on thethermalpropertiesoftheapplicationoperatingconditions(Vin,Vo, Io etc),and thesurroundingcircuitry. SiliconJunctionTemperature DeterminationMethod 1: To accuratelymeasure the silicontemperaturefora givenapplication,two methods can be used. The first method requirestheusertoknow thethermalimpedance ofthesiliconjunctiontocase temperature. R θJC isapproximately18°C/Watt forthe 6-pinWSON package withthe exposed pad. Knowing the internal dissipationfrom theefficiencycalculationgivenpreviously,and thecase temperature,which can be empirically measured on thebench we have:

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R TJA= 165° C - 140° C 213 mW = 117° C/W R TJA= 165° - Ta PINTERNAL LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 where TC isthetemperatureoftheexposed pad and can be measured on thebottomsideofthePCB. Therefore: Tj= (RθJC x PLOSS )+ TC From thepreviousexample: Tj= (RθJC x PINTERNAL )+ TC Tj= 18°C/W x 0.213W + TC The second method can givea veryaccuratesiliconjunctiontemperature. The firststepistodetermineR θJA oftheapplication.The LMR10515 has over-temperatureprotectioncircuitry. When the silicontemperaturereaches 165°C, the device stops switching.The protectioncircuitryhas a hysteresisofabout15°C. Once thesilicontemperaturehas decreasedtoapproximately150°C, thedevicewill starttoswitchagain.Knowing this,theR θJA forany applicationcan be characterizedduringtheearlystagesof the designone may calculatethe R θJA by placingthe PCB circuitintoa thermalchamber. Raise the ambient temperatureinthegivenworkingapplicationuntilthecircuitentersthermalshutdown.IftheSW-pin ismonitored, itwillbe obviouswhen theinternalPFET stopsswitching,indicatinga junctiontemperatureof165°C. Knowing theinternalpower dissipationfrom theabove methods,thejunctiontemperature,and theambienttemperature R θJA can be determined. Once thisisdetermined,themaximum ambienttemperatureallowedfora desiredjunctiontemperaturecan be found. An example ofcalculatingR θJA foran applicationusingtheLMR10515 isshown below. A sample PCB isplacedinan oven withno forcedairflow.The ambienttemperaturewas raisedto140°C, and at thattemperature,thedevicewent intothermalshutdown. From thepreviousexample: PINTERNAL = 213 mW Since the junctiontemperaturemust be kept below 125°C, then the maximum ambient temperaturecan be calculatedas: Tj-(RθJA x PLOSS )= TA 125°C -(117°C/W x 213 mW) = 100°C InternalWSON Connection For certainhighpower applications,thePCB landmay be modifiedtoa "dog bone" shape (seeFigure24).By increasingthesizeofgroundplane,and addingthermalvias,theR θJA fortheapplicationcan be reduced. Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMR10515

VIN = 5V LMR10515 VO = 3.3V @ 1.5A 100k 22 PF 10V 2.7 PH 2.3A 1.5A 20V 45.3k 2 x 22 PF 6.3V 10k GND FBEN VIN SW VIN = 5V LMR10515 VO = 1.2V @ 1.5A 100k 22 PF 10V 3.3 PH 2.2A 1.5A 20V 15k 2 x 22 PF 6.3V 15k ENFB SW VINA VIND GND GND PLANE LMR10515 SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com Figure24. 6-Lead WSON PCB Dog Bone Layout LMR10515X Design Example 1 Figure25. LMR10515X (1.6MHz):Vin = 5V,Vo = 1.2V@ 1.5A LMR10515X Design Example 2 Figure26. LMR10515X (1.6MHz):Vin = 5V,Vo = 3.3V@ 1.5A

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VIN = 5V LMR10515 VO = 1.2V @ 1.5A 100k 22 PF 10V 1.6 PH 2.0A 1.5A 20V 10k 2 x 22 PF 6.3V 10k GND FBEN VIN SW VIN = 5V LMR10515 VO = 3.3V @ 1.5A 100k 22 PF 10V 1.6 PH 2.0A 1.5A 20V 45.3k 2 x 22 PF 6.3VR2 10k LMR10515 www.ti.com SNVS728C –OCTOBER 2011–REVISED APRIL 2013 LMR10515Y Design Example 3 Figure27. LMR10515Y (3MHz):Vin = 5V,Vo = 3.3V@ 1.5A LMR10515Y Design Example 4 Figure28. LMR10515Y (3MHz):Vin = 5V,Vo = 1.2V@ 1.5A Copyright© 2011–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMR10515

SNVS728C –OCTOBER 2011–REVISED APRIL 2013 www.ti.com

REVISION HISTORY

Changes from RevisionB (April2013)toRevisionC Page

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www.ti.com 11-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples LMR10515XMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMFE/NOPB ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SH6B LMR10515XSD/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L265B LMR10515XSDE/NOPB ACTIVE WSON NGG 6 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L265B LMR10515XSDX/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L265B LMR10515YMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMFE/NOPB ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SJ1B LMR10515YSD/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSDE/NOPB ACTIVE WSON NGG 6 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L269B LMR10515YSDX/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 L269B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.

www.ti.com 11-Apr-2013 Addendum-Page 2 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR10515XMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMR10515XMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0 LMR10515XMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMR10515XSD/NOPB WSON NGG 6 1000 213.0 191.0 55.0 LMR10515XSDE/NOPB WSON NGG 6 250 213.0 191.0 55.0 LMR10515XSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LMR10515YMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMR10515YMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0 LMR10515YMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMR10515YSD/NOPB WSON NGG 6 1000 213.0 191.0 55.0 LMR10515YSDE/NOPB WSON NGG 6 250 213.0 191.0 55.0 LMR10515YSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 Pack Materials-Page 2

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