LMP2015 INTERSIL | Alldatasheet
Document overview
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Technical content
Features
(For VS = 5V, Typical unless otherwise noted) ■ Low guaranteed VOS over temperature 10 µV ■ Low noise with no 1/f 35 nV/√Hz ■ High CMRR 130 dB ■ High PSRR 120 dB ■ High AVOL 130 dB ■ Wide gain bandwidth product 3 MHz ■ High slew rate 4 V/µs ■ Low supply current 930 µA ■ Rail-to-Rail output 30 mV ■ No external capacitors required
Applications
■ Precision instrumentation amplifiers ■ Thermocouple amplifiers ■ Strain gauge bridge amplifier ■ ADC driver Connection Diagrams 5-Pin SOT23 20212502 Top View 8-Pin SOIC 20212542 Top View 8-Pin MSOP 20212538 Top View
Ordering Information
Package Part Number Temperature Range Package Marking Transport Media NSC Drawing 5-Pin SOT23 LMP2015MF −40°C to 125°C AD5A 1k Units Tape and Reel MF05ALMP2015MFX 3k Units Tape and Reel 8-Pin SOIC LMP2015MA LMP2015MA 95 Units/Rail M08ALMP2015MAX 2.5k Units Tape and Reel LMP2016MA LMP2016MA 95 Units/Rail LMP2016MAX 2.5k Units Tape and Reel 8-Pin MSOP LMP2016MM AE5A 1k Units Tape and Reel MUA08ALMP2016MMX 3.5k Units Tape and Reel © 2007 National Semiconductor Corporation 202125 www.national.com LMP2015 Single/LMP2016 Dual High Precision, Rail-to-Rail Output Operational Amplifier
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model 2000V Machine Model 200V Supply Voltage 5.8V Common Mode Input Voltage −0.3 ≤ VCM ≤ VCC +0.3V Lead Temperature (soldering 10 sec.) +300°C Differential Input Voltage ±Supply Voltage Current at Input Pin 30 mA Current at Output Pin 30 mA Current at Power Supply Pin 50 mA Operating Ratings (Note 1) Supply Voltage 2.7V to 5.25V Storage Temperature Range −65°C to 150°C Temperature Range (Note 3) −40°C to 125°C 2.7V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = 25°C, Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units VOS Input Offset Voltage (LMP2015 only) 0.8 5 μVInput Offset Voltage (LMP2016 only) 0.8 5 Offset Calibration Time 0.5 10 12 ms TCVOS Input Offset Voltage 0.015 .05 μV/°C Long Term Offset Drift 0.006 μV/month Lifetime VOS Drift 2.5 μV IIN Input Current -3 pA IOS Input Offset Current 6 pA RIND Input Differential Resistance 9 MΩ CMRR Common Mode Rejection Ratio −0.3 ≤ VCM ≤ 0.9V 0 ≤ VCM ≤ 0.9V 130 dB CMVR Input Common Mode Range CMRR ≥ 95 dB −0.3 0.9 dB CMRR ≥ 90 dB 0 0.9 PSRR Power Supply Rejection Ratio V+ – V− = 2.7V to 5V, VCM = 0V 95 120 dB VO Output Swing (LMP2015 only) RL = 10 kΩ to 1.35V VIN(diff) = ±0.5V 2.665 2.655 2.68 V 0.033 0.060 0.075 RL = 2 kΩ to 1.35V VIN(diff) = ±0.5V 2.630 2.615 2.65 V 0.061 0.085 0.105 Output Swing (LMP2016 only) RL = 10 kΩ to 1.35V VIN(diff) = ±0.5V 2.64 2.63 2.68 V 0.033 0.060 0.075 RL = 2 kΩ to 1.35V VIN(diff) = ±0.5V 2.615 2.6 2.65 V 0.061 0.085 0.105 www.national.com 2 LMP2015 Single/LMP2016 Dual
Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units AVOL Open Loop Voltage Gain RL = 10 kΩ 95 130 dB RL = 2 kΩ 90 124 IO Output Current Sourcing, VO = 0V VIN(diff) = ±0.5V mASinking, VO = 5V VIN(diff) = ±0.5V IS Supply Current per Channel 0.919 1.20 1.50 mA 2.7V AC Electrical Characteristics TA = 25°C, V+ = 2.7V, V− = 0V, VCM = 1.35V, VO = 1.35V, and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units GBWP Gain Bandwidth Product 3 MHz SR Slew Rate 4 V/μs θ m Phase Margin 60 Deg Gm Gain Margin −14 dB en Input Referred Voltage Noise 35 nV/ in Input Referred Current Noise pA/ enp-p Input Referred Voltage Noise RS = 100Ω, DC to 10 Hz 850 nVPP trec Input Overload Recovery Time 50 ms V− = 0V, V CM = 2.5V, VO = 2.5V and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units VOS Input Offset Voltage (LMP2015 only) 0.12 5 μVInput Offset Voltage (LMP2016 only) 0.12 5 Offset Calibration Time 0.5 10 12 ms TCVOS Input Offset Voltage 0.015 .05 μV/°C Long Term Offset Drift 0.006 μV/month Lifetime VOS Drift 2.5 μV IIN Input Current −3 pA IOS Input Offset Current 6 pA RIND Input Differential Resistance 9 MΩ CMRR Common Mode Rejection Ratio −0.3 ≤ VCM ≤ 3.2 0 ≤ VCM ≤ 3.2 100 130 dB CMVR Input Common Mode Range CMRR ≥ 100 dB −0.3 3.2 dB CMRR ≥ 90 dB 0 3.2 PSRR Power Supply Rejection Ratio V+ – V− = 2.7V to 5V, VCM = 0V 95 120 dB 3 www.national.com LMP2015 Single/LMP2016 Dual
Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units VO Output Swing (LMP2015 only) RL = 10 kΩ to 2.5V VIN(diff) = ±0.5V 4.96 4.95 4.978 V 0.040 0.070 0.085 RL = 2 kΩ to 2.5V VIN(diff) = ±0.5V 4.895 4.875 4.919 V 0.091 0.115 0.140 Output Swing (LMP2016 only) RL = 10 kΩ to 2.5V VIN(diff) = ±0.5V 4.92 4.91 4.978 V 0.040 0.080 0.095 RL = 2 kΩ to 2.5V VIN(diff) = ±0.5V 4.875 4.855 4.919 V 0.0.91 0.125 0.150 AVOL Open Loop Voltage Gain RL = 10 kΩ 105 100 130 dB RL = 2 kΩ 95 132 IO Output Current Sourcing, VO = 0V VIN(diff) = ±0.5V mASinking, VO = 5V V IN(diff) = ±0.5V IS Supply Current per Channel 0.930 1.20 1.50 mA Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units GBW Gain-Bandwidth Product 3 MHz SR Slew Rate 4 V/μs θ m Phase Margin 60 deg Gm Gain Margin −15 dB en Input-Referred Voltage Noise 35 nV/ in Input-Referred Current Noise pA/ enp-p Input-Referred Voltage Noise RS = 100Ω, DC to 10 Hz 850 nVPP trec Input Overload Recovery Time 50 ms Note 1: Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 5: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. www.national.com 4 LMP2015 Single/LMP2016 Dual
Typical Performance Characteristics TA = 25°C, VS = 5V unless otherwise specified. Supply Current vs. Supply Voltage 20212555 Offset Voltage vs. Supply Voltage 20212523 Offset Voltage vs. Common Mode Voltage (VS = +5V) 20212524 Offset Voltage vs. Common Mode Voltage (VS = +2.7V) 20212525 Voltage Noise vs. Frequency 20212504 Input Bias Current vs. Common Mode 20212503 5 www.national.com LMP2015 Single/LMP2016 Dual
PSRR vs. Frequency 20212507 PSRR vs. Frequency 20212506 Output Sourcing @ 2.7V 20212559 Output Sourcing @ 5V 20212560 Output Sinking @ 2.7V 20212561 Output Sinking @ 5V 20212562 www.national.com 6 LMP2015 Single/LMP2016 Dual
Maximum Output Swing vs. Supply Voltage 20212563 Maximum Output Swing vs. Supply Voltage 20212564 Minimum Output Swing vs. Supply Voltage 20212565 Minimum Output Swing vs. Supply Voltage 20212566 CMRR vs. Frequency 20212505 Open Loop Gain and Phase vs. Supply Voltage 20212508 7 www.national.com LMP2015 Single/LMP2016 Dual
Open Loop Gain and Phase vs. Resistive Load @ 2.7V 20212509 Open Loop Gain and Phase vs. Resistive Load @ 5V 20212510 Open Loop Gain and Phase vs. Capacitive Load @ 2.7V 20212511 Open Loop Gain and Phase vs. Capacitive Load @ 5V 20212512 Open Loop Gain and Phase vs. Temperature @ 2.7V 20212536 Open Loop Gain and Phase vs. Temperature @ 5V 20212537 www.national.com 8 LMP2015 Single/LMP2016 Dual
THD+N vs. Amplitude 20212514 THD+N vs. Frequency 20212513 0.1 Hz − 10 Hz Noise vs. Time 20212515 9 www.national.com LMP2015 Single/LMP2016 Dual
Application Information
THE BENEFITS OF THE LMP2015/LMP2016's NO 1/f NOISE Using patented methods, the LMP2015/LMP2016 eliminate the 1/f noise present in other amplifiers. That noise, which increases as frequency decreases, is a major source of mea- surement error in all DC-coupled measurements. Low fre- quency noise appears as a constantly changing signal in series with any measurement being made. As a result, even when the measurement is made rapidly, this constantly changing noise signal will corrupt the result. The value of this noise signal can be surprisingly large. For example: If a con- ventional amplifier has a flat-band noise level of 10 nV/ and a noise corner of 10 Hz, the RMS noise at 0.001 Hz is 1 µV/ . This is equivalent to a 0.50 µV peak-to-peak error, in the frequency range 0.001 Hz to 1.0 Hz. In a circuit with a gain of 1000, this produces a 0.50 mV peak-to-peak output error. This number of 0.001 Hz might appear unreasonably low, but when a data acquisition system is operating for 17 minutes, it has been on long enough to include this error. In this same time, the LMP2015/LMP2016 will have only a 0.21 mV output error. This is smaller by 2.4 x. Keep in mind that this 1/f error gets even larger at lower frequencies. At the extreme, many people try to reduce this error by integrating or taking several samples of the same signal. This is also doomed to failure because the 1/f nature of this noise means that taking longer samples just moves the measurement into lower frequencies where the noise level is even higher. The LMP2015/LMP2016 eliminate this source of error. The noise level is constant with frequency so that reducing the bandwidth reduces the errors caused by noise. Another source of error that is rarely mentioned is the error voltage caused by the inadvertent thermocouples created when the common "Kovar type" IC package lead materials are soldered to a copper printed circuit board. These steel based leadframe materials can produce over 35 μV/°C when sol- dered onto a copper trace. This can result in thermocouple noise that is equal to the LMP2015/LMP2016 noise when there is a temperature difference of only 0.0014°C between the lead and the board! For this reason, the lead frame of the LMP2015/LMP2016 is made of copper. This results in equal and opposite junctions which cancel this effect. The extremely small size of the SOT23 package results in the leads being very close togeth- er. This further reduces the probability of temperature differ- ences and hence decreases thermal noise. OVERLOAD RECOVERY The LMP2015/LMP2016 recover from input overload much faster than most chopper-stabilized op amps. Recovery from driving the amplifier to 2X the full scale output, only requires about 40 ms. Many chopper-stabilized amplifiers will take from 250 ms to several seconds to recover from this same overload. This is because large capacitors are used to store the unadjusted offset voltage. 20212516 FIGURE 1. Overload Recovery Test the wide bandwidth of the output stage and large total GBWP. The LMP2015/LMP2016 do not need external capacitors. seconds from turn-on until the amplifier's error has settled. ucts. Add an input signal and the noise gets much worse. Compare this plot with Figure 3 of the LMP2015/LMP2016.
"The Benefits of the LMP2015" section). LMP2015 used as an ADC driver. FIGURE 8. DC Coupled ADC Driver
Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SOT23 8-Pin SOIC www.national.com 14 LMP2015 Single/LMP2016 Dual
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