LMG2104R022_V01 TI2 | Alldatasheet

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Technical content

LMG210xR0xx 100V GaN Half-Bridge Power Stage With Integrated Protection and Smart-Switching Features

1 Features

  • GaN half bridge power stage with integrated driver: 100V (GaN FET options: 2.2mΩ, 4.4mΩ)
  • Efficient and high-density power conversion with – Ultra-low propagation delay (20ns) and matching (2ns) – Independent turn-on and turn-off slew-rate control for both the GaN FETs – Zero-voltage detection (ZVD) reporting for dead-time optimization – Ideal diode mode (IDM) to reduce third quadrant losses in soft switching application
  • Input control flexibility – Independent input mode (IIM) control – Single PWM input with resistor programmable dead time option for IO-limited controllers
  • Robust protection – Interlock protection in IIM mode (LMG2104) – Internal bootstrap supply voltage regulation to prevent GaN FET overdrive – VDS monitoring based cycle-by-cycle short- circuit protection – Fault indication for over-temperature, supply under-voltage and short-circuit events
  • External bias power supply: 5V – Supports 3.3V and 5V input logic levels
  • Parasitic optimized QFN package with exposed top pad to support top-side cooling

2 Applications

  • Server PSU and BBU
  • Telecom power
  • Energy infrastructure
  • Motor drives
  • Class-D audio amplifiers

3 Description

The LMG210xR0xx device is a family of 100V half- bridge power stages, with integrated gate-driver and enhancement-mode gallium nitride (GaN) FETs. The devices consist of a high-frequency GaN FET driver in a half-bridge configuration, that drives two 100V GaN FETs. GaN FETs provide significant advantages for power conversion as GaN FETs have zero reverse recovery and very small input capacitance (C ISS) and output capacitance (C OSS). All the devices are mounted on a completely bond-wire free package platform with minimized package parasitic elements, which can be easily mounted on PCBs. The TTL logic compatible inputs support 3.3V and 5V logic levels, regardless of the VCC voltage. A proprietary bootstrap voltage control technique regulates the gate voltages of the enhancement mode GaN FETs within the safe operating range. The device extends advantages of discrete GaN FETs by offering a more user-friendly interface. The device is an excellent option for applications requiring high- frequency, high-efficiency operation in a small form factor. Device Information PART NUMBER(3) PACKAGE(1) PACKAGE SIZE(2) LMG210xR022 VBN (VQFN-FCRLF, 18) 7mm × 4.5mm LMG210xR044 RAR (VQFN-FCRLF, 17) 5.5mm × 4.5mm (1) For more information, see Section 7. (2) The package size (length × width) is a nominal value and includes pins, where applicable. (3) See the Device Comparison Tables. SW PGND VIN HB VCC AGND Level Shifters HS GaN GaN RDLR RDLF Driver Driver RDHR RDHF UVLO and ControlENIN/HI PWM/LI EN/FLT DHL/ZVDL DLH/ZVDH SYNCBOOT SCP ZVD IDM OTP SCP ZVD IDMUVLO and OVR and Control VCC HS Simplified Block Diagram ADVANCE INFORMATION LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change without notice.

7 Mechanical, Packaging, and Orderable Information....5 LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 www.ti.com

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4 Device Comparison

Table 4-1. Device Comparison DEVICE RDS (ON)(mΩ) PACKAGE SIZE(2) LMG2105R022VBNR LMG2104R022VBNR 2.2 7.00mm × 4.50mm LMG2105R044RARR LMG2104R044RARR 4.4 5.50mm × 4.50mm Table 4-2. Feature Comparison PART NUMBER INTERLOCK IN IIM MODE LMG2104Rxxx Enabled LMG2105Rxxx Disabled www.ti.com LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: LMG2104R022 LMG2104R044 LMG2105R022 LMG2105R044 ADVANCE INFORMATION

5 Device and Documentation Support

5.1 Documentation Support

5.1.1 Related Documentation

  • Texas Instruments, Layout Considerations for LMG5200 GaN Power Stage application note
  • Texas Instruments, Using the LMG5200: GaN Half-Bridge Power Stage EVM user's guide

5.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

5.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

5.4 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

5.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

5.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

6 Revision History

May 2026 * Initial Release LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 www.ti.com

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7 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

7.1 Tape and Reel Information

Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant LMG2104R022VBNR VQFN- LMG2104R044RARR VQFN- LMG2105R022VBNR VQFN- LMG2105R044RARR VQFN- www.ti.com LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: LMG2104R022 LMG2104R044 LMG2105R022 LMG2105R044 ADVANCE INFORMATION

TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMG2104R022VBNR VQFN-FCRLF VBN 18 2000 336.6 336.6 28.6 LMG2104R044RARR VQFN-FCRLF RAR 17 2000 336.6 336.6 28.6 LMG2105R022VBNR VQFN-FCRLF VBN 18 2000 336.6 336.6 28.6 LMG2105R044RARR VQFN-FCRLF RAR 17 2000 336.6 336.6 28.6 LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 www.ti.com

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7.2 Mechanical Data

www.ti.com LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: LMG2104R022 LMG2104R044 LMG2105R022 LMG2105R044 ADVANCE INFORMATION

LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 www.ti.com

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Product Folder Links: LMG2104R022 LMG2104R044 LMG2105R022 LMG2105R044 ADVANCE INFORMATION

www.ti.com LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: LMG2104R022 LMG2104R044 LMG2105R022 LMG2105R044 ADVANCE INFORMATION

www.ti.com PACKAGE OUTLINE 4.64.4 5.65.4 0.850.72 2X 2.325

0.000 PKG

0.6850.051.90.05 2X 0.10.05 0.6752X 2.60.05 11X 0.60.4

0.1 MIN

4X 2.6250.05 0.5710.050.2710.05 2X (0.35)(0.8) SEE DETAIL A26X (0.18) (0.13) (0.1) VQFN-FCRLF - 0.85 mm max heightRAR0017BPLASTIC QUAD FLATPACK - NO LEAD 4229681/B 03/2024NOTES: 0.08CSEATING PLANE PIN 1 ID(45X 0.3) 0.1CAB0.05C1 5 6 7 1116 817 A40.000 SCALE 2.500 DETAIL ATYPICAL B-B30.000 SECTION B-BTYPICAL AB C LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 www.ti.com

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www.ti.com EXAMPLE BOARD LAYOUT 0.05 MAXALL AROUND0.05 MINALL AROUND (1.9) 4X (2.625) 2X (0.1) 2X (2.6) 5X (2.125)(1.75) (1.75) 11X (0.7) 2X (0.7) 2X (0.75) 4X (2.45) 4X (2.45) 11X (0.25) 5X (0.75) 5X (0.75) 3X (1.7) VQFN-FCRLF - 0.85 mm max heightRAR0017BPLASTIC QUAD FLATPACK - NO LEAD 4229681/B 03/2024NOTES: (continued) LAND PATTERN EXAMPLESCALE: 15X METAL UNDER SOLDER MASKTYPSOLDER MASKOPENINGTYP 5 6 7 1116 METAL EDGESOLDER MASKOPENINGEXPOSEDMETALNON SOLDER MASKDEFINEDSOLDER MASK DETAILS METAL UNDERSOLDER MASKSOLDER MASKOPENINGEXPOSEDMETALSOLDER MASKDEFINED www.ti.com LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: LMG2104R022 LMG2104R044 LMG2105R022 LMG2105R044 ADVANCE INFORMATION

www.ti.com EXAMPLE STENCIL DESIGN (1.235) (0.502) (1.852) (1.618)(0.968) 2X (2.6) 2X (0.1) (1.875)5X (2.125) 15X (0.25) 4X (2.45) 11X (0.7) 2X (0.7) 2X (0.75) 2X (0.3)2X (0.45) 3X (1.71) (1.21) VQFN-FCRLF - 0.85 mm max height 3X (2.427) RAR0017BPLASTIC QUAD FLATPACK - NO LEAD 4229681/B 03/2024NOTES: (continued)design recommendations.6.Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate METAL UNDERSOLDER MASKTYP BASED ON 0.125 mm THICK STENCILSOLDER PASTE EXAMPLESCALE: 15XPRINTED SOLDER COVERAGE BY AREA UNDER PACKAGEPAD 5, 6 & 7: 75%PAD 17: 76% SOLDER MASKOPENINGTYP 5 6 7 1116 LMG2104R022, LMG2104R044, LMG2105R022, LMG2105R044 SLVSM49 – MAY 2026 www.ti.com

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www.ti.com 27-May-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) XLMG2104R022VBNR Active Preproduction VQFN-FCRLF (VBN) | 18 2500 | LARGE T&R - Call TI Call TI -40 to 150 XLMG2104R044RARR Active Preproduction VQFN-FCRLF (RAR) | 17 2500 | LARGE T&R - Call TI Call TI -40 to 150 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com PACKAGE OUTLINE 4.6 4.4 5.6 5.4 0.85 0.72 2X 2.325 .000 PKG 0 2X 1.825 2X 1.325 2X 0.825 2X 0.587 2X 1.087 2X 1.587 2X 2.087 0.685 0.05 1.9 0.05 2X 0.1 0.05 2X 2.6 0.05 0.675 .000 PKG 0 0.175 0.325 0.95 0.05 0.95 0.05 1.875 1.4 0.05 1.175 0.675 0.175 0.325 0.825 1.875 26X 0.3 0.2 11X 0.6 0.4 2X 0.6 0.4 2X 0.425 0.325 0.01 0.00 4X 2.625 0.05 0.571 0.05 0.271 0.05 2X (0.35) (0.8) 2X (2.5) 2X (0.45) (1.5) 26X (0.18) (0.13) (0.1) VQFN-FCRLF - 0.85 mm max heightRAR0017B PLASTIC QUAD FLATPACK - NO LEAD 4229681/B 03/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. 0.08 C SEATING PLANE PIN 1 ID (45 X 0.3)

0.1 C A B

0.05 C 1116 SEE DETAIL A A40.000 DETAIL A TYPICAL SCALE 2.500 B-B30.000 SECTION B-B TYPICAL AB C

www.ti.com EXAMPLE BOARD LAYOUT .000 PKG 0 .000 PKG 0

0.05 MAX

0.05 MIN

( ) 2.6 2X ( ) 2.325 2X ( ) 1.825 2X ( ) 1.325 2X ( ) 0.825 ( ) 0.685 2X ( ) 0.587 2X ( ) 1.087 2X ( ) 1.587 2X ( ) 2.087 ( ) 2.1 ( ) 1.875 ( ) 1.4 ( ) 1.175 ( ) 0.675 ( ) 0.175 ( ) 0.325 ( ) 0.825 ( ) 1.875 ( ) 2.1 ( ) 0.95 ( ) 1.9 4X ( ) 2.625 2X ( ) 0.1 2X ( ) 2.6 ( ) 0.325 ( ) 0.175 ( ) 0.675 5X ( ) 2.125 ( ) 1.75 ( ) 1.75 5X ( ) 2.125 15X (0.25) 11X (0.7) 2X (0.7) 2X (0.75) 4X ( ) 2.45 4X ( ) 2.45 11X (0.25) 3X ( ) 2.95 3X ( ) 2.177 5X ( ) 0.75 5X ( ) 0.75 3X ( ) 1.177 3X ( ) 0.177 3X ( ) 0.771 3X ( ) 1.7 ( 0.2) TYP VIA ( ) 0.271 ( ) 0.571 VQFN-FCRLF - 0.85 mm max heightRAR0017B PLASTIC QUAD FLATPACK - NO LEAD 4229681/B 03/2024 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. LAND PATTERN EXAMPLE SCALE: 15X METAL UNDER SOLDER MASK TYP SOLDER MASK OPENING TYP METAL EDGE SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED SOLDER MASK DETAILS METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN .000 PKG 0 ( ) 2.1 .000 PKG 0 ( ) 2.6 2X ( ) 2.325 2X ( ) 1.825 2X ( ) 1.325 2X ( ) 0.825 2X ( ) 0.587 2X ( ) 1.087 2X ( ) 1.587 2X ( ) 2.087 3X ( ) 2.95 ( ) 1.235 ( ) 0.502 ( ) 1.852 ( ) 1.618 ( ) 0.968 2X ( ) 2.6 2X ( ) 0.1 ( ) 2.1 ( ) 1.875 ( ) 1.175 ( ) 0.675 ( ) 0.175 ( ) 0.325 ( ) 0.825 ( ) 1.875 ( ) 2.1 2X ( ) 1.205 4X ( ) 2.45 5X ( ) 2.125 ( ) 1.875 ( ) 0.675 ( ) 0.175 ( ) 0.325 ( ) 1.875 5X ( ) 2.125 4X ( ) 2.45 2X (0.7) 2X (0.75) 2X (0.3) 2X (0.45) 3X (1.71) (1.21) 11X (0.25) 2X (1.15) 3X ( ) 2.427 VQFN-FCRLF - 0.85 mm max heightRAR0017B PLASTIC QUAD FLATPACK - NO LEAD 4229681/B 03/2024 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 15X PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE PAD 5, 6 & 7: 75% PAD 17: 76% METAL UNDER SOLDER MASK TYPSOLDER MASK OPENING TYP

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. VQFN-FCRLF - 0.85 mm max heightVBN 18 PLASTIC QUAD FLATPACK - NO LEAD4.5 x 7, 0.5 mm pitch 4230977/A

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