LMF60

LMF60 NSC | Alldatasheet

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Technical content

Features

Y Cutoff frequency range of 0.1 Hz to 30 kHz Y Cutoff frequency accuracy of g1.0%, maximum Y Low offset voltage g100 mV, maximum, g5V supply Y Low clock feedthrough of 10 mV p–p , typical Y Dynamic range of 88 dB, typical Y Two uncommitted op amps available Y No external components required Y 14-pin DIP or 14-pin wide-body S.O. package Y Single/Dual Supply Operation: a4V to a14V ( g2V to g7V) Y Cutoff frequency set by external or internal clock Y Pin-compatible with the MF6

Applications

Y Data acquisition noise filtering Y Instrumentation Y High-order tracking filters Block and Connection Diagrams TL/H/9294–1 All Packages TL/H/9294–2 Top View Order Number LMF60CMJ-50, (5962-9096 701MCA or LMF60CMJ50/883), LMF60CMJ-100, or (5962-9096 702MCA or LMF60CMJ100/883) See NS Package Number J14A Order Number LMF60CIWM-50 or LMF60CIWM-100 See NS Package Number M14B Order Number LMF60CIN-50 or LMF60CIN-100 See NS Package Number N14A TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1996 National Semiconductor Corporation RRD-B30M56/Printed in U. S. A.

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (V a b Vb) (Note 2) 15V Voltage at Any Pin V a a 0.2V Vb b 0.2V Input Current at Any Pin (Note 3) 5 mA Package Input Current (Note 3) 20 mA Power Dissipation (Note 4) 500 mW Storage Temperature b65§Ct o a150§C ESD Susceptibility (Note 5) 2000V CLK IN Pin 1700V Soldering Information: # N Package: 10 sec. 260 §C # J Package: 10 sec. 300 §C # SO Package: Vapor Phase (60 sec.) 215 §C Infrared (15 sec.) (Note 6) 220 §C Operating Ratings (Note 1) Temperature Range T Min s TA s TMax LMF60CIN-50, LMF60CIN-100 LMF60CIJ-50, LMF60CIJ-100, LMF60CIWM-50, LMF60CIWM-100 b40§C s TA s a85§C LMF60CMJ-50, LMF60CMJ-100, LMF60CMJ50/883, LMF60CMJ100/883 b55§C s TA s a125§C Supply Voltage (V a b Vb) 4 Vt o1 4 V Filter Electrical Characteristics The following specifications apply for f CLK e 500 kHz (Note 7) unless otherwise specified. Boldface limits apply for T A e TJ e TMIN to T MAX; all other limits T A e TJ e 25§C. Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) Va ea 5V, V b eb 5V fCLK Clock Frequency Range 5 Hz (Min) (Note 16) 1.5 MHz (Max) IS Total Supply Current 7.0 / 12.0 mA (Max) Clock Feedthrough V IN e 0V Filter 10 mVp-p Opamp 5 mVp-p Ho DC Gain R Source s 2k X 0.10 / 0.10 dB (Max) b0.26 / b0.30 dB (Min) fCLK/fC Clock to LMF60-50 49.00 g0.8% / 49.00 g1.0% (Max) Cutoff Frequency LMF60-100 98.10 Ratio (Note 10) Temperature Coefficient 4 ppm/ §Cof f CLK/fC AMIN Stopband Attenuation At 2 c fC 36 dB (Min) VOS DC Offset LMF60-50 g100 mV (Max) Voltage LMF60-100 g150 mV (Max) VOUT Output Voltage a3.9 / a3.7 V (Min) Swing (Note 2) b4.2 / b4.0 V (Max) ISC Output Short Circuit Source 90 mA Current (Note 11) Sink 2.2 mA Dynamic Range 88 dB(Note 12) Additional LMF60-50 fIN e 12 kHz b9.45 g0.46 / b9.45 g0.50 dB Magnitude fIN e 9 kHz b0.87 g0.16 / b0.87 g0.20 dB Response LMF60-100 fIN e 6 kHz b9.30 g0.46 / b9.30 g0.50 dBTest Points http:/ /www.national.com 2

Filter Electrical Characteristics (Continued) The following specifications apply for f CLK e 250 kHz (Note 7) unless otherwise specified. Boldface limits apply for T A e TJ e TMIN to T MAX; all other limits T A e TJ e 25§C. Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) Va ea 2.5V, V b eb 2.5V fCLK Clock Frequency Range 5 Hz (Min) (Note 16) 750 kHz (Max) IS Total Supply Current 5.0 / 6.5 mA (Max) Clock Feedthrough V IN e 0V Filter 6 mV (Peak to Peak) Opamp 3 mV Ho DC Gain (with f CLK e 250 kHz 0.10 / 0.10 dB (Max) RSource s 2k X) b0.26 / b0.30 dB (Min) fCLK e 500 kHz b0.08 dB fCLK/fC Clock to LMF60-50 fCLK e 250 kHz 49.00 g0.8% / 49.00 g1.0% (Max) Cutoff fCLK e 500 kHz 49.00 g0.6% Frequency LMF60-100 fCLK e 250 kHz 98.10 g0.8% / 98.10 g1.0% (Max)Ratio (Note 10) fCLK e 500 kHz 98.10 g0.6% Temperature Coefficient 4 ppm/ §Cof f CLK/fC AMIN Stopband Attenuation At 2 c fC 36 dB (Min) VOS DC Offset LMF60-50 g60 mV (Max) Voltage LMF60-100 g90 mV (Max) VOUT Output Voltage R L e 5k X a1.4 / a1.2 V (Min) Swing (Note 2) b2.0 / b1.8 V (Max) ISC Output Short Circuit Source 42 mA Current (Note 11) Sink 0.9 mA Dynamic Range 81 dB(Note 12) Additional LMF60-50 fIN e 6 kHz b9.45 g0.46 / b9.45 g0.50 dB Response LMF60-100 fIN e 3 kHz b9.30 g0.46 / b9.30 g0.50 dBTest Points http:/ /www.national.com3

Op Amp Electrical Characteristics Boldface limits apply for T A e TJ e TMIN to T MAX; all other limits T A e TJ e 25§C. Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) Va ea 5V, V b eb 5V VOS Input Offset Voltage g20 mV (Max) IB Input Bias Current 10 pA CMRR Common Mode Rejection Test Input Range e 55 dBRatio (Op Amp Ý2 Only) b2.2V to a1.8V VO Output Voltage Swing R L e 5k X 3.8 / 3.6 V (Min) b4.2 / b4.0 V (Max) ISC Output Short Circuit Source 90 mA Current (Note 13) Sink 2.1 mA SR Slew Rate 4 V/ ms AVOL DC Open Loop Gain 80 dB (Min) GBW Gain Bandwidth Product 2.0 MHz Va ea 2.5V, V b eb 2.5V VOS Input Offset Voltage g20 mV (Max) IB Input Bias Current 10 pA CMRR Common Mode Rejection Test Input Range e 55 dBRatio (Op Amp Ý2 Only) b0.9V to a0.5V VO Output Voltage Swing R L e 5k X 1.3 / 1.1 V (Min) b1.8 / b1.6 V (Max) ISC Output Short Circuit Source 42 mA Current (Note 13) Sink 0.9 mA SR Slew Rate 3 V/ ms AVOL DC Open Loop Gain 74 dB (Min) GBW Gain Bandwidth Product 2.0 MHz Logic Input-Output Characteristics The following specifications apply for V b e 0V (Note 15), L.Sh e 0V unless otherwise specified. Boldface limits apply for T A e TJ e TMIN to T MAX; all other limits T A e TJ e 25§C. Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) TTL CLOCK INPUT, CLK R PIN (NOTE 14) VIH TTL Input Logical ‘‘1’’ V a ea 5V, V b eb 5V 2.0 V (Min) VIL Voltage Logical ‘‘0’’ 0.8 V (Max) VIH CLK R Input Logical ‘‘1’’ V a ea 2.5V, V b eb 2.5V 2.0 V (Min) VIL Voltage Logical ‘‘0’’ 0.6 / 0.4 V (Max) Maximum Leakage 2.0 mACurrent at CLK R http:/ /www.national.com 4

Logic Input-Output Characteristics (Continued) The following specifications apply for V b e 0V (Note 15), L.Sh e 0V unless otherwise specified. Boldface limits apply for T A e TJ e TMIN to T MAX; all other limits T A e TJ e 25§C. Symbol Parameter Conditions Typical Limits Units (Note 8) (Note 9) (Limits) SCHMITT TRIGGER VTa Positive Going Input V a e 10V 6.1 / 6.0 V (Min) Threshold Voltage 8.8 / 8.9 V (Max) Va e 5V 3.0 / 2.9 V (Min) 4.3 / 4.4 V (Max) VTb Negative Going Input V a e 10V 1.4 / 1.3 V (Min) Threshold Voltage 3.8 / 3.9 V (Max) Va e 5V 0.7 / 0.6 V (Min) 1.9 / 2.0 V (Max) VTa bVTb Hysteresis V a e 10V 2.3 / 2.1 V (Min) 7.4 / 7.6 V (Max) Va e 5V 1.1 / 0.9 V (Min) 3.6 / 3.8 V (Max) VOH Logical ‘‘1’’ Voltage V a ea 10V 9.1 / 9.0 V (Min) IO eb 10 mA, Pin 11 V a ea 5V 4.6 / 4.5 V (Min) VOL Logical ‘‘0’’ Voltage V a ea 10V 0.9 / 1.0 V (Max) IO eb 10 mA, Pin 11 V a ea 5V 0.4 / 0.5 V (Max) ISOURCE Output Source CLK R to V b Current, Pin 11 V a ea 10V 4.9 / 3.7 mA (Min) Va ea 5V 1.6 / 1.2 mA (Min) ISINK Output Sink CLK R to V a Current, Pin 11 V a ea 10V 4.9 / 3.7 mA (Min) Va ea 5V 1.6 / 1.2 mA (Min) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional. Specified Electrical Characteristics do not apply when operating the device outside its specified conditions. Note 2: All voltages are measured with respect to AGND, unless otherwise specified. Note 3: When the input voltage (V IN) at any pin exceeds the power supply rails (V IN k Vb or V IN l Va) the absolute value of current at that pin should be limited to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries with 5 mA to four. Note 4: The Maximum power dissipation must be derated at elevated temperatures and is dictated by T J Max , iJA, and the ambient temperature T A. The maximum allowable power dissipation is PD e (TJ Max b TA)/iJA or the number given in the absolute ratings, whichever is lower. For this device, T J Max e 125§C, and the typical junction-to-ambient thermal resistance of the LMF60CCN when board mounted is 67 §C/W. For the LMF60CIJ this number decreases to 62 §C/W. For the LMF60CIWM, iJA e 78§C/W. Note 5: Human body model: 100 pF discharged through a 1.5 k X resistor. Note 6: See AN450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or the section titled ‘‘Surface Mount’’ found in any current Linear Databook for other methods of soldering surface mount devices. Note 7: The specifications given are for a clock frequency (f CLK) of 500 kHz at a5V and 250 kHz at g2.5V. Above this frequency, the cutoff frequency begins to deviate from the specified error band over the temperature range but the filter still maintains its amplitude characteristics. See application hints. Note 8: Typicals are at 25 §C and represent the most likely parametric norm. Note 9: Guaranteed to National’s Average Outgoing Quality Level (AOQL). Note 10: The cutoff frequency of the filter is defined as the frequency where the magnitude response is 3.01 dB less than the DC gain of the filter. Note 11: The short circuit source current is measured by forcing the output to its maximum positive swing and then shorting that output to the negative supply. The short circuit sink current is measured by forcing the output being tested to its maximum negative voltage and then shorting that output to the positive supply. These are worst case conditions. Note 12: For g5V supplies the dynamic range is referenced to 2.62 V rms (3.7V peak), where the wideband noise over a 20 kHz bandwidth is typically 100 mV. For g2.5V supplies the dynamic range is referenced to 0.849 V rms (1.2V peak), where the wideband noise over a 20 kHz bandwidth is typically 75 mVrms. Note 13: The filter’s magnitude response is tested at the cutoff frequency, f C,a tf IN e 2f C, and at these two additional frequencies. Note 14: The LMF60 is operated with symmetrical supplies and L.Sh is tied to GND. Note 15: For simplicity all the logic levels (except for the TTL input logic levels) have been referenced to V b e 0V. The logic levels will scale accordingly for g5V and g2.5V supplies. Note 16: The nominal ratio of the clock frequency to the low-pass cutoff frequency is internally set to 50-to-1 (LMF60-50) or 100-to-1 (LMF60-100). http:/ /www.national.com5

Typical Performance Characteristics vs Power Supply Voltage fCLK/fC Deviation vs Temperature fCLK/fC Deviation vs Clock Frequency fCLK/fC Deviation vs Power Supply Voltage fCLK/fC Deviation vs Temperature fCLK/fC Deviation vs Clock Frequency fCLK/fC Deviation vs Power Supply Voltage DC Gain Deviation vs Temperature DC Gain Deviation vs Clock Frequency DC Gain Deviation TL/H/9294–3 http:/ /www.national.com 6

Typical Performance Characteristics (Continued) vs Power Supply Voltage DC Gain Deviation vs Temperature DC Gain Deviation vs Clock Frequency DC Gain Deviation vs Power Supply Voltage DC Offset Voltage Deviation vs Power Supply Voltage Power Supply Current vs Temperature Power Supply Current vs Power Supply Voltage Positive Voltage Swing vs Power Supply Voltage Negative Voltage Swing vs Temperature Positive Voltage Swing TL/H/9294–4 http:/ /www.national.com7

Typical Performance Characteristics (Continued) vs Temperature Negative Voltage Swing vs Power Supply Voltage CLK R Trigger Threshold vs Power Supply Voltage Schmitt Trigger Threshold to Op Amps Crosstalk from Filter Op Amp to Filter Crosstalk from Either Voltage of Op Amps Equivalent Input Noise TL/H/9294–5 http:/ /www.national.com 8

TL/H/9294–6 From Either Op-Amp to Filter Output TL/H/9294–7 Pin Description (Pin Numbers) Pin Description FILTER OUT (3) The output of the lowpass filter will typi- cally swing to within 1V of each supply rail. FILTER IN (8) The input to the lowpass filter. To mini- mize gain errors the source impedance that drives this input should be less than 2k (See Section 1.4). For single supply operation the input signal must be bi- ased to mid-supply or AC coupled. V OSADJ (7) This pin is used to adjust the DC offset of the filter output; if not used it must be tied to the AGND potential. (See Section 1.3) AGND (5) The analog ground pin. This pin sets the DC bias level for the filter section and the noninverting input of Op-Amp and must be tied to the system ground for split supply operation or to mid-sup- ply for single supply operation (See Sec- tion 1.2). When tied to mid-supply this pin should be well bypassed. V O1(4), V O1 is the output and INV1 is the invert- INV1 (13) ing input of Op-Amp Ý1. The non-invert- ing input of this Op-Amp is internally connected to the AGND pin. V O2(2), V O2 is the output, INV2 is the inverting INV2 (14), input, and NINV2 is the non-inverting in- NINV2 (1) put of Op-Amp Ý2. Va (6), V b (10) The positive and negative supply pins. The total power supply range is 4V to 14V. Decoupling these pins with 0.1 mF capacitors is highly recommended. Pin Description CLK IN (9) A CMOS Schmitt-trigger input to be used with an external CMOS logic level clock. Also used for self-clocking Schmitt-trigger oscillator (See Section 1.1). CLK R (11) A TTL logic level clock input when in split supply operation ( g2V to g7V) and L. Sh tied to system ground. This pin be- comes a low impedance output when L.Sh is tied to V b. Also used in conjunc- tion with the CLK IN pin for self clocking Schmitt-trigger oscillator (See Section 1.1). L.Sh (12) Level shift pin, selects the logic thresh- old levels for the desired clock. When tied to V b it enables an internal TRI- STATEÉ buffer stage between the Schmitt trigger and the internal clock level shift stage thus enabling the CLK IN Schmitt-trigger input and making the CLK R pin a low impedance output. When the voltage level at this input ex- ceeds [25% (V a b Vb) a Vb] the in- ternal TRI-STATE É buffer is disabled al- lowing the CLK R pin to become the clock input for the internal clock level shift stage. The CLK R threshold level is now 2V above the voltage applied to the L.Sh pin. Driving the CLK R pin with TTL logic levels can be accomplished through the use of split supplies and by tying the L.Sh pin to system ground. http:/ /www.national.com9

1.0 LMF60 Application Hints

or 50:1) of the clock frequency supplied to the lowpass filter. (for a detailed discussion see Input Impedance section). tive element and thus the time constant of the integrators. ratio of the input and feedback capacitors in the integrators.

1.1 CLOCK INPUTS

well as on the resistor/capacitor tolerance (See Figure 1 ). the Pin Description for L.Sh pin).

1.2 POWER SUPPLY BIASING

clock logic levels can be used. FIGURE 1. Schmitt Trigger R/C Oscillator

1.0 LMF60 Application Hints (Continued)

If the LMF60-50 or the LMF60-100 were set up for a cutoff frequency of 10 kHz the input impedance would be: RIN e 1 c 1010 10 kHz e 1M X In this example with a source impedance of 10k the overall gain, if the LMF60 had an ideal gain of 1 (0 dB) would be: AV e 1M X 10 k X a 1M X e 0.99009 ( b86.4 mdB) Since the maximum overall gain error for the LMF60 is a0.1 dB, b0.3 dB with a R S s 2k X the actual gain error for this case would be a0.21 dB to b0.39 dB.

1.5 CUTOFF FREQUENCY RANGE

The filter’s cutoff frequency (f C) has a lower limit caused by leakage currents through the internal switches discharging the stored charge on the capacitors. At lower clock frequen- cies these leakage currents can cause millivolts of error, for example: f CLK e 100 Hz, I LEAKAGE e 1 pA, C e 1p F V e 1p A 1 pF (100 Hz) e 10 mV The propagation delay in the logic and the settling time re- quired to acquire a new voltage level on the capacitors in- creases as the LMF60 power supply voltage decreases. This causes a shift in the f CLK/fC ratio which will become noticeable when the clock frequency exceeds 500 kHz. The amplitude characteristic will stay within tolerance until f CLK exceeds 750 kHz and will peak at about 0.4 dB at the cutoff frequency wit h a 2 MHz clock. The response of the LMF60 is still a reasonable approximation of the ideal Butterworth lowpass characteristic as can be seen in Figure 7 . TL/H/9294–17 FIGURE 7a. LMF60-100 g5V Supplies Amplitude Response TL/H/9294–18 FIGURE 7b. LMF60-50 g5V Supplies Amplitude Response TL/H/9294–19 FIGURE 7c. LMF60-100 g2.5V Supplies Amplitude Response TL/H/9294–20 FIGURE 7d. LMF60-50 g2.5V Supplies Amplitude Response http:/ /www.national.com11

FIGURE 2. Dual Supply Operation LMF60 Driven with FIGURE 3. Dual Supply Operation FIGURE 4. Single Supply Operation

FIGURE 5. V OS Adjust Schemes

1.3 OFFSET ADJUST

ended supply operation or ground for split supply operation. This pin sets the zero reference for the output of the filter. for AC-coupled signals and signals biased at AGND.

1.4 INPUT IMPEDANCE

FIGURE 6. LMF60 Filter Input

2.0 Designing with the LMF60

where n e 6 (the order of the filter).

2.1 A LOWPASS DESIGN EXAMPLE

LMF60 stage can be utilized. FIGURE 8. Design Example Magnitude Response where f C e fCLK/50 or f CLK/100.

2.2 CASCADING LMF60s

where n e 6 (the order of each filter). to the one shown in Section 2.1.

2.3 IMPLEMENTING A ‘‘NOTCH’’ FILTER WITH THE

2.0 Designing with the LMF60 (Continued)

FIGURE 9. Cascading Two LMF60s FIGURE 10a. One LMF60-50 vs.

TL/H/9294–25 FIGURE 11a. ‘‘Notch’’ Filter TL/H/9294–26 FIGURE 11b. LMF60-50 ‘‘Notch’’ Filter Amplitude Response http:/ /www.national.com 16

2.4 CHANGING CLOCK FREQUENCY

frequency changes to 50 kHz yielding 1 kHz f C. FIGURE 12. LMF60-50 Abrupt Clock Frequency Change

2.5 ALIASING CONSIDERATIONS

FIGURE 13. LMF60-50 Step Input Response, fs/2 a f causes an output signal to appear at f s/2 b f. FIGURE 14. The phenomenon of aliasing in sampled-data systems. An input signal whose frequency at a frequency lower than one-half the sampling frequency. In the LMF60, f s e fCLK.

H0 e R4/R3 (H0 e 1 when R 3 and R 4 are omitted and V O2 is directly tied to INV2). Note: The parallel combination of R 4 (if used), R 1 and R 2 should be t 10 k X in order not to load Op-Amp Ý2. FIGURE 15. Second Order Butterworth Anti-Aliasing Filter Using Uncommitted Op-Amp Ý2

Physical Dimensions inches (millimeters) unless otherwise noted Cavity Dual-In-Line Package (J) Order Number LMF60CMJ-50, LMF60CMJ50/883, LMF60CMJ-100 or LMF60CMJ100/883 Small Outline Wide Body (M) Order Number LMF60CIWM-50 or LMF60CIWM-100 http:/ /www.national.com19

LMF60 High Performance 6th-Order Switched Capacitor Butterworth Lowpass Filter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Lit. Ý 108461 Molded Dual-In-Line Package (N) Order Number LMF60CIN-50 or LMF60CIN-100 LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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