LMC7101QM5/NOPB

LMC7101BIM5 TI1 | Alldatasheet

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 LMC7101/LMC7101QTinyLowPowerOperationalAmplifierwithRail-to-RailInputand Output Check forSamples: LMC7101 ,LMC7101Q 1FEATURES • Rail-to-RailInputand Output

• Temperature Range –40°C to125°C 2• Tiny5-PinSOT-23 Package Saves (LMC7101Q)Space — TypicalCircuitLayouts Take Halfthe Space of8-PinSOIC Designs APPLICATIONS• Guaranteed Specs at2.7V,3V,5V,15V Supplies • MobileCommunications
• TypicalSupply Current0.5mA at5V • Notebooks and PDAs
• TypicalTotalHarmonic Distortionof0.01% at • BatteryPowered Products 5V • Sensor Interface
• 1.0MHz Gain-Bandwidth • Automotive Applications(LMC7101Q)
• SimilartoPopularLMC6482/LMC6484

DESCRIPTION

The LMC7101 isa highperformanceCMOS operationalamplifieravailableinthe space saving5-PinSOT-23 Tinypackage.Thismakes theLMC7101 idealforspace and weightcriticaldesigns.The performanceissimilar toa singleamplifieroftheLMC6482/LMC6484 type,withrail-to-railinputand output,highopen loopgain,low distortion,and lowsupplycurrents. The main benefitsoftheTinypackage are most apparentinsmallportableelectronicdevices,such as mobile phones,pagers,notebookcomputers,personaldigitalassistants,and PCMCIA cards.The tinyamplifierscan be placedon a boardwhere theyareneeded,simplifyingboardlayout. Connection Diagram Figure1. 5-PinSOT-23 Top View These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 1999–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com AbsoluteMaximum Ratings(1)(2) ESD Tolerance(3) Human Body Model 1000V Machine Model 200V Charged DeviceModel 1000V DifferenceInputVoltage ±SupplyVoltage VoltageatInput/OutputPin (V+)+ 0.3V,(V−)− 0.3V SupplyVoltage(V+ − V−) 16V CurrentatInputPin ±5 mA CurrentatOutputPin (4) ±35 mA CurrentatPower SupplyPin 35 mA Lead Temp. (Soldering,10 sec.) 260°C StorageTemperatureRange −65°C to+150°C JunctionTemperature(5) 150°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotguaranteed.Forguaranteedspecificationsand thetest conditions,see theElectricalCharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. (3) Human Body Model is1.5kΩ inserieswith100 pF. (4) Appliestobothsingle-supplyand split-supplyoperation.Continuousshortoperationatelevatedambienttemperaturecan resultin exceedingthemaximum allowedjunctiontemperatureat150°C. (5) The maximum power dissipationisa functionofTJ(MAX),θJA and TA.The maximum allowablepower dissipationatany ambient temperatureisPD = (TJ(MAX) − TA)/θJA.Allnumbers applyforpackagessoldereddirectlyintoa PC board. Recommended OperatingConditions(1) SupplyVoltage 2.7V≤ V+ ≤ 15.5V TemperatureRange LMC7101AI, LMC7101BI −40°C to85°C LMC7101Q −40°C to125°C ThermalResistance(θJA) 5-PinSOT-23 325°C/W (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotguaranteed.Forguaranteedspecificationsand thetest conditions,see theElectricalCharacteristics. 2.7VElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 2.7V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω.Boldface limitsapplyatthetemperatureextremes. LMC7101AI LMC7101BI LMC7101Q Symbol Parameter Conditions Typ (1) Limit Limit Limit Units (2) (2) (2)(3) mVVOS InputOffsetVoltageAverageDrift V+ = 2.7V 0.11 6 9 9 max TCV OS InputOffsetVoltage 1 μV/°C IB InputBiasCurrent 1.0 64 64 1000 pA max IOS InputOffsetCurrent 0.5 32 32 2000 pA max R IN InputResistance >1 TeraΩ 0V ≤ VCM ≤ 2.7VCMRR Common-Mode RejectionRatio 70 55 50 50 dB minV+ = 2.7V (1) TypicalValuesrepresentthemost likelyparametricnorm. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. (3) When operatedattemperaturebetween −40°C and 85°C, theLMC7101Q willmeet LMC7101BI specifications.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 2.7VElectricalCharacteristics(continued) Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 2.7V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω.Boldface limitsapplyatthetemperatureextremes. LMC7101AI LMC7101BI LMC7101Q Symbol Parameter Conditions Typ (1) Limit Limit Limit Units (2) (2) (2)(3) V+ = 1.35Vto1.65V PSRR Power SupplyRejectionRatio V− = −1.35Vto−1.65V 60 50 45 45 dB min VCM = 0 C IN Common-Mode InputCapacitance 3 pF 2.45 2.15 2.15 2.15 V min R L = 2 kΩ 0.25 0.5 0.5 0.5 V max VO OutputSwing 2.68 2.64 2.64 2.64 V min R L = 10 kΩ 0.025 0.06 0.06 0.06 V max SR Slew Rate (4) 0.7 V/μs GBW Gain-BandwidthProduct 0.6 MHz (4) V+ = 15V.Connectedas a voltagefollowerwitha 10V stepinput.Number specifiedistheslowerofthepositiveand negativeslewrates. R L = 100 kΩ connectedto7.5V.Amp excitedwith1 kHz toproduceVO = 10 VPP . 3V DC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 3V,V− = 0V,VCM = 1.5V,VO = V+/2and R L = 1 M Ω. Boldfacelimitsapplyatthetemperatureextremes. LMC7101AI LMC7101BI LMC7101QTypSymbol Parameter Conditions Limit Limit Limit Units(1) (2) (2) (2)(3) 4 7 mVVOS InputOffsetVoltage 0.11 76 9 max TCV OS InputOffsetVoltageAverageDrift 1 μV/°C IB InputCurrent 1.0 64 64 1000 pA max IOS InputOffsetCurrent 0.5 32 32 2000 pA max R IN InputResistance >1 TeraΩ 0V ≤ VCM ≤ 3VCMRR Common-Mode RejectionRatio 74 64 60 60 db minV+ = 3V V+ = 1.5Vto7.5V PSRR Power SupplyRejectionRatio V− = −1.5Vto−7.5V 80 68 60 60 dBmin VO = VCM = 0 C IN Common-Mode InputCapacitance 3 pF 2.8 2.6 2.6 2.6 V min R L = 2 kΩ 0.2 0.4 0.4 0.4 V max VO OutputSwing 2.7 2.5 2.5 2.5 V min R L = 600Ω 0.37 0.6 0.6 0.6 V max (1) TypicalValuesrepresentthemost likelyparametricnorm. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. (3) When operatedattemperaturebetween −40°C and 85°C, theLMC7101Q willmeet LMC7101BI specifications. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 5V DC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 5V,V− = 0V,VCM = 1.5V,VO = V+/2and R L = 1 M Ω. Boldfacelimitsapplyatthetemperatureextremes. LMC7101AI LMC7101BI LMC7101QTypSymbol Parameter Conditions Limit Limit Limit Units(1) (2) (2) (2)(3) 0.11 3 7 7 mVVOS InputOffsetVoltage V+ = 5V 5 9 9 max TCV OS InputOffsetVoltageAverageDrift 1.0 μV/°C IB InputCurrent 1 64 64 1000 pA max IOS InputOffsetCurrent 0.5 32 32 2000 pA max R IN InputResistance >1 TeraΩ 0V ≤ VCM ≤ 5V 82 65 60 60 db min CMRR Common-Mode RejectionRatio LMC7101Q @ 125°C 60 55 55 0.2V≤ VCM ≤ 4.8V PositivePower SupplyRejection V+ = 5V to15V 82 70 65 65 dB min+PSRR Ratio V− = 0V,VO = 1.5V 65 62 62 NegativePower SupplyRejection V− = −5V to−15V 82 70 65 65 dB min−PSRR Ratio V+ = 0V,VO = −1.5V 65 62 62 5.00 5.00 4.8 C IN Common-Mode InputCapacitance 3 pF 0.1 0.18 0.18 0.18 V max 0.24 0.24 0.28 VO OutputSwing 0.3 0.5 0.5 0.5 V max 0.65 0.65 0.8 16 16 16 mA minVO = 0V 24 Sourcing 24 11 11 9 ISC OutputShortCircuitCurrent 11 11 11 mA minVO = 5V Sinking 19 7.5 7.5 5.8 (1) TypicalValuesrepresentthemost likelyparametricnorm. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. (3) When operatedattemperaturebetween −40°C and 85°C, theLMC7101Q willmeet LMC7101BI specifications. 5V AC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 5V,V− = 0V,VCM = 1.5V,VO = V+/2and R L = 1 M Ω. Boldfacelimitsapplyatthetemperatureextremes. LMC7101AI LMC7101BITypSymbol Parameter Conditions Limit Limit Units(1) (2) (2) f= 10 kHz,AV = −2THD TotalHarmonicDistortion 0.01 %R L = 10 kΩ,VO = 4.0VPP SR Slew Rate 1.0 V/μs GBW Gain BandwidthProduct 1.0 MHz (1) TypicalValuesrepresentthemost likelyparametricnorm. (2) Alllimitsareguaranteedby testingorstatisticalanalysis.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 15V DC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 15V,V− = 0V,VCM = 1.5V,VO = V+/2and R L = 1 M Ω. Boldfacelimitsapplyatthetemperatureextremes. LMC7101AI LMC7101BI LMC7101QTypSymbol Parameter Conditions Limit Limit Limit Units(1) (2) (2) (2)(3) mVVOS InputOffsetVoltage 0.11 max TCV OS InputOffsetVoltageAverageDrift 1.0 μV/°C IB InputCurrent 1.0 64 64 1000 pA max IOS InputOffsetCurrent 0.5 32 32 2000 pA max R IN InputResistance >1 TeraΩ 0V ≤ VCM ≤ 15V 82 70 65 65 dB min CMRR Common-Mode RejectionRatio LMC7101Q @ °125C 65 60 60 0.2V≤ VCM ≤ 14.8V PositivePower SupplyRejection V+ = 5V to15V 82 70 65 65 dB min+PSRR Ratio V− = 0V,VO = 1.5V 65 62 62 NegativePower SupplyRejection V− = −5V to−15V 82 70 65 65 dB min−PSRR Ratio V+ = 0V,VO = −1.5V 65 62 62 15.00 15.00 14.8 340 80 80 80Sourcing 40 40 30 R L = 2 kΩ V/mV 24 15 15 15LargeSignalVoltageGain SinkingAV 10 10 4(4) Sourcing 300 34 34 34 R L = 600Ω V/mV Sinking 15 6 6 6 C IN InputCapacitance 3 pF V+ = 15V 14.7 14.4 14.4 14.4 V min R L = 2 kΩ 14.2 14.2 14.2 0.16 0.32 0.32 0.32 V max 0.45 0.45 0.45 VO OutputSwing V+ = 15V 14.1 13.4 13.4 13.4 V min R L = 600Ω 13.0 13.0 12.85 0.5 1.0 1.0 1.0 V max 1.3 1.3 1.5 50 30 30 30VO = 0V Sourcing 20 20 20OutputShortCircuitCurrentISC mA min(5) 50 30 30 30VO = 12V Sinking 20 20 20 (1) TypicalValuesrepresentthemost likelyparametricnorm. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. (3) When operatedattemperaturebetween −40°C and 85°C, theLMC7101Q willmeet LMC7101BI specifications. (5) Do notshortcircuitoutputtoV+ when V+ isgreaterthan12V orreliabilitywillbe adverselyaffected. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 15V AC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 15V,V− = 0V,VCM = 1.5V,VO = V+/2and R L = 1 M Ω. Boldfacelimitsapplyatthetemperatureextremes. LMC7101AI LMC7101BI LMC7101QTypSymbol Parameter Conditions Limit Limit Limit Units(1) (2) (2) (2)(3) GBW Gain-BandwidthProduct V+ = 15V 1.1 MHz φm Phase Margin 45 deg G m Gain Margin 10 dB en Input-ReferredVoltageNoise f= 1 kHz,VCM = 1V 37 In Input-ReferredCurrentNoise f= 1 kHz 1.5 f= 10 kHz,AV = −2THD TotalHarmonicDistortion 0.01 %R L = 10 kΩ,VO = 8.5VPP (1) TypicalValuesrepresentthemost likelyparametricnorm. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. (3) When operatedattemperaturebetween −40°C and 85°C, theLMC7101Q willmeet LMC7101BI specifications. (4) V+ = 15V.Connectedas a voltagefollowerwitha 10V stepinput.Number specifiedistheslowerofthepositiveand negativeslewrates. R L = 100 kΩ connectedto7.5V.Amp excitedwith1 kHz toproduceVO = 10 VPP .

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 2.7VTypicalPerformance Characteristics V+ = 2.7V,V− = 0V,TA = 25°C, unlessotherwisespecified. Open Loop Frequency Response InputVoltagevs.Output Voltage Figure2. Figure3. Gain and Phase vs.CapacitanceLoad Gain and Phase vs.CapacitanceLoad Figure4. Figure5. dV OS vs.Supply Voltage dV OS vs.Common Mode Voltage Figure6. Figure7. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 2.7VTypicalPerformance Characteristics(continued) V+ = 2.7V,V− = 0V,TA = 25°C, unlessotherwisespecified. SinkingCurrentvs.Output Voltage Sourcing Currentvs.Output Voltage Figure8. Figure9.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 3V TypicalPerformance Characteristics V+ = 3V,V− = 0V,TA = 25°C, unlessotherwisespecified. Open Loop Frequency Response InputVoltagevs.Output Voltage Figure10. Figure11. InputVoltageNoise vs.InputVoltage Sourcing Currentvs.Output Voltage Figure12. Figure13. SinkingCurrentvs.Output Voltage CMRR vs.InputVoltage Figure14. Figure15. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 5V TypicalPerformance Characteristics V+ = 5V,V− = 0V,TA = 25°C, unlessotherwisespecified. Open Loop Frequency Response InputVoltagevs.Output Voltage Figure16. Figure17. InputVoltageNoise vs.InputVoltage Sourcing Currentvs,Output Voltage Figure18. Figure19. SinkingCurrentvs.Output Voltage CMRR vs.InputVoltage Figure20. Figure21.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 15V TypicalPerformance Characteristics V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. Open Loop Frequency Response InputVoltagevs.Output Voltage Figure22. Figure23. InputVoltageNoise vs.InputVoltage Sourcing Currentvs.Output Voltage Figure24. Figure25. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 15V TypicalPerformance Characteristics(continued) V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. SinkingCurrentvs.Output Voltage CMRR vs.InputVoltage Figure26. Figure27. Supply Currentvs.Supply Voltage InputCurrentvs.Temperature Figure28. Figure29. Output VoltageSwing vs.Supply Voltage InputVoltageNoise vs.Frequency Figure30. Figure31.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 15V TypicalPerformance Characteristics(continued) V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. PositivePSRR vs.Frequency NegativePSRR vs.Frequency Figure32. Figure33. CMRR vs.Frequency Open Loop Frequency Response @ −40°C Figure34. Figure35. Open Loop Frequency Response @ 25°C Open Loop Frequency Response @ 85°C Figure36. Figure37. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 15V TypicalPerformance Characteristics(continued) V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. Maximum Output Swing vs.Frequency Gain and Phase vs.CapacitiveLoad Figure38. Figure39. Gain and Phase vs.CapacitiveLoad Output Impedance vs.Frequency Figure40. Figure41. Slew Rate vs.Temperature Slew Rate vs.Supply Voltage Figure42. Figure43.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 15V TypicalPerformance Characteristics(continued) V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. InvertingSmall SignalPulse Response InvertingSmall SignalPulse Response Figure44. Figure45. InvertingSmall SignalPulse Response InvertingLarge SignalPulse Response Figure46. Figure47. InvertingLarge SignalPulse Response InvertingLarge SignalPulse Response Figure48. Figure49. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com 15V TypicalPerformance Characteristics(continued) V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. Non-InvertingSmall SignalPulse Response Non-InvertingSmall SignalPulse Response Figure50. Figure51. Non-InvertingSmall SignalPulse Response Non-InvertingLarge SignalPulse Response Figure52. Figure53. Non-InvertingLarge SignalPulse Response Non-InvertingLarge SignalPulse Response Figure54. Figure55.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 15V TypicalPerformance Characteristics(continued) V+ = +15V, V− = 0V,TA = 25°C, unlessotherwisespecified. Stabilityvs.CapacitiveLoad Stabilityvs.CapacitiveLoad Figure56. Figure57. Stabilityvs.CapacitiveLoad Stabilityvs.CapacitiveLoad Figure58. Figure59. Stabilityvs.CapacitiveLoad Stabilityvs.CapacitiveLoad Figure60. Figure61. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMC7101 LMC7101Q

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APPLICATION INFORMATION

BENEFITS OF THE LMC7101 TINY AMP Size The smallfootprintoftheSOT-23-5 packaged Tinyamp, (0.120x 0.118inches,3.05x 3.00mm) savesspace on printedcircuitboards,and enablethedesignofsmallerelectronicproducts.Because theyare easiertocarry, many customersprefersmallerand lighterproducts. Height The height(0.056inches,1.43mm) oftheTinyamp makes itpossibletouse itinPCMCIA typeIIIcards. SignalIntegrity Signalscan pickup noisebetween thesignalsourceand theamplifier.By usinga physicallysmalleramplifier package,theTinyamp can be placedclosertothesignalsource,reducingnoisepickupand increasingsignal integrity.The Tinyamp can alsobe placednexttothesignaldestination,such as a bufferforthereferenceofan analogtodigitalconverter. SimplifiedBoard Layout The Tinyamp can simplifyboard layoutinseveralways. First,by placingan amp where amps are needed, insteadofroutingsignalstoa dualorquad device,longpc tracesmay be avoided. By usingmultipleTinyamps insteadof dualsor quads,complex signalroutingand possiblycrosstalkcan be reduced. Low THD The highopen loopgainoftheLMC7101 amp allowsittoachieveverylow audiodistortion— typically0.01% at 10 kHz witha 10 kΩ load at 5V supplies.This makes the Tiny an excellentforaudio,modems, and low frequencysignalprocessing. Low Supply Current The typical0.5mA supplycurrentoftheLMC7101 extendsbatterylifeinportableapplications,and may allow thereductionofthesizeofbatteriesinsome applications. Wide VoltageRange The LMC7101 ischaracterizedat15V, 5V and 3V. Performancedataisprovidedatthesepopularvoltages.This wide voltagerange makes theLMC7101 a good choicefordeviceswhere thevoltagemay varyoverthelifeof thebatteries. INPUT COMMON MODE VoltageRange The LMC7101 does not exhibitphase inversionwhen an inputvoltageexceeds the negativesupplyvoltage. Figure62 shows an inputvoltageexceedingbothsupplieswithno resultingphase inversionoftheoutput. The absolutemaximum inputvoltageis 300 mV beyond eitherrailat room temperature.Voltagesgreatly exceedingthismaximum rating,as inFigure63,can cause excessivecurrenttoflowinoroutoftheinputpins, adverselyaffectingreliability.

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LMC7101,LMC7101Q www.ti.com SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 An inputvoltagesignalexceedstheLMC7101 power supplyvoltageswithno outputphase inversion. Figure62. InputVoltage A ±7.5Vinputsignalgreatlyexceedsthe3V supplyinFigure64 causingno phase inversiondue toR I. Figure63. InputSignal Applicationsthatexceed thisratingmust externallylimitthe maximum inputcurrentto ±5 mA withan input resistoras shown inFigure64. Figure64. R I InputCurrentProtectionfor VoltagesExceeding theSupply Voltage RAIL-TO-RAIL OUTPUT The approximateoutputresistanceoftheLMC7101 is180Ω sourcingand 130Ω sinkingatVS = 3V and 110Ω sourcingand 80Ω sinkingatVS = 5V. Usingthecalculatedoutputresistance,maximum outputvoltageswingcan be estimatedas a functionofload. CAPACITIVE LOAD TOLERANCE The LMC7101 can typicallydirectlydrivea 100 pF loadwithVS = 15V atunitygainwithoutoscillating.The unity gainfolloweristhemost sensitiveconfiguration.Directcapacitiveloadingreducesthephase marginofop amps. The combinationoftheop amp's outputimpedance and thecapacitiveloadinducesphase lag.Thisresultsin eitheran underdamped pulseresponseoroscillation. Capacitiveloadcompensationcan be accomplishedusingresistiveisolationas shown inFigure65.Thissimple techniqueisusefulforisolatingthecapacitiveinputofmultiplexersand A/D converters. Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LMC7101 LMC7101Q

LMC7101,LMC7101Q SNOS719F –SEPTEMBER 1999–REVISED MARCH 2013 www.ti.com Figure65. ResistiveIsolation ofa 330 pF CapacitiveLoad COMPENSATING FOR INPUT CAPACITANCE WHEN USING LARGE VALUE FEEDBACK RESISTORS When usingverylargevaluefeedbackresistors,(usually> 500 kΩ)thelargefeedback resistancecan reactwith theinputcapacitancedue totransducers,photodiodes,and circuitboardparasiticstoreducephase margins. The effectofinputcapacitancecan be compensated forby addinga feedbackcapacitor.The feedbackcapacitor (asinFigure66),C f isfirstestimatedby: (1) or R 1 C IN ≤ R 2 C f (2) whichtypicallyprovidessignificantovercompensation. Printedcircuitboardstraycapacitancemay be largerorsmallerthanthatofa breadboard,so theactualoptimum valueforC F may be different.The valuesofC F shouldbe checked on theactualcircuit.(RefertotheLMC660 quad CMOS amplifierdatasheetfora more detaileddiscussion.) Figure66. CancellingtheEffectofInputCapacitance

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REVISION HISTORY

Changes from RevisionE (March 2013)toRevisionF Page Copyright© 1999–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LMC7101 LMC7101Q

www.ti.com 1-Nov-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LMC7101AIM5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 A00A LMC7101AIM5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A00A LMC7101AIM5X NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 A00A LMC7101AIM5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A00A LMC7101BIM5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 A00B LMC7101BIM5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A00B LMC7101BIM5X NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 A00B LMC7101BIM5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 A00B LMC7101QM5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AT6A LMC7101QM5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AT6A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

www.ti.com 1-Nov-2013 Addendum-Page 2 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMC7101AIM5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7101AIM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7101AIM5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7101AIM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7101BIM5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7101BIM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7101BIM5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7101BIM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7101QM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7101QM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 Pack Materials-Page 2

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