LMC6022IM

LMC6022 NSC | Alldatasheet

Document overview

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Technical content

Features

n Specified for 100 kΩ a n d5kΩ loads n High voltage gain: 120 dB n Low offset voltage drift: 2.5 µV/˚C n Ultra low input bias current: 40 fA n Input common-mode range includes V− n Operating range from +5V to +15V supply n Low distortion: 0.01% at 1 kHz n Slew rate: 0.11 V/µs n Micropower operation: 0.5 mW

Applications

n High-impedance buffer or preamplifier n Current-to-voltage converter n Long-term integrator n Sample-and-hold circuit n Peak detector n Medical instrumentation n Industrial controls Connection Diagram

Ordering Information

Small Outline Tape and Reel 8-Pin DIP/SO DS011236-1 Top View November 1994 LMC6022 Low Power CMOS Dual Operational Amplifier © 1999 National Semiconductor Corporation DS011236 www.national.com

Absolute Maximum Ratings(Note 1) Differential Input Voltage ±Supply Voltage Supply Voltage (V+ −V −) 16V Lead Temperature (Soldering, 10 sec.) 260˚C Storage Temperature Range −65˚C to +150˚C Junction Temperature 150˚C ESD Tolerance (Note 4) 1000V Voltage at Output/Input Pin (V Current at Output Pin ±18 mA Current at Power Supply Pin 35 mA Power Dissipation (Note 3) Current at Input Pin ±5m A Output Short Circuit to V− (Note 2) Output Short Circuit to V+ (Note 12) Operating Ratings Temperature Range −40˚C ≤ TJ ≤ +85˚C Supply Voltage Range 4.75V to 15.5V Power Dissipation (Note 10) Thermal Resistance (θ JA), (Note 11) 8-Pin DIP 101˚C/W 8-Pin SO 165˚C/W The following specifications apply for V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V, and RL = 1M unless otherwise noted.Bold- facelimits apply at the temperature extremes; all other limits TJ = 25˚C. Symbol Parameter Conditions Typical (Note 5) LMC6022I UnitsLimit (Note 6) VOS Input Offset Voltage 1 9 mV 11 max ΔVOS /ΔT Input Offset Voltage 2.5 µV/˚C Average Drift IB Input Bias Current 0.04 pA 200 max IOS Input Offset Current 0.01 pA 100 max R IN Input Resistance >1 Tera Ω CMRR Common Mode 0V ≤ VCM ≤ 12V 83 63 dB Rejection Ratio V + = 15V 61 min +PSRR Positive Power Supply 5V ≤ V+ ≤ 15V 83 63 dB Rejection Ratio 61 min −PSRR Negative Power Supply 0V ≤ V− ≤ −10V 94 74 dB Rejection Ratio 73 min VCM Input Common-Mode V + = 5V & 15V −0.4 −0.1 V Voltage Range For CMRR ≥ 50 dB 0 max V+ − 2.5 min AV Large Signal R L = 100 kΩ (Note 7) 1000 200 V/mV Voltage Gain Sourcing 100 min Sinking 500 90 V/mV 40 min R L = 5k Ω (Note 7) 1000 100 V/mV Sourcing 75 min Sinking 250 50 V/mV 20 min www.national.com 2

The following specifications apply for V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V, and RL = 1M unless otherwise noted.Bold- facelimits apply at the temperature extremes; all other limits TJ = 25˚C. Symbol Parameter Conditions Typical (Note 5) LMC6022I UnitsLimit (Note 6) VO Output Voltage Swing V + = 5V 4.987 4.40 V R L = 100 kΩ to 2.5V 4.43 min 0.004 0.06 V 0.09 max V+ = 5V 4.940 4.20 V R L = 5k Ω to 2.5V 4.00 min 0.040 0.25 V 0.35 max V+ = 15V 14.970 14.00 V R L = 100 kΩ to 7.5V 13.90 min 0.007 0.06 V 0.09 max V+ = 15V 14.840 13.70 V R L = 5k Ω to 7.5V 13.50 min 0.110 0.32 V 0.40 max IO Output Current V + = 5V 22 13 mA Sourcing, VO = 0V 9 min Sinking, VO = 5V 21 13 mA (Note 2) 9 min V+ = 15V 40 23 mA Sourcing, VO = 0V 15 min Sinking, VO = 13V 39 23 mA (Note 12) 15 min IS Supply Current Both Amplifiers 86 140 µA VO = 1.5V 165 max www.national.com3

The following specifications apply for V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V, and RL = 1M unless other otherwise noted. Boldfacelimits apply at the temperature extremes; all other limits TJ = 25˚C. Symbol Parameter Conditions Typical (Note 5) LMC6022I UnitsLimit (Note 6) SR Slew Rate (Note 8) 0.11 0.05 V/µs 0.03 min GBW Gain-Bandwidth Product 0.35 MHz φ M Phase Margin 50 Deg G M Gain Margin 17 dB Amp-to-Amp Isolation (Note 9) 130 dB e n Input-Referred Voltage Noise F = 1 kHz 42 in Input-Referred Current Noise F = 1 kHz 0.0002 Note 1:Absolute Maximum Ratings indicate limits beyond which damage to component may occur. Operating Ratings indicate conditions for which the device is in- tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2:Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of±30 mA over long term may adversely affect reliability. Note 3:The maximum power dissipation is a function of TJ(max),θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) −T A)/θJA. Note 4:Human body model, 100 pF discharged through a 1.5 kΩ resistor. Note 5:Typical values represent the most likely parametric norm. Note 6:All limits are guaranteed by testing or correlation. Note 8:V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 9:Input referred. V+ = 15V and RL = 100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce VO = 13 VPP . Note 10:For operating at elevated temperatures the device must be derated based on the thermal resistanceθJA with PD = (TJ−TA)/θJA. Note 11:All numbers apply for packages soldered directly into a PC board. Note 12:Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected. www.national.com 4

Typical Performance CharacteristicsVS = ±7.5V, TA = 25˚C unless otherwise specified Supply Current vs Supply Voltage DS011236-27 Input Bias Current vs Temperature DS011236-28 Input Common-Mode Voltage Range vs Temperature DS011236-29 Output Characteristics Current Sinking DS011236-30 Output Characteristics Current Sourcing DS011236-31 Input Voltage Noise vs Frequency DS011236-32 Crosstalk Rejection vs Frequency DS011236-33 CMRR vs Frequency DS011236-34 CMRR vs Temperature DS011236-35 www.national.com5

Typical Performance CharacteristicsVS = ±7.5V, TA = 25˚C unless otherwise specified (Continued) Power Supply Rejection Ratio vs Frequency DS011236-36 Open-Loop Voltage Gain vs Temperature DS011236-37 Open-Loop Frequency Response DS011236-38 Gain and Phase Responses vs Load Capacitance DS011236-39 Gain and Phase Responses vs Temperature DS011236-40 Gain Error OS vs VOUT ) DS011236-41 Non-Inverting Slew Rate vs Temperature DS011236-42 Inverting Slew Rate vs Temperature DS011236-43 Large-Signal Pulse Non-Inverting Response V = +1) DS011236-44 www.national.com 6

these tasks now fall to the integrator. FIGURE 1. LMC6022 Circuit Topology (Each Amplifier)

Typical Single-Supply Applications(V+ = 5.0 VDC ) (Continued) Low-Leakage Sample-and-Hold DS011236-17 Instrumentation Amplifier DS011236-18 If R1= R5, R3 = R6, and R4= R7; Then ∴ AV ≈ 100 for circuit shown For good CMRR over temperature, low drift resistors should be used. Matching of R3 to R6 and R4 to R7 affects CMRR. Gain may be adjusted through R2. CMRR may be adjusted through R7. www.national.com11

Typical Single-Supply Applications (V+ = 5.0 VDC ) (Continued) This circuit, as shown, oscillates at 2.0 kHz with a peak-to-peak output swing of 4.5V. Sine-Wave Oscillator DS011236-19 Oscillator frequency is determined by R1, R2, C1, and C2: fOSC = 1/2πRC where R = R1 = R2 and C = C1 = C2.

1 Hz Square-Wave Oscillator

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Typical Single-Supply Applications(V+ = 5.0 VDC ) (Continued)

10 Hz Bandpass Filter

fO = 10 Hz Q = 2.1 Gain = −8.8

10 Hz High-Pass Filter (2 dB Dip)

fc = 10 Hz d = 0.895 Gain = 1

1 Hz Low-Pass Filter (Maximally Flat, Dual Supply

Only) DS011236-24 High Gain Amplifier with Offset Voltage Reduction DS011236-25 Gain = −46.8 Output offset voltage reduced to the level of the input offset voltage of the bottom amplifier (typically 1 mV), referred to VBIAS. www.national.com13

Physical Dimensionsinches (millimeters) unless otherwise noted 8-Pin Small Outline Molded Package (M) Order Number LMC6022IM 8-Pin Molded Dual-In-Line Package (N) Order Number LMC6022IN www.national.com15

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE- VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI- CONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or sys- tems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose fail- ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 LMC6022 Low Power CMOS Dual Operational Amplifier National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.