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/cb1VIN VOUT LMC6001 Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community LMC6001 SNOS694I –MARCH 1995–REVISED SEPTEMBER 2015 LMC6001Ultra,Ultra-LowInputCurrentAmplifier To avoid long turnon settling times common in other1 Features low input current op amps, the LMC6001A is tested 1• (Maximum Limit, 25°C Unless Otherwise Noted) three times in the first minute of operation. Even units
- Input Current (100% Tested): 25 fA that meet the 25-fA limit are rejected if they drift.
- Input Current Over Temperature: 2 pA Because of the ultra-low input current noise of 0.13
- Low Power: 750 μA fA/√Hz, the LMC6001 can provide almost noiseless amplification of high resistance signal sources.• Low VOS: 350 μV Adding only 1 dB at 100 kΩ, 0.1 dB at 1 MΩ and 0.01• Low Noise: 22 nV/√Hz at 1 kHz Typical dB or less from 10 MΩ to 2,000 MΩ, the LMC6001 is an almost noiseless amplifier.2 Applications The LMC6001 is ideally suited for electrometer• Electrometer Amplifiers applications requiring ultra-low input leakage such as
- Photodiode Preamplifiers sensitive photodetection transimpedance amplifiers and sensor amplifiers. Because input referred noise is• Ion Detectors only 22 nV/√Hz, the LMC6001 can achieve higher• A.T.E. Leakage Testing signal to noise ratio than JFET input type electrometer amplifiers. Other applications of the3 Description LMC6001 include long interval integrators, ultra-high Featuring 100% tested input currents of 25 fA input impedance instrumentation amplifiers, and maximum, low operating power, and ESD protection sensitive electrical-field measurement circuits. of 2000 V, the LMC6001 device achieves a new industry benchmark for low input current operational Device Information(1) amplifiers. By tightly controlling the molding PART NUMBER PACKAGE BODY SIZE (NOM) compound, Texas Instruments is able to offer this PDIP (8) 9.81 mm × 6.35 mmultra-low input current in a lower cost molded LMC6001 TO-99 (8) 9.08 mm × 9.08 mmpackage. (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SNOS694I –MARCH 1995–REVISED SEPTEMBER 2015 www.ti.com Table of Contents
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision H (March 2013) to Revision I Page
- Added Pin Functions table ESD Ratings table, Recommended Operating Conditions table, Thermal Information table, Timing Requirements table, Switching Characteristics table, Feature Description section, Device Functional Modes, Parameter Measurement Information section, Detailed Description section, Register Maps section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Changes from Revision F (March 2013) to Revision H Page
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5 Pin Configuration and Functions
P Package LMC Package8-Pin PDIP 8-Pin TO-99Top View Top View Pin Functions PIN I/O DESCRIPTION NAME PDIP NO. TO-99 NO. CAN — 8 — No internal connection; connected to the external casing. +IN 3 3 I Noninverting Input –IN 2 2 I Inverting Input NC 1, 5, 8 1, 5 — No connection OUTPUT 6 6 O Output V+ 7 7 — Positive (higher) power supply V– 4 4 — Negative (lower) power supply
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)(2) MIN MAX Unit Differential Input Voltage ±Supply Voltage Voltage at Input/Output Pin (V+) + 0.3 (V−) − 0.3 V Supply Voltage (V+ − V−) −0.3 +16 V Output Short Circuit to V+ See (3)(4) Output Short Circuit to V− See (3) Lead Temperature (Soldering, 10 Sec.) 260 °C Junction Temperature 150 °C Current at Input Pin ±10 mA Current at Output Pin ±30 mA Current at Power Supply Pin 40 mA Storage Temperature, Tstg −65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability. (4) Do not connect the output to V+, when V+ is greater than 13 V or reliability will be adversely affected. Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMC6001
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6.2 ESD Ratings
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000 V (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) Human body model, 1.5 kΩ in series with 100 pF.
6.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted). MIN MAX UNIT VSS Supply input voltage 4.5 15.5 V TJ Operating junction temperature –40 85 °C
6.4 Thermal Information
THERMAL METRIC(1) P (PDIP) LMC (TO-99) UNIT
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 100 145 °C/W RθJC(top) Junction-to-case (top) thermal resistance — 45 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 DC Electrical Characteristics for LMC6001AI
Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. LMC6001AI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 10 25Either Input, VCM = 0 V,IB Input Current VS = ±5 V At the temperature extremes 2000 fA 5Input OffsetIOS Current At the temperature extremes 1000 0.7 At the temperature extremes 1Input OffsetVOS mVVoltage 10 VS = ±5 V, VCM = 0 V At the temperature extremes 1.35 Input OffsetTCVOS 2.5 μV/°CVoltage Drift Input TΩRIN >1Resistance Common Mode 0 V ≤ VCM ≤ 7.5 V 75 83 CMRR Rejection Ratio V+ = 10 V At the temperature extremes 72 Positive Power 73 83 +PSRR Supply 5 V ≤ V+ ≤ 15 V dBAt the temperature extremes 70Rejection Ratio Negative 80 94 −PSRR Power Supply 0 V ≥ V− ≥ −10 V At the temperature extremes 77Rejection Ratio 400 1400 Sourcing, RL = 2 kΩ(3) 300Large SignalAV V/mVVoltage Gain 180 350 Sinking, RL = 2 kΩ(3) At the temperature extremes 100 (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm.
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www.ti.com SNOS694I –MARCH 1995–REVISED SEPTEMBER 2015 Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. LMC6001AI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) –0.4 –0.1 VCM Low At the temperature 0extremesInput Common- V+ = 5 V and 15 V ForVCM VMode Voltage CMRR ≥ 60 dB V+ − 2.3 V+ − 1.9 VCM High At the temperature V+ − 2.5extremes 0.1 0.14 VO Low At the temperature 0.17extremesV+ = 15 V, RL = 2 kΩ to 2.5 V 4.8 4.87 VO High At the temperature 4.73extremes VO Output Swing V 0.26 0.35 VO Low At the temperature 0.45extremesV+ = 15 V, RL = 2 kΩ to 7.5 V 14.5 14.63 VO High At the temperature 14.34extremes 16 22Sourcing, V+ = 5 V, VO = 0 V At the temperature extremes 10 16 21Sinking, V+ = 5 V, VO = 5 V At the temperature extremes 13 IO Output Current mA 28 30Sourcing, V+ = 15 V, VO = 0 V At the temperature extremes 22 28 34Sinking, V+ = 15 V, VO = 13 V(4) At the temperature extremes 22 450 750 V+ = 5 V, VO = 1.5 V At the temperature extremes 900 IS Supply Current μA 550 850 V+ = 15 V, VO = 7.5 V At the temperature extremes 950 (4) Do not connect the output to V + , when V + is greater than 13 V or reliability will be adversely affected. Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LMC6001
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6.6 DC Electrical Characteristics for LMC6001BI
Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. LMC6001BI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 100 IB Input Current Either Input, VCM = 0 V, VS = ±5 V At the temperature 4000extremes fA Input OffsetIOS At the temperature extremes 2000Current 1.35 At the temperature extremes 1.7 Input OffsetVOS mV10Voltage VS = ±5 V, VCM = 0 V At the temperature 2extremes Input OffsetTCVOS μV/°CVoltage Drift Input TΩRIN Resistance Common Mode 0 V ≤ VCM ≤ 7.5 V 72 CMRR At the temperatureRejection Ratio V+ = 10 V 68extremes 66 83Positive Power +PSRR Supply 5 V ≤ V+ ≤ 15 V dBAt the temperature 63Rejection Ratio extremes 74 94Negative Power −PSRR Supply 0 V ≥ V− ≥ −10 V At the temperature 71Rejection Ratio extremes 300 1400 Sourcing, RL = 2 kΩ(3) 200Large SignalAV V/mVVoltage Gain 90 350At the temperatureSinking, RL = 2 kΩ(3) extremes 60 –0.4 –0.1 VCM Low At the temperature 0extremesInput Common- V+ = 5 V and 15 V ForVCM VMode Voltage CMRR ≥ 60 dB V+ − 2.3 V+ − 1.9 VCM High At the temperature V+ − 2.5extremes 0.1 0.2 VO Low At the temperature 0.24extremesV+ = 15 V, RL = 2 kΩ to 2.5 V 4.75 4.87 VO High At the temperature 4.67extremes VO Output Swing V 0.26 0.44 VO Low At the temperature 0.56extremesV+ = 15 V, RL = 2 kΩ to 7.5 V 14.37 14.63 VO High At the temperature 14.25extremes (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm.
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www.ti.com SNOS694I –MARCH 1995–REVISED SEPTEMBER 2015 Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. LMC6001BI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 13 22 Sourcing, V+ = 5 V, At the temperatureVO = 0 V 8extremes 13 21 Sinking, V+ = 5 V, At the temperatureVO = 5 V 10extremes IO Output Current mA 23 30 Sourcing, V+ = 15 V, At the temperatureVO = 0 V 18extremes 23 34 Sinking, V+ = 15 V, At the temperatureVO = 13 V(4) 18extremes 450 750 V+ = 5 V, VO = 1.5 V At the temperature 900extremes IS Supply Current μA 550 850 V+ = 15 V, VO = 7.5 V At the temperature 950extremes (4) Do not connect the output to V + , when V + is greater than 13 V or reliability will be adversely affected.
6.7 DC Electrical Characteristics for LMC6001CI
Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. LMC6001CI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 1000 IB Input Current Either Input, VCM = 0 V, VS = ±5 V At the temperature 4000extremes fA Input OffsetIOS At the temperature extremes 2000Current 1Input OffsetVOS mVVoltage VS = ±5 V, VCM = 0 V 1.35 Input OffsetTCVOS μV/°CVoltage Drift Input TΩRIN Resistance Common Mode 0 V ≤ VCM ≤ 7.5 V 66 CMRR At the temperatureRejection Ratio V+ = 10 V 63extremes 66 83Positive Power +PSRR Supply 5 V ≤ V+ ≤ 15 V dBAt the temperature 63Rejection Ratio extremes 74 94Negative −PSRR Power Supply 0 V ≥ V− ≥ −10 V At the temperature 71Rejection Ratio extremes (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm. Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LMC6001
SNOS694I –MARCH 1995–REVISED SEPTEMBER 2015 www.ti.com Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. LMC6001CI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 300 1400 Sourcing, RL = 2 kΩ(3) 200Large SignalAV V/mVVoltage Gain 90 350At the temperatureSinking, RL = 2 kΩ(3) extremes 60 –0.4 –0.1 VCM Low At the temperature 0Input extremesV+ = 5 V and 15 V ForVCM Common- VCMRR ≥ 60 dB V+ − 2.3 V+ − 1.9Mode Voltage VCM High At the temperature V+ − 2.5extremes 0.1 0.2 VO Low At the temperature 0.24extremesV+ = 15 V, RL = 2 kΩ to 2.5 V 4.75 4.87 VO High At the temperature 4.67extremes VO Output Swing V 0.26 0.44 VO Low At the temperature 0.56extremesV+ = 15 V, RL = 2 kΩ to 7.5 V 14.37 14.63 VO High At the temperature 14.25extremes 13 22 Sourcing, V+ = 5 V, At the temperatureVO = 0 V 8extremes 13 21 Sinking, V+ = 5 V, At the temperatureVO = 5 V 10extremes IO Output Current mA 23 30 Sourcing, V+ = 15 V, At the temperatureVO = 0 V 18extremes 23 34 Sinking, V+ = 15 V, At the temperatureVO = 13 V(4) 18extremes 450 750 V+ = 5 V, VO = 1.5 V At the temperature 900extremes IS Supply Current μA 550 850 V+ = 15 V, VO = 7.5 V At the temperature 950extremes (4) Do not connect the output to V + , when V + is greater than 13 V or reliability will be adversely affected.
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6.8 AC Electrical Characteristics for LMC6001AIC
Limits in standard typeface ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V and RL > 1 M. LMC6001AIC PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 0.8 1.5 SR Slew Rate See (3) V/μsAt the temperature 0.6extremes GBW Gain-Bandwidth Product 1.3 MHz φfm Phase Margin 50 Deg GM Gain Margin 17 dB Input-Referred Voltageen F = 1 kHz 22 nV/√HzNoise Input-Referred Currentin F = 1 kHz 0.13 fA/√HzNoise F = 10 kHz, AV = −10, THD Total Harmonic Distortion RL = 100 kΩ, 0.01% VO = 8 VPP (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm. (3) V+ = 15 V. Connected as Voltage Follower with 10-V step input. Limit specified is the lower of the positive and negative slew rates.
6.9 AC Electrical Characteristics for LM6001BI
Limits in standard typeface ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V and RL > 1 M. LM6001BI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(1) 0.8 1.5 SR Slew Rate See (3) V/μsAt the temperature 0.6extremes GBW Gain-Bandwidth Product 1.3 MHz φfm Phase Margin 50 Deg GM Gain Margin 17 dB en Input-Referred Voltage Noise F = 1 kHz 22 nV/√Hz in Input-Referred Current Noise F = 1 kHz 0.13 fA/√Hz F = 10 kHz, AV = −10, THD Total Harmonic Distortion RL = 100 kΩ, 0.01% VO = 8 VPP (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm. (3) V+ = 15 V. Connected as Voltage Follower with 10-V step input. Limit specified is the lower of the positive and negative slew rates. Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LMC6001
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6.10 AC Electrical Characteristics for LMC6001CI
Limits in standard typeface ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V and RL > 1 M. LMC6001CI PARAMETER TEST CONDITIONS UNIT MIN(1) TYP(2) MAX(3) 0.8 1.5 SR Slew Rate See (4) V/μsAt the temperature 0.6extremes GBW Gain-Bandwidth Product 1.3 MHz φfm Phase Margin 50 Deg GM Gain Margin 17 dB Input-Referred Voltageen F = 1 kHz 22 nV/√HzNoise Input-Referred Currentin F = 1 kHz 0.13 fA/√HzNoise F = 10 kHz, AV = −10, THD Total Harmonic Distortion RL = 100 kΩ, 0.01% VO = 8 VPP (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm. (3) All limits are specified by testing or statistical analysis. (4) V+ = 15 V. Connected as Voltage Follower with 10-V step input. Limit specified is the lower of the positive and negative slew rates.
6.11 Dissipation Ratings
Power Dissipation See (1) (1) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA.
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6.12 Typical Characteristics
Figure 2. Input Current vs. VCMFigure 1. Input Current vs. Temperature Figure 3. Supply Current vs. Supply Voltage Figure 4. Input Voltage vs. Output Voltage Figure 6. Power Supply Rejection Ratio vs. FrequencyFigure 5. Common-Mode Rejection Ratio vs. Frequency
Figure 7. Input Voltage Noise vs. Frequency Figure 8. Noise Figure vs. Source Resistance Figure 9. Output Characteristics Sourcing Current Figure 10. Output Characteristics Sinking Current Figure 11. Gain and Phase Response vs. Temperature Figure 12. Gain and Phase Response vs. Capacitive Load
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7 Detailed Description
7.1 Overview
LMC6001 has an extremely low input current of 25 fA. In addition, its ultra-low input current noise of 0.13 fA/√Hz allows almost noiseless amplification of high-resistance signal sources. LMC6001 is ideally suited for electrometer applications requiring ultra-low input leakage current such as sensitive photodetection transimpedance amplifiers and sensor amplifiers.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Amplifier Topology
The LMC6001 incorporates a novel op amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional op amps. These features make the LMC6001 both easier to design with, and provide higher speed than products typically found in this low-power class.
7.3.2 Latch-Up Prevention
CMOS devices tend to be susceptible to latch-up due to their internal parasitic SCR effects. The (I/O) input and output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6001 is designed to withstand 100-mA surge current on the I/O pins. Some resistive method should be used to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR, there is a minimum holding current for any latch-up mode. Limiting current to the supply pins will also inhibit latch-up susceptibility.
7.4 Device Functional Modes
The LMC6001 has a single functional mode and operates according to the conditions listed in Recommended Operating Conditions.
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8 Applications and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Compensating For Input Capacitance
discussion on compensating for input capacitance. Figure 19. Cancelling the Effect of Input Capacitance
8.1.2 Capacitive Load Tolerance
resistive load in parallel with the capacitive load. See Typical Characteristics.
Figure 20. LMC6001 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads Characteristics for LMC6001AI. Figure 21. Compensating for Large Capacitive Loads With a Pullup Resistor
8.2 Typical Application
pH probes, analytic medical instruments, electrostatic field detectors and gas chromotographs. Figure 22. Typical Application Schematic, LMC6001
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8.2.1 Two Op Amp, Temperature Compensated Ph Probe Amplifier
input current is an ideal choice for this application. digital panel meter. Total current consumption will be about 1 mA for the whole system.
- The LMC6001A ensures a 25-fA limit on input current at 25°C.
- The input ESD protection diodes in the LMC6042 are only rated at 500 V while the LMC6001 has much more
robust protection that is rated at 2000 V. Figure 23. Ph Probe Amplifier
8.2.1.1 Design Requirements
The theoretical output of the standard Ag/AgCl pH probe is 59.16 mV/pH at 25°C with 0 V out at a pH of 7.00. must be mounted where it will be at the same temperature as the liquid being measured.
8.2.1.2 Detailed Design Procedure
The set-up and calibration is simple with no interactions to cause problems.
- Disconnect the pH probe and with R3 set to about mid-range and the noninverting input of the LMC6001
grounded, adjust R8 until the output is 700 mV.
- Apply −414.1 mV to the noninverting input of the LMC6001. Adjust R3 for and output of 1400 mV. This
adjustments should be made by trimming while measuring a precision buffer solution.
8.2.1.3 Application Curve
Figure 24. Input Current vs. VCM
8.3 System Example
8.3.1 Ultra-Low Input Current Instrumentation Amplifier
precision matched resistors. For good CMRR over temperature, low-drift resistors should be used. ∴AV ≈ 100 for circuit shown (R2 = 9.85k). Figure 25. Instrumentation Amplifier
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9 Power Supply Recommendations
and operating junction temperature.
10 Layout
10.1 Layout Guidelines
10.1.1 Printed-Circuit-Board Layout For High-Impedance Work
surface leakage will be appreciable. the trace were a 5-V bus adjacent to the pad of the input. Figure 28 for typical connections of guard rings for standard op amp configurations. Figure 26. Inverting Amplifier Figure 27. Noninverting Amplifier Figure 28. Typical Connections Of Guard Rings
are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 29. (Input pins are lifted out of PCB and soldered directly to components. All other pins connected to PCB). Figure 29. Air Wiring adhered to, during all phases of inspection, test and assembly.
10.2 Layout Example
Figure 30. Examples Of Guard
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
- LMC660 CMOS Quad Operational Amplifier, SNOSBZ3
- LMC662 CMOS Dual Operational Amplifier, SNOSC51
11.2 Related Links
tools and software, and quick access to sample or buy. Table 1. Related Links
11.3 Community Resources
solve problems with fellow engineers. contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
www.ti.com 27-Jul-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LMC6001A MDC ACTIVE DIESALE Y 0 270 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LMC6001AIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 85 LMC6001 AIN LMC6001BIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 85 LMC6001 BIN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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