LMC555 TI | Alldatasheet
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www.ti.com SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 LMC555CMOS Timer Check forSamples: LMC555 1FEATURES
DESCRIPTION
2• Less than 1 mW TypicalPower Dissipationat The LMC555 is a CMOS versionof the industry5V Supply standard 555 series general purpose timers.In• 3 MHz AstableFrequency Capability additionto the standardpackage (SOIC, VSSSOP,
- 1.5VSupply OperatingVoltageEnsured and PDIP) the LMC555 is also availablein a chip sizedpackage (8 Bump DSBGA) usingTI's DSBGA• Output FullyCompatible withTTL and CMOS package technology.The LMC555 offersthe sameLogic at5V Supply capabilityof generatingaccuratetime delays and• Tested to−10 mA, +50 mA Output Current frequenciesas theLM555 butwithmuch lowerpowerLevels dissipationand supplycurrentspikes.When operated
- Reduced Supply CurrentSpikes During Output as a one-shot,the timedelayispreciselycontrolled by a singleexternalresistorand capacitor.In theTransitions stablemode theoscillationfrequencyand dutycycle• ExtremelyLow Reset,Trigger,and Threshold are accuratelysetby two externalresistorsand oneCurrents capacitor.The use of Texas Instruments'LMCMOS
- ExcellentTemperature Stability processextendsboth the frequencyrange and low supplycapability.• Pin-for-PinCompatible with555 Seriesof Timers
- Availablein8-pinVSSOP Package and 8-Bump DSBGA package Pulse Width Modulator Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2000–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 www.ti.com Connection Diagram Figure1. 8-PinSOIC, VSSOP, PDIP Top View Figure2. 8-Bump DSBGA Top View (Bump Side Down)
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www.ti.com SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 Table1.Pin Descriptions Package Pin Numbers Pin Name 8-PinSOIC, VSSOP, and PDIP 8-Bump DSBGA GND 1 A3 Trigger 2 B3 Output 3 C3 Reset 4 C2 ControlVoltage 5 C1 Threshold 6 B1 Discharge 7 A1 V+ 8 A2 These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1)(2)(3) SupplyVoltage,V+ 15V InputVoltages,VTRIG ,VRES ,VCTRL ,VTHRESH −0.3VtoVS + 0.3V OutputVoltages,VO ,VDIS 15V OutputCurrentIO ,IDIS 100 mA StorageTemperatureRange −65°C to+150°C SolderingspecificationforPDIP package: Soldering(10seconds) 260°C Solderingspecificationforallotherpackages: see productfolderatwww.ti.comand http://www.ti.com/lit/SNOA549 (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notensurespecificperformancelimits.ElectricalCharacteristicsstateDC and AC electrical specificationsunderparticulartestconditionswhichensurespecificperformancelimits.Thisassumes thatthedeviceiswithinthe OperatingRatings.Specificationsarenotensuredforparameterswhere no limitisgiven,however,thetypicalvalueisa good indication ofdeviceperformance. (2) See AN-1112 (SNVA009 )forDSBGA considerations. (3) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. OperatingRatings(1)(2) TemperatureRange LMC555IM −40°C to+125°C LMC555CM/MM/N/TP −40°C to+85°C ThermalResistance(θJA) (1) SOIC, 8-Pin 169°C/W VSSOP, 8-Pin 225°C/W PDIP,8-Pin 111°C/W 8-Bump DSBGA 220°C/W Maximum AllowablePower Dissipation@25 °C PDIP-8 1126 mW SOIC-8 740 mW VSSOP-8 555 mW 8-Bump DSBGA 568 mW (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notensurespecificperformancelimits.ElectricalCharacteristicsstateDC and AC electrical specificationsunderparticulartestconditionswhichensurespecificperformancelimits.Thisassumes thatthedeviceiswithinthe OperatingRatings.Specificationsarenotensuredforparameterswhere no limitisgiven,however,thetypicalvalueisa good indication ofdeviceperformance. (2) See AN-1112 (SNVA009 )forDSBGA considerations. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMC555
SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 www.ti.com ElectricalCharacteristics(1)(2) TestCircuit,T = 25°C, allswitchesopen,RESET toVS unlessotherwisenoted UnitsParameter TestConditions Min Typ Max (Limits) IS SupplyCurrent VS = 1.5V 50 150 VS = 5V 100 250 µA VS = 12V 150 400 VCTRL ControlVoltage VS = 1.5V 0.8 1.0 1.2 VS = 5V 2.9 3.3 3.8 V VS = 12V 7.4 8.0 8.6 VDIS DischargeSaturationVoltage VS = 1.5V,IDIS = 1 mA 75 150 mVVS = 5V,IDIS = 10 mA 150 300 VOL OutputVoltage(Low) VS = 1.5V,IO = 1 mA 0.2 0.4 VS = 5V,IO = 8 mA 0.3 0.6 V VS = 12V,IO = 50 mA 1.0 2.0 VOH OutputVoltage VS = 1.5V,IO = −0.25mA 1.0 1.25 (High) VS = 5V,IO = −2 mA 4.4 4.7 V VS = 12V,IO = −10 mA 10.5 11.3 ITRIG TriggerCurrent VS = 5V 10 pA IRES ResetCurrent VS = 5V 10 pA ITHRESH ThresholdCurrent VS = 5V 10 pA IDIS DischargeLeakage VS = 12V 1.0 100 nA t TimingAccuracy SW 2,4 Closed VS = 12V 1.0 1.1 1.25 Δt/ΔVS TimingShiftwithSupply VS = 5V ± 1V 0.3 %/V Δt/ΔT TimingShiftwithTemperature VS = 5V 75 ppm/°C fA AstableFrequency SW 1,3 Closed,VS = 12V 4.0 4.8 5.6 kHz fMAX Maximum Frequency Max. Freq.TestCircuit,VS = 5V 3.0 MHz tR ,tF OutputRiseand Max. Freq.TestCircuit 15 ns FallTimes VS = 5V,C L = 10 pF tPD TriggerPropagationDelay VS = 5V,Measure Delay 100 nsfromTriggertoOutput (1) Allvoltagesaremeasured withrespecttothegroundpin,unlessotherwisespecified. (2) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notensurespecificperformancelimits.ElectricalCharacteristicsstateDC and AC electrical specificationsunderparticulartestconditionswhichensurespecificperformancelimits.Thisassumes thatthedeviceiswithinthe OperatingRatings.Specificationsarenotensuredforparameterswhere no limitisgiven,however,thetypicalvalueisa good indication ofdeviceperformance. (3) IftheRESET pinistobe used attemperaturesof−20°C and belowVS isrequiredtobe 2.0Vorgreater.
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www.ti.com SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 Fordevicepinout,pleasesee Table1. Figure3. TestCircuit Fordevicepinout,pleasesee Table1. Figure4. Maximum Frequency TestCircuit Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMC555
SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 www.ti.com
APPLICATION INFORMATION
In thismode of operation,the timerfunctionsas a one-shot(Figure5).The externalcapacitorisinitiallyheld dischargedby internalcircuitry.Upon applicationofa negativetriggerpulseoflessthan1/3VS totheTrigger terminal,theflip-flopissetwhichbothreleasestheshortcircuitacrossthecapacitorand drivestheoutputhigh. Figure5. Monostable (One-Shot) The voltageacrossthecapacitorthenincreasesexponentiallyfora periodoftH = 1.1R AC, whichisalsothetime thattheoutputstayshigh,attheend ofwhich timethevoltageequals2/3VS.The comparatorthenresetsthe flip-flopwhich in turndischargesthe capacitorand drivesthe outputto itslow state.Figure6 shows the waveforms generatedinthismode ofoperation.Sincethechargeand thethresholdlevelofthecomparatorare bothdirectlyproportionaltosupplyvoltage,thetiminginternalisindependentofsupply. VCC = 5V Top Trace:Input5 V/Div. TIME = 0.1ms/Div. MiddleTrace:Output5 V/Div. R A = 9.1kΩ BottomTrace:CapacitorVoltage2 V/Div. C = 0.01µF Figure6. Monostable Waveforms Reset overridesTrigger,which can overridethreshold.Thereforethe triggerpulsemust be shorterthan the desiredtH .The minimum pulsewidthfortheTriggeris20ns,and itis400ns fortheReset.Duringthetimingcycle when theoutputishigh,thefurtherapplicationofa triggerpulsewillnoteffectthecircuitso longas thetrigger inputisreturnedhighatleast10µs beforetheend ofthetiminginterval.However thecircuitcan be resetduring thistimeby theapplicationofa negativepulsetotheresetterminal.The outputwillthenremaininthelow state untila triggerpulseisagainapplied. When theresetfunctionisnotuse,itisrecommended thatitbe connectedtoV+ toavoidany possibilityoffalse triggering.Figure7 isa nomograph foreasy determinationofRC valuesforvarioustimedelays. NOTE Inmonstableoperation,thetriggershouldbe drivenhighbeforetheend oftimingcycle.
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www.ti.com SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 Figure7. Time Delay ASTABLE OPERATION Ifthe circuitisconnectedas shown in Figure8 (Triggerand Thresholdterminalsconnectedtogether)itwill triggeritselfand freerun as a multivibrator.The externalcapacitorchargesthroughR A + R B and discharges throughR B.Thus thedutycyclemay be preciselysetby theratioofthesetwo resistors. Figure8. Astable(VariableDuty Cycle Oscillator) Inthismode ofoperation,thecapacitorchargesand dischargesbetween 1/3VS and 2/3VS.As inthetriggered mode, thechargeand dischargetimes,and thereforethefrequencyareindependentofthesupplyvoltage. Figure9 shows thewaveform generatedinthismode ofoperation. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMC555
SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 www.ti.com VCC = 5V Top Trace:Output5 V/Div. TIME = 20 µs/Div. BottomTrace:CapacitorVoltage1 V/Div. R A = 3.9kΩ R B = 9 kΩ C = 0.01µF Figure9. AstableWaveforms The chargetime(outputhigh)isgivenby And thedischargetime(outputlow)by: Thus thetotalperiodis: The frequencyofoscillationis: (4) Figure10 may be used forquickdeterminationoftheseRC Values.The dutycycle,as a fractionoftotalperiod thattheoutputislow,is: (5) Figure10. Free Running Frequency
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www.ti.com SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 FREQUENCY DIVIDER The monostablecircuitofFigure5 can be used as a frequencydividerby adjustingthelengthofthetimingcycle. Figure11 shows thewaveformsgeneratedina divideby threecircuit. VCC = 5V Top Trace:Input4 V/Div. TIME = 20 µs/Div. MiddleTrace:Output2 V/Div. R A = 9.1kΩ BottomTrace:Capacitor2 V/Div. C = 0.01µF Figure11. Frequency DividerWaveforms PULSE WIDTH MODULATOR When the timerisconnectedinthe monostablemode and triggeredwitha continuouspulsetrain,the output pulsewidthcan be modulatedby a signalappliedtotheControlVoltageTerminal.Figure12 shows thecircuit, and inFigure13 aresome waveform examples. Figure12. Pulse Width Modulator VCC = 5V Top Trace:Modulation1 V/Div. TIME = 0.2ms/Div. BottomTrace:OutputVoltage2 V/Div. R A = 9.1kΩ C = 0.01µF Figure13. Pulse Width ModulatorWaveforms Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMC555
SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 www.ti.com PULSE POSITION MODULATOR Thisapplicationuses thetimerconnectedforastableoperation,as inFigure14,witha modulatingsignalagain appliedtothecontrolvoltageterminal.The pulsepositionvarieswiththemodulatingsignal,sincethethreshold voltageand hence the time delayisvaried.Figure15 shows the waveforms generatedfora trianglewave modulationsignal. Figure14. Pulse PositionModulator VCC = 5V Top Trace:ModulationInput1 V/Div. TIME = 0.1ms/Div. BottomTrace:OutputVoltage2 V/Div. R A = 3.9kΩ R B = 3 kΩ C = 0.01µF Figure15. Pulse PositionModulatorWaveforms 50% DUTY CYCLE OSCILLATOR The frequencyofoscillationis f= 1/(1.4R C C) Figure16. 50% Duty Cycle Oscillator
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SNAS558J –FEBRUARY 2000–REVISED MARCH 2013 www.ti.com
REVISION HISTORY
Changes from RevisionI(March 2013)toRevisionJ Page
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www.ti.com 15-May-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples LMC555CM ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMC 555CM LMC555CM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMC 555CM LMC555CMM ACTIVE VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 ZC5 LMC555CMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 ZC5 LMC555CMMX ACTIVE VSSOP DGK 8 3500 TBD Call TI Call TI -40 to 85 ZC5 LMC555CMMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 ZC5 LMC555CMX ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMC 555CM LMC555CMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMC 555CM LMC555CN ACTIVE PDIP P 8 40 TBD Call TI Call TI -40 to 85 LMC 555CN LMC555CN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LMC 555CN LMC555CTP/NOPB ACTIVE DSBGA YPB 8 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 F LMC555CTPX/NOPB ACTIVE DSBGA YPB 8 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 F LMC555IM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMC 555IM LMC555IMX/NOPB ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LMC 555IM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
www.ti.com 15-May-2013 Addendum-Page 2 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMC555CMM VSSOP DGK 8 1000 210.0 185.0 35.0 LMC555CMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMC555CMMX VSSOP DGK 8 3500 367.0 367.0 35.0 LMC555CMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LMC555CMX SOIC D 8 2500 367.0 367.0 35.0 LMC555CMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMC555CTP/NOPB DSBGA YPB 8 250 210.0 185.0 35.0 LMC555CTPX/NOPB DSBGA YPB 8 3000 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 Pack Materials-Page 2
www.ti.com TPA08XXX (Rev A) 0.5±0.045 D E 4215100/A 12/12 A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. NOTES: D: Max = E: Max = 1.464 mm, Min = 1.438 mm, Min = 1.403 mm 1.377 mm
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