LMC13334

LMC13334 NSC | Alldatasheet

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Technical content

FIGURE 1. Typical Circuit for One Switch

Absolute Maximum Ratings (note 1) Operating Ratings (note 1) (All voltages referred to Va) Positive Supply (V+) +65V to +20V Positive Supply (V*) +22V Negative Supply (V~) OV to —20V Negative Supply (V~) —22V Analog Voltage Vo toV+ Logic Input Voitage (Note 4) -0.2VtoV+ + 0.2V Temperature Range oo —55°C to + 125°C 5 Analog Voltage (Note 4) V~ —0.2VtoV+ + 0.2V Ne eo Analog Current 20 mA ——— Power Dissipation 500 mw Storage Temperature —65°C to + 150°C Lead Temperature (Soldering, 10 seconds) 300°C

Electrical Characteristics

The following characteristics apply for V+ = +15V, V~ = —15V, and Ta = 25°C unless otherwise specified Typical Test Symbol Parameter (Note 2) Limit Units (Note 3) Ron “ON" Resistance Va = 0, $10V 50 75 2 (max) Va = 0,V+ = 5V,V~ = OV 140 Q (max) Ron Match “ON" Resistance Matching Va = 0, +10V 2 5 Q. (max) Between Switches Va Analog Voltage Range +15 +15 V (min) Is(ON) + Ip(ON) Leakage Current in ON Vs, Vp = +14V 5 nA (max) Condition Is(OFF) Source Current in “OFF” Vg = +14V Vp = +14V 5 nA (max) Condition Ip(OFF) Drain Current in “OFF” Vp = #14V Vg = +14V 5 nA (max) Condition Vie Logical “1” Input Voltage VR = 0 14 2.0 V (min) Vit Logical “0” Input Voltage 14 08 V (max) iM Logical "1" Input Current 0.001 100 nA (max) Iie Logical “0” Input Current 30 60 HA (max) Cg (OFF) Source Capacitance Va = 0 Switch Off 10 pF Cp (OFF) Drain Capacitance Va = 0 Switch Off 10 pF Cg (ON) + Active S + D Capacitance Va = 0 Switch On 55 pF Cp (ON) Iso(OFF) “OFF” Isolation RL = 1k f = 100 kHz -70 dB cT Crosstalk Ry = 1k f = 100 kHz 90 dB v Negative Supply Current All Switches Off 0 0.05 MA (max) In Reference Supply Current All Switches Off 0.6 15 mA (max) vt Positive Supply Current All Switches Off O7 15 mA (max)

Timing Characteristics LMC 13335 The following characteristics apply for V+ = +15V, V~ = —15V, and Ta = 25°C unless otherwise specified Test T symbol Hie Limit Units (Note 3) ton Delay Time “ON” vgs etov [sso a50 | ns man Lore Delay Time “OFF” vs=ttov [300 es0 ns ima w wrtePuisewitn | Ta50 a0 sing ‘os Data Set Up Time tw=380ns [tao | 250s in) ton Data Hold Time w=s8ons [20 250 sin) tes Control Set Up Time tw=360ns | 260 | 380 ~—| ans (min) tc Conrorogtime | w= 380ns | ons riny Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating device beyond its specified operating conditions. Note 2: Typicals represent the most likely parametric norm Note 3: Guaranteed and 100% production tested. Note 4: When inputs are driven beyond these voltage limits, internal clamp diodes tutn on. I the input currents limited to less than 20 mA, the overdrive will not be harmful to the device. The same precautions apply when signals are present while power supplies are off. Timing Characteristics LMC 13334/204 The following characteristics apply for V+ = +15V, V- = —15V, and Ta = 25°C unless otherwise specified Test Symbol Parameter me Limit Units: (Note 3) ton Delay Time “ON” vss stov | s00 [550s (mand Lore Delay Time “OFF” vss tov [250 [500s (man)

Typical Performance Characteristics Ron vs Va and suo Power Supply Voltage soo RON VS Va and Temperature sgftON VS Analog Current wwf Seay, L ieee ~| [ea ©. Vizs10v ==10¥ P| py’ 240 Fp. vonet5v V7==15V cad 0 mole rar rawv | | | 0 itt 3 att 3 ve s ,| |b r| S| 1 tet | 3 in 3 rie ey yy wee KAY wo Pte | tt » HHT o SSS i Coo oLL EEE 0 a ao etl TT tt] tap “is =10 “5 0-3 1S “3-0 3 03 1S “0-0 0 © w 1010 %™) %™) ANALOG CURRENT (mA) Positive Supply Current vs ., Temperature and Supply Voltage. Switch Leakage Current vs Va 1 Sitch Capacitance vs Va aL] LTT Aves wo |_| vest ssv] wo |—| |] [ve=#15] PEND |e vessior [| | | LRA 0. V=# SV 30 7 g™ - z ‘ag = wi VA = wl. = ,| Nes z o/ 5 10 z: SS 2 — 5 | aa [| oS nae ot ttt iti th ol 1 | 1 TT] A es ee el “r5-80-25 © 18 60 75 10012510 ts cs 08 ws “3-0-5 08 OS TEMPERATURE (°C) 4) v4) Switch Leakage Current Pulse Width, Data Setup Time & = Off Isolation vs Frequency vs Temperature ot Hold Time vs Temperature CT TT 2=#5) [ei [TTT TTT pp pn ed eo TT ee ee ry rey cee oe a 2 wlan or deta A seo Pst a, =500. = orn) OF ames = Pea peepee yo LL - WN Bara A 0 a

8 Ne 8 aes Som Ot 200 Lat al

piece oot ath ee cla 100 a Coarse til = SSe a SCE ET] « * «x Mm OB 0 BH IBID “75-80725 0 25 50 75 100125180 FREQUENCY (Hz) TEMPERATURE (°C) TEMPERATURE (°C) Channel to Channel Crosstalk Total Harmonic Distortion vs Frequency vs Frequency NT TT oy (ol UH n= 1000 > WSS oo: ict i 5 aoe Tits Et enti % [eas oaste oa ows HL Ce tll i Sti et Seth Sea oo CLUE TTT com CEH TT it «ox ow tO » 1 KK FREQUENCY (Hz) FREQUENCY (Hz) Tune580-9

GENERAL INFORMATION can be used in conjunction with the two Reset pins to either ; Shi open or close all of the switches regardless of the states of These devices are mon lithic quad CMOS analog switches the other control inputs. Pulling either ResetT, Reset2, or with 502 typical “ON” resistance and operation on single- ‘ both pins low will set all the switches in the state dictated by ended supply voltages ranging from 5 volts to 20 volts or the ON/OFF pin (high for ON, low for OFF) split supplies up to +20 volts. The allowable analog signal Pin (hig . z ‘swing includes the supply voltages, resulting in 6 dB greater The disable (DIS) pin on the LMC 13334 may be used to turn signal handling capability than comparable JFET analog all of the switches off independent of the logic inputs. To switches. Each switch is controlled by TTL or CMOS level accomplish this, apply a logic “low” voltage to the disable signals at its logic input and is designed to turn “OFF” faster pin. If the disable function is not needed, the disable pin than it turns “ON”. This helps avoid momentarily connecting may be left floating. two analog Signal sources together when switching from “ON” RESISTANCE VARIATIONS one source to the other. As the typical performance curves show, “ON resistance LOGIC INPUTS of the switches is lowest and most nearly constant when the The threshold voltage for the logic inputs (IN1 through IN4, supply voltages are highest. Therefore, when maximum lin- wr, cs, DIS, Reset, Reset2, and ON/OFF) is set using the earity is desired, the supply voltages should be as close to reference pin (Vp). The threshold will be equal to two diode the maximum operating ratings as possible. Variations in forward voltages above Vp, or about 1.4V at room tempera- Fon can also be minimized by keeping the analog voltage ture, so that if the Va pin is connected to ground, the logic swing small. inputs “i pe compatible with einer TTL or MOS logic ANALOG VOLTAGE AND CURRENT LIMITATIONS signals. Voltages een VR and the positive supply may Analog si A i 1g signal voltages can swing to either supply. If larger be applied to the logic input with no errors in switch states. . Any logic pins left unconnected will float “high”. The logic sionals are expected, they should be current limited to less inputs are diode-clamped to Vp, so logic signals should be " current-limited to less than 20 mA if they are expected to SWITCHING TRANSIENTS drop below this voltage. VR may be set to any voltage be- When a switch is turned OFF or ON, transient signals will tween V* —5V and V* —20V. appear at the load due to injection of charge from the FET The_LMC13335's logic input states may be latched using gate to the channel. These transients are on the order of the wr and cs pins. If the wr and cs pins are both low, the 500 mV in amplitude and 100 ns in duration, depending on data on the logic inputs will be active. Pulling cs and/or wr the load impedance. high will latch the data on the logic inputs. The ON/OFF pin Physical Dimensions inches (milimeters) : 0.785 rn | | “ o.0es ae an? (0.635) RAD 0.220-0.310 (5.588 — 7.874) Too Oooo 0.005 - 0.020 (0.127 0.508) AAD TYP Guass ‘SEALANT 0.200 (5.080) “ i810) min 0.180 oe ge wea 2-008 0.012 MAX bald oam-o.00 | 2022) ines7 20.075) i375. (0508= 1528) Tare= 0.0 ont ENDS B.100+0.000 | 9.037 + 0.005 (2540 £0.25) iosar0.127) Ceramic Dual-In-Line Package (J) Order Number LMC13204J, LMC13334J,

Physical Dimensions inches (milimeters) (Continued) 0.985 0.025 (25.019) (0.635) MAX mo fed [+5] [os] [o>] fre) [os] [v4] fos] fre] fe ozo-os0 (5.588 — 7.874) AVORMUEYIOELI 0.005 ~ 0.020 ‘017-0. 508) RAD TYP ery r (0.9404 0.127) 0.005 0.055 + 0.005, (sre) (7366-8 = GLASS SEALANT MIN ose 1524) \\- oa 200 HO OO — —_ Wax sset5° 85° 94° Foiso 8080012 (Baro) 0125-0200, a |, oam-040 | 060 0.08 +0.003 rare 10.4i) ise) (0.457 0.076) WAX BOTH ENDS 0.100 +0.010 (2.540 + 0.254) Ceramic Dual-in-Line Package (J) Order Number LMC13335J 0730.70 ome a8 0.092 NOM fa (fist fa) fs] 2) 7) fol 0.032 + 0.005 fa_[}_[74) pw NO ENT 9.290 £0.005, ® S PW NO. 1 10AT7—Le Fa Tao ee oo WT iN 0.030 OPTION 1 4 OPTION 2 OPTION 2 (sea | oes 2040, 0.190:+0.005 fL 1 (3.683 5.080) tr 5° f rie 009 —0.015 ne aie _ toses0ns L_ aL or820.003 Sirs 35s5 | MM 0.325 Dots (o-762+0.381) sore (0.457+0.076) MN PEST 4.100 0.0 Molded Dual-In-Line Package (N) Order Number LMC 13204N, LMC 13334N

w & | Physical Dimensions inches (millimeters) (Continued) se) = aa7 x0782) \\ 0.032 0.005 | MAX OP aL EL LLL Pel ibera-0.127 lel it, RAD > PIN NO. 1 IDENT 0.260 +0.005 3 © © (6.608 -0.127) PIN NO. 1 IDENT g an option’ Eos i Es, N ami) Dope ao el oo oO MIN 09 .090 Pr 0.300-0.320 aan OPTION 2 o (7620-8.728) how 0.040 )-8. NOM = 4 2065 iT2a) Te | (s302 0.127) = ies | oOo a 1 (3.683~5.080) oO 955 0.009-o.0101 a 2 (0229-0254) ve 0.020 (6) | 0.060 -0.005 | | sare! eowseam || STE-SH MIN a 0.325 _go15 +1016 a (eas am) o apa ev) <= Molded Dual-In-Line Package (N) S Order Number LMC'13335N on Do [o) o a is] $ LIFE SUPPORT POLICY SF | NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL 5 SEMICONDUCTOR CORPORATION. As used herein: Q. | 1. Lite support devices or systems are devices or 2. A critical component is any component of a life n systems which, (a) are intended for surgical implant support device or system whose failure to perform can Fe] into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life o failure to perform, when properly used in accordance support device or system, or to affect its safety or Ss with instructions for use provided in the labeling, can effectiveness. (o] be reasonably expected to result in a significant injury to the user. ZA National Semiconductor National Semiconductor NS Japan Ld. National Semiconductor Nalonsl Semiconduores National Semiconductor Corporation moet tea buna, Hong Kong Ud. Do Brel tan (Australia) Pr, id. [200 Semconductor Ove Westendstasse 199-195 Tosa, Southenst Ania Marketing Av Brg Fara Lima, 690 iia igh Sect 70. Bor 58000 ‘e000 Munchen 24 Towyo 171, Japan Resin Tower am Foo” B Ander Boyewater, Vlora 9152 Samia Gra, CA 95052-0090 West Gorman Tot (09) 9882101 22.20 Ausin Avenue 01452 Sao Paulo, SP. Bras To (03) 729-6000 ar oe) 79-5000 Tor (080) 5709501 Pak\\ot1 813.988.1700 Temshatsun Kowaon, HK Tal (65/11) 2126088 olen AAS2098. Two (910) 99.9240 Yolen 520772 Tar b7231@90, 67243645 Telex 991-1191998 NSBR OR Gabi NSSEAWKTE ‘ovr: 52996 NSSEA HX atonal does ot assume ay responsibly fr use ofan ceuty desonbed, occu patent eens are mpod an Natoal eserves te ght a ary ie without nce to change sid teity and spectcatons