LM86CIM

LM86 TI | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 38

Technical content

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 ±0.75°C Accurate,RemoteDiodeandLocalDigitalTemperatureSensorWithTwo-Wire Interface Check forSamples: LM86 1FEATURES DESCRIPTION The LM86 isan 11-bitdigitaltemperaturesensorwith 23• AccuratelySenses Die Temperature ofRemote a 2-wireSystem Management Bus (SMBus) serialICs or Diode Junctions interface.The LM86 accuratelymeasures itsown• OffsetRegisterAllows Sensing a Varietyof temperatureas wellas thetemperatureofan external Thermal Diodes Accurately device,such as processorthermaldiode or diode connected transistorsuch as the 2N3904. The• On-Board LocalTemperature Sensing temperature of any ASIC can be accurately• 10-BitPlus Sign Remote Diode Temperature determinedusingthe LM86 as longas a dedicatedData Format,0.125°C Resolution diode (semiconductorjunction)is availableon the

• T_CRIT_A Output UsefulforSystem Shutdown targetdie.The LM86 remote sensor accuracy of ±0.75°C is factorytrimmed for the 1.008 typical• ALERT Output Supports SMBus 2.0Protocol nonidealityfactorofthemobilePentium™ IIIthermal• SMBus 2.0Compatible Interface,Supports diode.The LM86 has an Offsetregisterto allowTIMEOUT measuringotherdiodeswithoutrequiringcontinuous
• 8-PinVSSOP and SOIC Packages software management. Contact hardware.monitor.team@nsc.comtoobtainthelatest APPLICATIONS datafornew processors.
• Computer System Thermal Management Activationof the ALERT outputoccurs when any (ForExample, Laptop,Desktop,Workstations, temperaturegoes outsidea preprogrammed window setby theHIGH and LOW temperaturelimitregistersServer) or exceeds the T_CRIT temperaturelimit.Activation• ElectronicTestEquipment of the T_CRIT_A occurs when any temperature• OfficeElectronics exceeds theT_CRIT programmed limit.The LM86 is pin and registercompatiblewith the the Analog KEY SPECIFICATIONS DevicesADM1032 and Maxim MAX6657/8.
• Supply Voltage3.0Vto3.6V
• Supply Current0.8mA (typ)
• LocalTemp Accuracy (includesquantization error) – TA =25°C to125°C, ±3.0°C (max)
• Remote Diode Temp Accuracy (includes quantizationerror) – TA =30°C, TD =80°C, ±0.75°C (max) – TA =30°C to50°C, TD =60°C to100°C, ±1.0°C (max) – TA =0°C to85°C, TD =25°C to125°C, ±3.0°C (max) Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Pentiumisa trademarkofIntelCorporation.. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2001–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

T_CRIT Limit & Hysteresis Registers Configuration and Status Registers Conversion Rate Registers Two-Wire Serial Interface Local/Remote Diode Selector Temperature Sensor Circuitry 10-Bit Plus Sign '-6 Converter Programable Level Filter Fault Queue Fault Queue Fault Queue S R 3.0V-3.6V T_Crit_A ALERT SMBData SMBClock Q LM86 SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com SimplifiedBlock Diagram Connection Diagram VSSOP-8 or SOIC-8 (TOP VIEW) Pin Description Label Pin No. Function TypicalConnection VDD 1 PositiveSupplyVoltageInput DC Voltagefrom3.0V to3.6V DiodeCurrentSource To DiodeAnode.Connectedtoremotediscretediodeconnected D+ 2 transistorjunctionortothediodeconnectedtransistorjunctionon a remoteIC whose dietemperatureisbeingsensed. D − 3 DiodeReturnCurrentSink To DiodeCathode. T_CRIT AlarmOutput,Open-Drain,Pull-UpResistor,ControllerInterruptorPower SupplyShutdown ControlT_CRIT_A 4 Active-Low GND 5 Power SupplyGround Ground InterruptOutput,Open-Drain, Pull-UpResistor,ControllerInterruptorAlertLineALERT 6 Active-Low SMBus Bi-DirectionalData Line, From and toController,Pull-UpResistorSMBData 7 Open-DrainOutput SMBCLK 8 SMBus Input From Controller,Pull-UpResistor

2 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 TypicalApplication Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1) SupplyVoltage −0.3V to6.0V VoltageatSMBData, SMBCLK, ALERT, T_CRIT_A −0.5Vto6.0V VoltageatOtherPins −0.3V to(VDD + 0.3V) D − InputCurrent ±1 mA InputCurrentatAllOtherPins(2) ±5 mA Package InputCurrent(2) 30 mA SMBData, ALERT, T_CRIT_A OutputSinkCurrent 10 mA StorageTemperature −65°C to+150°C SolderingInformation,Lead Temperature, Vapor Phase (60seconds) 215°C SOIC-8 orVSSOP-8 Packages (3) Infrared(15seconds) 220°C ESD Susceptibility(4) Human Body Model 2000 V Machine Model 200 V (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.DC and AC electricalspecificationsdo not applywhen operatingthedevicebeyond itsratedoperatingconditions. (2) When theinputvoltage(VI)atany pinexceedsthepower supplies(VI< GND orVI> VDD ),thecurrentatthatpinshouldbe limitedto5 mA. Parasiticcomponents and orESD protectioncircuitryareshown inTable1 and Figure1 fortheLM86 's pins.The nominal breakdown voltageofD3 is6.5V.Care shouldbe takennottoforwardbiastheparasiticdiode,D1, presenton pins:D+, D −.Doingso by more than50 mV may corrupta temperaturemeasurements. (3) See theURL ”http://www.national.com/packaging/“forotherrecommendationsand methods ofsolderingsurfacemount devices. (4) Human body model,100pF dischargedthrougha 1.5kΩ resistor.Machine model,200pF dischargeddirectlyintoeach pin. Table1.ESD Protection Pin Name PIN D1 D2 D3 D4 D5 D6 R1 SNP ESD CLAM P VDD (V+) 1 x x D+ 2 x(1) x x x x x D − 3 x x x x x x T_CRIT_A 4 x x x ALERT 6 x x x SMBData 7 x x x SMBCLK 8 x (1) An “x”indicatesthatthediodeexists. Figure1. ESD ProtectionInputStructure

4 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 OperatingRatings OperatingTemperatureRange 0°C to+125°C ElectricalCharacteristicsTemperatureRange TMIN ≤TA≤TMAX LM86 0°C ≤TA≤+85°C SupplyVoltageRange (VDD ) +3.0V to+3.6V Temperature-to-DigitalConverterCharacteristics Unlessotherwisenoted,thesespecificationsapplyforVDD =+3.0Vdcto3.6Vdc.BoldfacelimitsapplyforTA = TJ = TMIN ≤TA ≤TMAX ;allotherlimitsTA= TJ=+25°C, unlessotherwisenoted. Parameter TestConditions Typical Limits Unit (1) (2) (Limit) TemperatureAccuracyUsingLocalDiode TA = +25°C to+125°C, (3) ±1 ±3 °C (max) TemperatureAccuracyUsingRemote Diodeof TA = +30°C TD = +80°C ±0.75 °C (max) TA = +0°C to+85°C TD = +25°C to ±3 °C (max)latestdata.(TD istheRemote DiodeJunction +125°CTemperature) Remote DiodeMeasurement Resolution 11 Bits 0.125 °C LocalDiodeMeasurement Resolution 8 Bits 1 °C ConversionTime ofAllTemperaturesattheFastest (4) 31.25 34.4 ms (max) Setting QuiescentCurrent(5) SMBus Inactive,16Hz conversionrate 0.8 1.7 mA (max) Shutdown 315 µA D − SourceVoltage 0.7 V DiodeSourceCurrent (D+ − D −)=+0.65V;highlevel 160 315 µA (max) 110 µA (min) Low level 13 20 µA (max) 7 µA (min) ALERT and T_CRIT_A OutputSaturationVoltage IOUT = 6.0mA 0.4 V (max) Power-On ResetThreshold Measure on VDD input,fallingedge 2.4 V (max)

1.8 V (min)

Localand Remote HIGH DefaultTemperature (6) +70 °C settings Localand Remote LOW DefaultTemperature (6) 0 °C settings Localand Remote T_CRIT DefaultTemperature (6) +85 °C Setting (1) TypicalvaluesareatTA = 25°C and representmost likelyparametricnorm. (2) LimitsareguaranteedtoNational's AOQL (AverageOutgoingQualityLevel). (3) Localtemperatureaccuracydoes notincludetheeffectsofself-heating.The riseintemperaturedue toself-heatingistheproductofthe internalpower dissipationoftheLM86 and thethermalresistance.See ()forthethermalresistancetobe used intheself-heating calculation. (4) Thisspecificationisprovidedonlytoindicatehow oftentemperaturedataisupdated.The LM86 can be readatany timewithoutregard toconversionstate(andwillyieldlastconversionresult). (5) Quiescentcurrentwillnotincreasesubstantiallywithan SMBus. (6) Defaultvaluessetatpower up. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com Logic ElectricalCharacteristics DIGITAL DC CHARACTERISTICS Unlessotherwisenoted,thesespecificationsapplyforVDD =+3.0to3.6Vdc.BoldfacelimitsapplyforTA = TJ = TMIN to TMAX ;allotherlimitsTA= TJ=+25°C, unlessotherwisenoted. Typical (1) Limits (2) UnitSymbol Parameter TestConditions (Limit) SMBData, SMBCLK INPUTS VIN(1) Logical“1”InputVoltage 2.1 V (min) VIN(0) Logical“0”InputVoltage 0.8 V (max) VIN(HYST) SMBData and SMBCLK DigitalInput 400 mV Hysteresis IIN(1) Logical“1”InputCurrent VIN = VDD 0.005 ±10 µA (max) IIN(0) Logical“0”InputCurrent VIN = 0 V −0.005 ±10 µA (max) C IN InputCapacitance 5 pF ALL DIGITAL OUTPUTS IOH HighLevelOutputCurrent VOH = VDD 10 µA (max) VOL SMBus Low LevelOutputVoltage IOL = 4mA 0.4 V (max) IOL = 6mA 0.6 (1) TypicalvaluesareatTA = 25°C and representmost likelyparametricnorm. (2) LimitsareguaranteedtoNational's AOQL (AverageOutgoingQualityLevel). SMBus DIGITAL SWITCHING CHARACTERISTICS Unlessotherwisenoted,thesespecificationsapplyforVDD =+3.0Vdc to+3.6Vdc,C L (loadcapacitance)on outputlines= 80 pF.BoldfacelimitsapplyforTA = TJ = TMIN toTMAX ;allotherlimitsTA = TJ = +25°C, unlessotherwisenoted. The switchingcharacteristicsoftheLM86 fullymeet orexceed thepublishedspecificationsoftheSMBus version2.0.The followingparametersarethetimingrelationshipsbetween SMBCLK and SMBData signalsrelatedtotheLM86. They adhere tobutarenotnecessarilytheSMBus bus specifications. Typical (1) Limits (2) UnitSymbol Parameter TestConditions (Limit) fSMB SMBus ClockFrequency 100 kHz (max) 10 kHz (min) tLOW SMBus ClockLow Time fromVIN(0)max toVIN(0)max 4.7 µs (min) 25 ms (max) tHIGH SMBus ClockHighTime fromVIN(1)min toVIN(1)min 4.0 µs (min) tR,SMB SMBus RiseTime (3) 1 µs (max) tF,SMB SMBus FallTime (4) 0.3 µs (max) tOF OutputFallTime C L = 400pF, 250 ns (max) IO = 3mA (4) tTIMEOUT SMBData and SMBCLK Time Low forResetof 25 ms (min) SerialInterface(5) 35 ms (max) tSU;DAT Data InSetupTime toSMBCLK High 250 ns (min) tHD;DAT Data Out StableafterSMBCLK Low 300 ns (min) 900 ns (max) tHD;STA StartConditionSMBData Low toSMBCLK Low 100 ns (min) (Startconditionholdbeforethefirstclock fallingedge) tSU;STO StopConditionSMBCLK HightoSMBData 100 ns (min) Low (StopConditionSetup) (1) TypicalvaluesareatTA = 25°C and representmost likelyparametricnorm. (2) LimitsareguaranteedtoNational's AOQL (AverageOutgoingQualityLevel). (3) The outputrisetimeismeasured from(VIN(0)max + 0.15V)to(VIN(1)min − 0.15V). (4) The outputfalltimeismeasured from(VIN(1)min -0.15V)to(VIN(1)min + 0.15V). (5) HoldingtheSMBData and/orSMBCLK linesLow fora timeintervalgreaterthantTIMEOUT willresettheLM86 's SMBus statemachine, thereforesettingSMBData and SMBCLK pinstoa highimpedance state.

6 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

P S VIH VI L SMBDAT tBUF tHD;STA tLOW tR tHD;DAT tHIGH tF tSU;DAT tSU;STA tSU;STO P LM86 www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 SMBus DIGITAL SWITCHING CHARACTERISTICS (continued) Unlessotherwisenoted,thesespecificationsapplyforVDD =+3.0Vdc to+3.6Vdc,C L (loadcapacitance)on outputlines= 80 pF.BoldfacelimitsapplyforTA = TJ = TMIN toTMAX ;allotherlimitsTA = TJ = +25°C, unlessotherwisenoted. The switchingcharacteristicsoftheLM86 fullymeet orexceed thepublishedspecificationsoftheSMBus version2.0.The followingparametersarethetimingrelationshipsbetween SMBCLK and SMBData signalsrelatedtotheLM86. They adhere tobutarenotnecessarilytheSMBus bus specifications. Typical (1) Limits (2) UnitSymbol Parameter TestConditions (Limit) tSU;STA SMBus Repeated Start-ConditionSetupTime, 0.6 µs (min) SMBCLK HightoSMBData Low tBUF SMBus FreeTime Between Stopand Start 1.3 µs (min) Conditions Figure2. SMBus Communication Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM86

0.01 0.1 1.0 10 100 CONVERSION RATE (Hz) 400 600 800 1000 1200 140 1600 1800 2000 SUPPLY CURRENT ( PA LM86 SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com FUNCTIONAL DESCRIPTION The LM86 temperaturesensorincorporatesa deltaVBE based temperaturesensorusinga Localor Remote diodeand a 10-bitplussignADC (Delta-SigmaAnalog-to-DigitalConverter).The LM86 iscompatiblewiththe serialSMBus version2.0two-wireinterface.Digitalcomparatorscompare themeasured LocalTemperature(LT) to the Local High (LHS),Local Low (LLS) and Local T_CRIT (LCS) user-programmabletemperaturelimit registers.The measured Remote Temperature(RT) isdigitallycompared to the Remote High (RHS), Remote Low (RLS) and Remote T_CRIT (RCS) user-programmabletemperaturelimitregisters.ActivationoftheALERT outputindicatesthata comparisonisgreaterthanthelimitpresetina T_CRIT orHIGH limitregisterorlessthan the limitpresetin a LOW limitregister.The T_CRIT_A outputresponds as a truecomparatorwithbuiltin hysteresis.The hysteresisissetby the valueplacedinthe Hysteresisregister(TH).Activationof T_CRIT_A occurswhen thetemperatureisabove theT_CRIT setpoint.T_CRIT_A remainsactivateduntilthetemperature goes below the setpointcalculatedby T_CRIT − TH. The hysteresisregisterimpacts both the remote temperatureand localtemperaturereadings. The LM86 may be placedina low power consumption(Shutdown)mode by settingtheRUN/STOP bitfoundin the Configurationregister.In the Shutdown mode, the LM86's SMBus interfaceremainswhileallcircuitrynot requiredisturnedoff. The Localtemperaturereadingand setpointdata registersare 8-bitswide.The formatof the 11-bitremote temperaturedata isa 16-bitleftjustifiedword.Two 8-bitregisters,highand low bytes,are providedforeach setpointas wellas the temperaturereading.Two offsetregisters(RTOLB and RTOHB) can be used to compensate fornonidealityerror.The remote temperaturereadingreportedisadjustedby subtractingfrom or addingtotheactualtemperaturereadingthevalueplacedintheoffsetregisters. CONVERSION SEQUENCE The LM86 takesapproximately31.25ms toconverttheLocalTemperature(LT),Remote Temperature(RT),and toupdateallofitsregisters.Only duringtheconversionprocessthebusy bit(D7)intheStatusregister(02h)is high.These conversionsareaddressedina roundrobinsequence.The conversionratemay be modifiedby the ConversionRate Register(04h).When theconversionrateismodifieda delayisinsertedbetween conversions, theactualconversiontimeremainsat31.25ms.Differentconversionrateswillcause theLM86 todraw different amounts ofsupplycurrentas shown inFigure3. Figure3.Conversion Rate Effecton Power Supply Current THE ALERT OUTPUT The LM86's ALERT pinisan active-lowopen-drainoutputthatistriggeredby a temperatureconversionthatis outsidethelimitsdefinedby thetemperaturesetpointregisters.Reset oftheALERT outputisdependentupon theselectedmethod ofuse.The LM86's ALERT pinisversatileand willaccommodate threedifferentmethods of use tobestservethesystem designer:as a temperaturecomparator,as a temperaturebased interruptflag,and as partofan SMBus ALERT system.The threemethods ofuse are furtherdescribedbelow.The ALERT and interruptmethods aredifferentonlyinhow theuserinteractswiththeLM86.

8 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

Status Register: RTDS High TIME TEMPERATURE LM86 www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 Each temperaturereading(LT and RT) isassociatedwitha T_CRIT setpointregister(LCS, RCS), a HIGH setpointregister(LHS and RHS) and a LOW setpointregister(LLS and RLS). At theend ofeverytemperature reading,a digitalcomparisondetermineswhetherthatreadingisabove itsHIGH orT_CRIT setpointorbelow its LOW setpoint.Ifso,thecorrespondingbitintheSTATUS REGISTER isset.IftheALERT mask bitisnothigh, any bitsetintheSTATUS REGISTER, withtheexceptionofBusy (D7)and OPEN (D2),willcause theALERT outputtobe pulledlow.Any temperatureconversionthatisoutofthelimitsdefinedby thetemperaturesetpoint registerswilltriggeran ALERT. Additionally,theALERT mask bitintheConfigurationregistermust be clearedto triggeran ALERT inallmodes. ALERT Output as a Temperature Comparator When theLM86 isimplementedina system inwhichitisnotservicedby an interruptroutine,theALERT output couldbe used as a temperaturecomparator.Under thismethod of use,once the conditionthattriggeredthe ALERT togo low isno longerpresent,theALERT isde-asserted(Figure4).For example,iftheALERT output was activatedby thecomparisonofLT > LHS, when thisconditionisno longertruetheALERT willreturnHIGH. Thismode allowsoperationwithoutsoftwareintervention,once allregistersareconfiguredduringset-up.Inorder fortheALERT to be used as a temperaturecomparator,bitD0 (theALERT configurebit)inthe FILTER and ALERT CONFIGURE REGISTER (xBF)must be sethigh.Thisisnotthepower on defaultstate. Figure4. ALERT Comparator Temperature Response Diagram ALERT Output as an Interrupt The LM86's ALERT outputcan be implementedas a simpleinterruptsignalwhen itisused totriggeran interrupt serviceroutine.Insuch systems itisundesirablefortheinterruptflagtorepeatedlytriggerduringor beforethe interruptserviceroutinehas been completed.Under thismethod of operation,duringa read of the STATUS REGISTER theLM86 willsettheALERT mask bit(D7 oftheConfigurationregister)ifany bitintheSTATUS REGISTER isset,withtheexceptionofBusy (D7)and OPEN (D2).ThispreventsfurtherALERT triggeringuntil themasterhas resettheALERT mask bit,attheend oftheinterruptserviceroutine.The STATUS REGISTER bitsareclearedonlyupon a readcommand fromthemaster(seeFigure5)and willbe re-assertedattheend of the nextconversionifthe triggeringcondition(s)persist(s).In orderfortheALERT to be used as a dedicated interruptsignal,bitD0 (theALERT configurebit)intheFILTER and ALERT CONFIGURE REGISTER (xBF)must be setlow.Thisisthepower on defaultstate. The followingsequence describestheresponseofa systemthatuses theALERT outputpinas a interruptflag: 1. MasterSenses ALERT low 2. MasterreadstheLM86 STATUS REGISTER todeterminewhat caused theALERT 3. LM86 clearsSTATUS REGISTER, resetsthe ALERT HIGH and sets the ALERT mask bit(D7 in the Configurationregister). 4. Masterattendstoconditionsthatcaused theALERT tobe triggered.The fanisstarted,setpointlimitsare adjusted,etc. 5. MasterresetstheALERT mask (D7 intheConfigurationregister). Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM86

Status Register: RTDS High End of Temperature conversion ALERT mask set in response to reading of status register by master LM86 SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com Figure5. ALERT Output as an InterruptTemperature Response Diagram ALERT Output as an SMBus ALERT When theALERT outputisconnectedtoone ormore ALERT outputsofotherSMBus compatibledevicesand to a master,an SMBus alertlineiscreated.Under thisimplementation,the LM86's ALERT shouldbe operated using the ARA (AlertResponse Address) protocol.The SMBus 2.0 ARA protocol,definedin the SMBus specification2.0,isa proceduredesignedtoassistthemasterinresolvingwhichpartgeneratedan interruptand servicethatinterruptwhileimpedingsystemoperationas littleas possible. The SMBus alertlineisconnectedto the open-drainportsof alldeviceson the bus therebyAND'ing them together.The ARA isa method by whichwithone command theSMBus mastermay identifywhichpartispulling theSMBus alertlineLOW and preventitfrom pullingitLOW againforthesame triggeringcondition.When an ARA command isreceivedby alldeviceson thebus,thedevicespullingtheSMBus alertlineLOW, first,send theiraddresstothemasterand second,releasetheSMBus alertlineafterrecognizinga successfultransmission oftheiraddress. The SMBus 1.1 and 2.0 specificationstatethatin response to an ARA (AlertResponse Address)“after acknowledgingtheslaveaddressthedevicemust disengageitsSMBALERT pulldown”.Furthermore,“ifthehost stillsees SMBALERT low when themessage transferiscomplete,itknows toreadtheARA again”.ThisSMBus “disengagingof SMBALERT ” requirementpreventslockingup the SMBus alertline.Competitivepartsmay addressthis“disengagingofSMBALERT ” requirementdifferentlythantheLM86 or notatall.SMBus systems thatimplementtheARA protocolas suggestedfortheLM86 willbe fullycompatiblewithallcompetitiveparts. The LM86 fulfills“disengagingof SMBALERT ” by settingthe ALERT mask bit(bitD7 in the Configuration register,at address09h) aftersuccessfullysendingout itsaddressinresponseto an ARA and releasingthe ALERT outputpin.Once theALERT mask bitisactivated,theALERT outputpinwillbe disableduntilenabledby software.InordertoenabletheALERT themastermust readtheSTATUS REGISTER, ataddress02h,during theinterruptserviceroutineand thenresettheALERT mask bitintheConfigurationregisterto0 attheend of theinterruptserviceroutine. The followingsequence describestheARA responseprotocol. 1. MasterSenses SMBus alertlinelow 2. Mastersends a START followedby theAlertResponse Address(ARA) witha Read Command. 3. AlertingDevice(s)send ACK. 4. AlertingDevice(s)send theirAddress.Whiletransmittingtheiraddress,alertingdevicessense whethertheir addresshas been transmittedcorrectly.(The LM86 willresetitsALERT outputand settheALERT mask bit once itscompleteaddresshas been transmittedsuccessfully.) 5. Master/slaveNoACK 6. Mastersends STOP 7. Masterattendstoconditionsthatcaused theALERT tobe triggered.The STATUS REGISTER isread and fanstarted,setpointlimitsadjusted,etc. 8. MasterresetstheALERT mask (D7 intheConfigurationregister).

10 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

LM86 ALERT pinStatus Register: RTDS High LM86 www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 The ARA, 000 1100,isa generalcalladdress.No deviceshouldeverbe assignedthisaddress. BitD0 (theALERT configurebit)intheFILTER and ALERT CONFIGURE REGISTER (xBF)must be setlow in orderfortheLM86 torespondtotheARA command. The ALERT outputcan be disabledby settingtheALERT mask bit,D7, oftheConfigurationregister.The power on defaultistohave theALERT mask bitand theALERT configurebitlow. Figure6. ALERT Output as an SMBus ALERT Temperature Response Diagram T_CRIT_A OUTPUT and T_CRIT LIMIT T_CRIT_A isactivatedwhen any temperaturereadingisgreaterthanthelimitpresetinthecriticaltemperature setpointregister(T_CRIT),as shown inFigure7. The StatusRegistercan be read to determinewhich event caused thealarm.A bitintheStatusRegisterissethightoindicatewhich temperaturereadingexceeded the T_CRIT setpointtemperatureand caused thealarm,see STATUS REGISTER (SR). Localand remotetemperaturediodesaresampled insequence by theA/D converter.The T_CRIT_A outputand theStatusRegisterflagsare updatedaftereveryLocaland Remote temperatureconversion.T_CRT_A follows the stateof the comparison,itisresetwhen the temperaturefallsbelow the setpointRCS-TH. The Status RegisterflagsareresetonlyaftertheStatusRegisterisreadand ifa temperatureconversion(s)is/arebelow the T_CRIT setpoint,as shown in.Figure7 Figure7. T_CRIT_A Temperature Response Diagram POWER ON RESET DEFAULT STATES LM86 always powers up to theseknown defaultstates.The LM86 remainsinthesestatesuntilafterthe first conversion. 1. Command Registersetto00h 2. LocalTemperaturesetto0°C 3. Remote DiodeTemperaturesetto0°C untiltheend ofthefirstconversion. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com 4. StatusRegistersetto00h. 5. Configurationregistersetto00h;ALERT enabled,Remote T_CRIT alarmenabledand LocalT_CRIT alarm enabled 6. 85°C Localand Remote T_CRIT temperaturesetpoints 7. 70°C Localand Remote HIGH temperaturesetpoints 8. 0°C Localand Remote LOW temperaturesetpoints 9. Filterand AlertConfigureRegistersetto00h;filterdisabled,ALERT outputsetas an SMBus ALERT 10. ConversionRate Registersetto8h;conversionratesetto16 conv./sec. SMBus INTERFACE The LM86 operatesas a slaveon the SMBus, so the SMBCLK lineisan inputand the SMBData lineisbi- directional.The LM86 never drivesthe SMBCLK lineand itdoes not supportclockstretching.Accordingto SMBus specifications,theLM86 has a 7-bitslaveaddress.AllbitsA6 throughA0 areinternallyprogrammed and can notbe changed by softwareorhardware. The completeslaveaddressis: A6 A5 A4 A3 A2 A1 A0 1 0 0 1 1 0 0 TEMPERATURE DATA FORMAT Temperaturedata can onlybe read from the Localand Remote Temperatureregisters;the setpointregisters (T_CRIT,LOW, HIGH) areread/write. Remote temperaturedataisrepresentedby an 11-bit,two'scomplement word withan LSB (LeastSignificantBit) equalto0.125°C. The dataformatisa leftjustified16-bitword availableintwo 8-bitregisters: Temperature DigitalOutput Binary Hex +125°C 0111 1101 0000 0000 7D00h +25°C 0001 1001 0000 0000 1900h +1°C 0000 0001 0000 0000 0100h +0.125°C 0000 0000 0010 0000 0020h 0°C 0000 0000 0000 0000 0000h −0.125°C 1111 1111 1110 0000 FFE0h −1°C 1111 1111 0000 0000 FF00h −25°C 1110 0111 0000 0000 E700h −55°C 1100 1001 0000 0000 C900h LocalTemperaturedataisrepresentedby an 8-bit,two'scomplement bytewithan LSB (LeastSignificantBit) equalto1°C: Temperature DigitalOutput Binary Hex +125°C 0111 1101 7Dh +25°C 0001 1001 19h +1°C 0000 0001 01h 0°C 0000 0000 00h −1°C 1111 1111 FFh −25°C 1110 0111 E7h −55°C 1100 1001 C9h

12 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 OPEN-DRAIN OUTPUTS The SMBData, ALERT and T_CRIT_A outputsareopen-drainoutputsand do nothave internalpull-ups.A “high” levelwillnotbe observedon thesepinsuntilpull-upcurrentisprovidedby some externalsource,typicallya pull- up resistor.Choiceofresistorvaluedepends on many system factorsbut,ingeneral,thepull-upresistorshould be as largeas possible.Thiswillminimizeany internaltemperaturereadingerrorsdue tointernalheatingofthe LM86. The maximum resistanceofthepull-uptoprovidea 2.1V highlevel,based on LM86 specificationforHigh LevelOutputCurrentwiththesupplyvoltageat3.0V,is82kΩ(5%) or88.7kΩ(1%). DIODE FAULT DETECTION The LM86 isequippedwithoperationalcircuitrydesignedtodetectfaultconditionsconcerningtheremotediode. IntheeventthattheD+ pinisdetectedas shortedtoVDD orfloating,theRemote TemperatureHighByte(RTHB) registerisloadedwith+127°C, the Remote TemperatureLow Byte (RTLB) registerisloadedwith0, and the OPEN bit(D2)inthestatusregisterisset.As a result,iftheRemote T_CRIT setpointregister(RCS) issettoa valuelessthan+127°C theALERT and T_Critoutputpinswillbe pulledlow,iftheAlertMask and T_CritMask aredisabled.IftheRemote HIGH SetpointHigh ByteRegister(RHSHB) issettoa valuelessthan+127°C then ALERT willbe pulledlow,iftheAlertMask isdisabled.The OPEN bititselfwillnottriggerand ALERT. IntheeventthattheD+ pinisshortedtoground or D −,theRemote TemperatureHigh Byte (RTHB) registeris loadedwith−128°C (10000000)and theOPEN bit(D2)inthestatusregisterwillnotbe set.Sinceoperatingthe LM86 at−128°C isbeyond it'soperationallimits,thistemperaturereadingrepresentsthisshortedfaultcondition. IfthevalueintheRemote Low SetpointHigh ByteRegister(RLSHB) ismore than−128°C and theAlertMask is disabled,ALERT willbe pulledlow. Remote diodetemperaturesensorsthathave been previouslyreleasedand arecompetitivewiththeLM86 output a code of0°C iftheexternaldiodeisshort-circuited.Thischange isan improvementthatallowsa readingof0°C tobe trulyinterpretedas a genuine0°C readingand nota faultcondition. COMMUNICATING WITH THE LM86 The dataregistersintheLM86 are selectedby theCommand Register.At power-uptheCommand Registeris set to “00”, the locationforthe Read LocalTemperatureRegister.The Command Registerlatchesthe last locationitwas setto.Each dataregisterintheLM86 fallsintoone offourtypesofuseraccessibility: 1. Read only 2. Writeonly 3. Read/Writesame address 4. Read/Writedifferentaddress A WritetotheLM86 willalwaysincludetheaddressbyteand thecommand byte.A writetoany registerrequires one databyte. Reading theLM86 can takeplaceeitheroftwo ways: 1. IfthelocationlatchedintheCommand Registeriscorrect(mostofthetimeitisexpectedthattheCommand Registerwillpointtoone oftheRead TemperatureRegistersbecause thatwillbe thedatamost frequently read from theLM86), thentheread can simplyconsistofan addressbyte,followedby retrievingthedata byte. 2. IftheCommand Registerneeds tobe set,thenan addressbyte,command byte,repeatstart,and another addressbytewillaccomplisha read. The databytehas themost significantbitfirst.At theend ofa read,theLM86 can accepteitheracknowledgeor No AcknowledgefromtheMaster(No Acknowledgeistypicallyused as a signalfortheslavethattheMasterhas readitslastbyte).IttakestheLM86 31.25ms tomeasure thetemperatureoftheremotediodeand internaldiode. When retrievingall10 bitsfroma previousremotediodetemperaturemeasurement,themastermust insurethat all10 bitsare from the same temperatureconversion.Thismay be achievedby usingone-shotmode or by settingtheconversionrateand monitoringthebusy bitsuch thatno conversionoccursinbetween readingthe MSB and LSB ofthelasttemperatureconversion. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com SMBus Timing Diagrams Figure8. (a)SerialBus WritetotheinternalCommand Registerfollowedby a theData Byte Figure9. (b)SerialBus WritetotheInternalCommand Register Figure10. (c)SerialBus Read from a RegisterwiththeInternalCommand Registerpresettodesired value SERIAL INTERFACE RESET IntheeventthattheSMBus MasterisRESET whiletheLM86 istransmittingon theSMBData line,theLM86 must be returnedtoa known stateinthecommunicationprotocol.Thismay be done inone oftwo ways: 1. When SMBData isLOW, theLM86 SMBus statemachine resetstotheSMBus idlestateifeitherSMBData or SMBCLK are heldlow formore than35ms (tTIMEOUT ).Note thataccordingtoSMBus specification2.0all devicesare totimeoutwhen eithertheSMBCLK or SMBData linesare heldlow for25-35ms.Therefore,to insurea timeoutofalldeviceson thebus theSMBCLK orSMBData linesmust be heldlowforatleast35ms. 2. When SMBData isHIGH, have the master initiatean SMBus start.The LM86 willrespond properlyto an SMBus startconditionatany pointduringthecommunication.AfterthestarttheLM86 willexpectan SMBus addressbyte.

14 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

TEMPERATURE ( oC) LM86 with Filter On LM86 with Filter Off LM86 www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 DIGITAL FILTER In orderto suppress erroneousremote temperaturereadingsdue to noise,the LM86 incorporatesa user- configureddigitalfilter.The filterisaccessed intheFILTER and ALERT CONFIGURE REGISTER atBFh. The filtercan be setaccordingtothefollowingtable. D2 D1 Filter 0 0 No Filter 0 1 Level1 1 0 Level1 1 1 Level2 Level2 setsmaximum filtering. Figure12 depictthefilteroutputtoinresponsetoa stepinputand an impulseinput.Figure13 depictsthedigital filterin use in a Pentium 4 processorsystem.Note thatthe two curves,withfilterand without,have been purposelyoffsetso thatboth responsescan be clearlyseen.Insertingthe filterdoes not inducean offsetas shown. Figure11.FilterOutput Response toa Step Input Figure12.FilterOutput Response toa Step Input a)Step Response b)Impulse Response A. The filteron and offcurveswere purposelyoffsettobettershow noiseperformance. Figure13. DigitalFilterResponse ina Pentium 4 processorSystem Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM86

Status Register: RTDS High LM86 SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com FaultQueue InordertosuppresserroneousALERT or T_CRIT triggeringtheLM86 incorporatesa FaultQueue. The Fault Queue actstoinsurea remotetemperaturemeasurement isgenuinelybeyond a HIGH, LOW orT_CRIT setpoint by not triggeringuntilthreeconsecutiveout of limitmeasurements have been made, see Figure14. The fault queue defaultsoffupon power-upand may be activatedby settingbitD0 intheConfigurationregister(09h)to “1”. Figure14. FaultQueue Temperature Response Diagram One-Shot Register The One-Shot registerisused toinitiatea singleconversionand comparisoncyclewhen thedeviceisinstandby mode, afterwhich the devicereturnsto standby.Thisisnot a data registerand itisthe writeoperationthat causes the one-shotconversion.The data writtento thisaddressisirrelevantand isnot stored.A zero will alwaysbe readfromthisregister.

16 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 LM86 REGISTERS COMMAND REGISTER Selectswhich registerswillbe read from or writtento.Data forthisregistershouldbe transmittedduringthe Command ByteoftheSMBus writecommunication. P7 P6 P5 P4 P3 P2 P1 P0 Command Select P0-P7:Command Select Command SelectAddress Power On DefaultState Register RegisterFunction NameRead Address WriteAddress <D7:D0> binary <D7:D0> decimal <P7:P0> hex <P7:P0> hex 00h NA 0000 0000 0 LT LocalTemperature 01h NA 0000 0000 0 RTHB Remote TemperatureHighByte 02h NA 0000 0000 0 SR StatusRegister 03h 09h 0000 0000 0 C Configuration 04h 0Ah 0000 1000 8 (16conv./sec) CR ConversionRate 05h 0Bh 0100 0110 70 LHS LocalHIGH Setpoint 06h 0Ch 0000 0000 0 LLS LocalLOW Setpoint 07h 0Dh 0100 0110 70 RHSHB Remote HIGH SetpointHighByte 08h 0Eh 0000 0000 0 RLSHB Remote LOW SetpointHighByte NA 0Fh One Shot Writingtothisregisterwillinitiate a one shotconversion 10h NA 0000 0000 0 RTLB Remote TemperatureLow Byte 11h 11h 0000 0000 0 RTOHB Remote TemperatureOffsetHigh Byte 12h 12h 0000 0000 0 RTOLB Remote TemperatureOffsetLow Byte 13h 13h 0000 0000 0 RHSLB Remote HIGH SetpointLow Byte 14h 14h 0000 0000 0 RLSLB Remote LOW SetpointLow Byte 19h 19h 0101 0101 85 RCS Remote T_CRIT Setpoint 20h 20h 0101 0101 85 LCS LocalT_CRIT Setpoint 21h 21h 0000 1010 10 TH T_CRIT Hysteresis B0h-BEh B0h-BEh ManufacturersTestRegisters BFh BFh 0000 0000 0 RDTF Remote DiodeTemperatureFilter FEh NA 0000 0001 1 RMID Read Manufacturer'sID FFh NA 0001 0001 17 RDR Read SteppingorDieRevision Code LOCAL and REMOTE TEMPERATURE REGISTERS (LT,RTHB, RTLB) Table2.LOCAL and REMOTE TEMPERATURE REGISTERS (LT,RTHB) (Read Only Address 00h,01h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 ForLT and RTHB D7 –D0: TemperatureData.LSB = 1°C. Two'scomplement format. Table3.LOCAL and REMOTE TEMPERATURE REGISTERS (RTLB) (Read Only Address 10h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com ForRTLB D7 –D5: TemperatureData.LSB = 0.125°C. Two'scomplement format. The maximum valueavailablefromtheLocalTemperatureregisteris127;theminimum valueavailablefromthe LocalTemperatureregisteris-128.The maximum valueavailablefrom the Remote Temperatureregisteris 127.875;theminimum valueavailablefromtheRemote Temperatureregistersis−128.875. STATUS REGISTER (SR) Table4.STATUS REGISTER (SR)(Read Only Address 02h): D7 D6 D5 D4 D3 D2 D1 D0 Busy LHIGH LLOW RHIGH RLOW OPEN RCRIT LCRIT Power up defaultiswithallbits“0”(zero). D0: LCRIT:When setto“1”indicatesa LocalCriticalTemperaturealarm. D1: RCRIT: When setto“1”indicatesa Remote DiodeCriticalTemperaturealarm. D2: OPEN: When setto“1”indicatesa Remote Diodedisconnect. D3: RLOW: When setto“1”indicatesa Remote DiodeLOW Temperaturealarm D4: RHIGH: When setto“1”indicatesa Remote DiodeHIGH Temperaturealarm. D5: LLOW: When setto“1”indicatesa LocalLOW Temperaturealarm. D6: LHIGH: When setto“1”indicatesa LocalHIGH Temperaturealarm. D7: Busy:When setto“1”ADC isbusy converting. CONFIGURATION REGISTER Table5.CONFIGURATION REGISTER (Read Address 03h /WriteAddress 09h): D7 D6 D5 D4 D3 D2 D1 D0 ALERT mask RUN/STOP 0 Remote 0 Local 0 FaultQueue T_CRIT_A T_CRIT_A mask mask Power up defaultiswithallbits“0”(zero) D7: ALERT mask: When setto“1”ALERT interruptsaremasked. D6: RUN/STOP: When setto“1”SHUTDOWN isenabled. D5: isnotdefinedand defaultsto“0”. D4: Remote T_CRIT mask: When setto“1”a diodetemperaturereadingthatexceeds T_CRIT setpointwillnot activatetheT_CRIT_A pin. D3: isnotdefinedand defaultsto“0”. D2: LocalT_CRIT mask: When setto “1” a Localtemperaturereadingthatexceeds T_CRIT setpointwillnot activatetheT_CRIT_A pin. D1: isnotdefinedand defaultsto“0”. D0: FaultQueue: when setto“1”threeconsecutiveremotetemperaturemeasurements outsidetheHIGH, LOW, or T_CRIT setpointswilltriggeran “OutsideLimit” conditionresultinginsettingof statusbitsand associated outputpins..

18 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 CONVERSION RATE REGISTER Table6.CONVERSION RATE REGISTER (Read Address 04h /WriteAddress 0Ah) Value Conversion Rate 00 62.5mHz 01 125 mHz 02 250 mHz 03 500 mHz 04 1 Hz 05 2 Hz 06 4 Hz 07 8 Hz 08 16 Hz 09 32 Hz 10-255 Undefined LOCAL and REMOTE HIGH SETPOINT REGISTERS (LHS,RHSHB, and RHSLB) Table7.LOCAL and REMOTE HIGH SETPOINT REGISTERS (LHS,RHSHB) (Read Address 05h,07h /Write Address 0Bh, 0Dh): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For LHS and RHSHB: HIGH setpointtemperaturedata.Power up defaultisLHIGH = RHIGH = 70°C. 1LSB = 1°C. Two'scomplement format. Table8.LOCAL and REMOTE HIGH SETPOINT REGISTERS (RHSLB) (Read/WriteAddress 13h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 For RHSLB: Remote HIGH SetpointLow Byte temperaturedata.Power up defaultis0°C. 1LSB = 0.125°C. Two'scomplement format. LOCAL and REMOTE LOW SETPOINT REGISTERS (LLS,RLSHB, and RLSLB) Table9.LOCAL and REMOTE LOW SETPOINT REGISTERS (LLS,RLSHB) (Read Address 06h,08h,/Write Address 0Ch, 0Eh): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For LLS and RLSHB: HIGH setpointtemperaturedata.Power up defaultisLHIGH = RHIGH = 0°C. 1LSB = 1°C. Two'scomplement format. Table10.LOCAL and REMOTE LOW SETPOINT REGISTERS (RLSLB) (Read/WriteAddress 14h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 ForRLSLB: Remote HIGH SetpointLow Bytetemperaturedata.Power up defaultis0°C. 1LSB = 0.125°C. Two's complement format. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com REMOTE TEMPERATURE OFFSET REGISTERS (RTOHB and RTOLB) Table11.REMOTE TEMPERATURE OFFSET REGISTERS (RTOHB) (Read/WriteAddress 11h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For RTOHB: Remote TemperatureOffsetHigh Byte.Power up defaultisLHIGH = RHIGH = 0°C. 1LSB = 1°C. Two'scomplement format. Table12.REMOTE TEMPERATURE OFFSET REGISTERS (RTOLB) (Read/WriteAddress 12h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 For RTOLB: Remote Temperature OffsetHigh Byte. Power up defaultis 0°C. 1LSB = 0.125°C. Two's complement format. The offsetvalue writtento these registerswillautomaticallybe added to or subtractedfrom the remote temperaturemeasurement thatwillbe reportedintheRemote Temperatureregisters. LOCAL and REMOTE T_CRIT REGISTERS (RCS and LCS) Table13.LOCAL and REMOTE T_CRIT REGISTERS (RCS and LCS) (Read/WriteAddress 20h,19h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 D7 –D0: T_CRIT setpointtemperaturedata.Power up defaultisT_CRIT = 85°C. 1 LSB = 1°C, two'scomplement format. T_CRIT HYSTERESIS REGISTER (TH) Table14.T_CRIT HYSTERESIS REGISTER (TH)(Read and WriteAddress 21h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 16 8 4 2 1 D7 –D0: T_CRIT Hysteresistemperature.Power up defaultisTH = 10°C. 1 LSB = 1°C, maximum value= 31. FILTER and ALERT CONFIGURE REGISTER Table15.FILTER and ALERT CONFIGURE REGISTER (Read and WriteAddress BFh): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0 0 0 0 0 FilterLevel ALERT Configure D7-D3:isnotdefineddefaultsto"0". D2-D1:inputfiltersettingas definedthetablebelow: D2 D1 FilterLevel 0 0 No Filter 0 1 Level1 1 0 Level1 1 1 Level2

20 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 Level2 setsmaximum filtering. D0: when setto"1"comparatormode isenabled. MANUFACTURERS ID REGISTER (Read AddressFEh) Defaultvalue01h. DIE REVISION CODE REGISTER (Read Address FFh) Defaultvalue11hexadecimalor 17 decimal.Thisregisterwillincrementby 1 everytime thereisa revisiontothedieby NationalSemiconductor. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM86

Vt = k T q IF = IS e - 1 Vbe KVt LM86 SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com APPLICATION HINTS The LM86 can be appliedeasilyinthesame way as otherintegrated-circuittemperaturesensors,and itsremote diodesensingcapabilityallowsittobe used innew ways as well.Itcan be solderedtoa printedcircuitboard, and because thepathofbestthermalconductivityisbetween thedieand thepins,itstemperaturewilleffectively be thatoftheprintedcircuitboardlandsand tracessolderedtotheLM86's pins.Thispresumes thattheambient airtemperatureisalmostthesame as thesurfacetemperatureoftheprintedcircuitboard;iftheairtemperature ismuch higherorlowerthanthesurfacetemperature,theactualtemperatureoftheoftheLM86 diewillbe atan intermediatetemperaturebetween thesurfaceand airtemperatures.Again,theprimarythermalconductionpath isthroughtheleads,so thecircuitboardtemperaturewillcontributetothedietemperaturemuch more strongly thanwilltheairtemperature. To measure temperatureexternaltotheLM86's die,use a remotediode.Thisdiodecan be locatedon thedieof a targetIC,allowingmeasurement oftheIC'stemperature,independentoftheLM86's temperature.The LM86 has been optimizedtomeasure theremote diodeofa Pentium IIIprocessoras shown inFigure15.A discrete diodecan alsobe used tosense thetemperatureofexternalobjectsor ambientair.Remember thata discrete diode'stemperaturewillbe affected,and oftendominated,by thetemperatureofitsleads. Figure15. MobilePentium IIIor 3904 Temperature vs LM86 Temperature Reading Most silicondiodesdo notlendthemselveswelltothisapplication.Itisrecommended thata 2N3904 transistor base emitterjunctionbe used withthecollectortiedtothebase. A diodeconnected2N3904 approximatesthejunctionavailableon a PentiumIIImicroprocessorfortemperature measurement.Therefore,theLM86 can sense thetemperatureofthisdiodeeffectively. DIODE NONIDEALITY Diode NonidealityFactorEffecton Accuracy When a transistorisconnectedas a diode,thefollowingrelationshipholdsforvariablesVBE ,T and If: (1) where: (2)

• q = 1.6×10−19 Coulombs (theelectroncharge),
• T = AbsoluteTemperatureinKelvin
• k = 1.38×10−23joules/K(Boltzmann'sconstant),
• η isthenonidealityfactoroftheprocessthediodeismanufacturedon,
• IS = SaturationCurrentand isprocessdependent,
• If= ForwardCurrentthroughthebase emitterjunction
• VBE = Base EmitterVoltagedrop Intheactiveregion,the-1termisnegligibleand may be eliminated,yieldingthefollowingequation

22 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

Vbe = K ln (N) k T q IF = IS e Vbe KVt LM86 www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 (3) Intheabove equation,η and IS aredependantupon theprocessthatwas used inthefabricationoftheparticular diode.By forcingtwo currentswitha verycontrolledration(N)and measuringtheresultingvoltagedifference,it ispossibletoeliminatetheIS term.Solvingfortheforwardvoltagedifferenceyieldstherelationship: (4) The nonidealityfactor,η,istheonlyotherparameternotaccountedforand depends on thediodethatisused for measurement. Since ΔVBE isproportionalto both η and T, the variationsin η cannot be distinguishedfrom variationsintemperature.Sincethenonidealityfactorisnotcontrolledby thetemperaturesensor,itwilldirectly add totheinaccuracyofthesensor.For thePentiumIIIIntelspecifiesa ±1% variationinη fromparttopart.As an example,assume a temperaturesensorhas an accuracyspecificationof±1°C atroom temperatureof25 °C and theprocessused tomanufacturethediodehas a nonidealityvariationof±1%. The resultingaccuracyofthe temperaturesensoratroom temperaturewillbe: The additionalinaccuracyinthetemperaturemeasurement caused by η,can be eliminatedifeach temperature sensoriscalibratedwiththeremote diodethatitwillbe pairedwith.The followingtableshows thevariationsin nonidealityfora varietyofprocessors. Processor Family η,nonideality min typ max PentiumII 1 1.0065 1.0173 PentiumIIICPUID 67h 1 1.0065 1.0125 PentiumIIICPUID 68h/PGA370Socket/Celeron 1.0057 1.008 1.0125 Pentium4,423 pin 0.9933 1.0045 1.0368 Pentium4,478 pin 0.9933 1.0045 1.0368 MMBT3904 1.003 AMD AthlonMP model 6 1.002 1.008 1.016 Compensating forDiode Nonideality In orderto compensate forthe errorsintroducedby nonideality,the temperaturesensor iscalibratedfora particularprocessor.NationalSemiconductortemperaturesensorsarealwayscalibratedtothetypicalnonideality ofa givenprocessortype.The LM86 iscalibratedforthenonidealityofa mobilePentium IIIprocessor,1.008. When a temperaturesensorcalibratedfora particularprocessortypeisused witha differentprocessortypeora givenprocessortypehas a nonidealitythatstraysfrom thetypical,errorsare introduced.Figure16 shows the minimum and maximum errorsintroducedtoa temperaturesensorcalibratedspecificallytothetypicalvalueof theprocessortypeitisconnectedto.The errorsinthisfigureare attributedonlytothevariationinnonideality fromthetypicalvalue.InFigure17 isa plotoftheerrorsthatresultfromusinga temperaturesensorcalibrated fora PentiumII,theLM84, witha typicalPentium4 orAMD AthlonMP Model 6. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LM86

-0.4 -0.35 -0.3 -0.25 -0.2 -0.15 -0.1 -0.05 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 -60 -40 -20 0 20 40 60 80 TEMPERATURE ( oC) TEMPERATURE SHIFT ( oC) 100 120 140 n_ideality =1.008 using LM84. n_ideality =1.0045 using LM84. -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE ( oC) ERROR ( oC) Pentium 4 Pentium III CPUID 68h/Celeron Pentium 4 Pentium II n_ideality =1.008 using LM84. n_ideality =1.008 using LM86. n_ideality =1.0045 using LM84. TEMPERATURE (° C) TEMPERATURE SHIFT (° C) -0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 -60 -40 -20 0 20 40 60 80 100 120 140 LM86 SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com Figure16.ErrorCaused by NonidealityFactor Figure17.ErrorsInduced when Temperature Sensor isNot CalibratedtoTypicalNonideality Figure18.Compensating foran UntargetedNonidealityFactor Temperatureerrorsassociatedwithnonidealitymay be reduced in a specifictemperaturerange of concern throughuse of the offsetregisters(11h and 12h).Figure18 shows how the offsetregistermay be used to compensate forthenonidealityerrorsshown inFigure17.For thecase ofnonideality=1.008,theoffsetregister was setto−0.5°C resultinginthecalculatedresidualerroras shown inFigure18.Thisoffsethas resultedinan erroroflessthan0.05°C forthetemperaturesmeasured inthecriticalrangebetween 60 to100°C. Thismethod yieldsa firstordercorrectionfactor. Pleasesend an emailtohardware.monitor.team@nsc.comrequestingfurtherinformationon our recommended settingoftheoffsetregisterfordifferentprocessortypes. PCB LAYOUT FOR MINIMIZING NOISE Figure19. IdealDiode Trace Layout

24 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com SNIS114E –DECEMBER 2001–REVISED MARCH 2013 Ina noisyenvironment,such as a processormotherboard,layoutconsiderationsareverycritical.Noiseinduced on tracesrunningbetween the remote temperaturediode sensor and the LM86 can cause temperature conversionerrors.Keep inmind thatthesignalleveltheLM86 istryingtomeasure isinmicrovolts.The following guidelinesshouldbe followed: 1. Placea 0.1µF power supplybypass capacitoras closeas possibletotheVDD pinand therecommended 2.2 nF capacitoras closeas possibletotheLM86's D+ and D − pins.Make surethetracestothe2.2nFcapacitor arematched. 2. The recommended 2.2nF diodebypass capacitoractuallyhas a range of TBDpF to 3.3nF.The average temperatureaccuracywillnot degrade.Increasingthe capacitancewilllowerthe cornerfrequencywhere differentialnoise erroraffectsthe temperaturereadingthus producinga readingthatis more stable. Conversely,loweringthecapacitancewillincreasethecornerfrequencywhere differentialnoiseerroraffects thetemperaturereadingthusproducinga readingthatislessstable. 3. Ideally,theLM86 shouldbe placedwithin10cm oftheProcessordiodepinswiththetracesbeingas straight, shortand identicalas possible.Traceresistanceof1Ω can cause as much as 1°C oferror.Thiserrorcan be compensated by usingtheRemote TemperatureOffsetRegisters,sincethevalueplacedintheseregisters willautomaticallybe subtractedfromoradded totheremotetemperaturereading. 4. Diode tracesshouldbe surroundedby a GND guard ringtoeitherside,above and below ifpossible.This GND guard shouldnotbe between theD+ and D − lines.Intheeventthatnoisedoes coupletothediode linesitwouldbe idealifitiscoupledcommon mode. ThatisequallytotheD+ and D − lines. 5. Avoidroutingdiodetracesincloseproximitytopower supplyswitchingorfilteringinductors. 6. Avoidrunningdiodetracesclosetoor paralleltohighspeed digitaland bus lines.Diode tracesshouldbe keptatleast2cm apartfromthehighspeed digitaltraces. 7. Ifitisnecessarytocrosshighspeed digitaltraces,thediodetracesand thehighspeed digitaltracesshould crossata 90 degreeangle. 8. The idealplacetoconnecttheLM86's GND pinisas closeas possibletotheProcessorsGND associated withthesense diode. 9. Leakage currentbetween D+ and GND shouldbe keptto a minimum. One nano-ampere of leakagecan cause as much as 1°C oferrorinthediodetemperaturereading.Keepingtheprintedcircuitboardas clean as possiblewillminimizeleakagecurrent. Noisecouplingintothedigitallinesgreaterthan400mVp-p (typicalhysteresis)and undershootlessthan500mV below GND, may preventsuccessfulSMBus communicationwiththeLM86. SMBus no acknowledgeisthemost common symptom, causing unnecessary trafficon the bus. Althoughthe SMBus maximum frequencyof communicationisratherlow (100kHz max), care stillneeds to be takento ensure properterminationwithina system withmultiplepartson the bus and longprintedcircuitboard traces.An RC lowpass filterwitha 3db cornerfrequencyofabout40MHz isincludedon theLM86's SMBCLK input.Additionalresistancecan be added inserieswiththeSMBData and SMBCLK linestofurtherhelpfilternoiseand ringing.Minimizenoisecouplingby keepingdigitaltracesoutofswitchingpower supplyareasas wellas ensuringthatdigitallinescontaininghigh speed datacommunicationscrossatrightanglestotheSMBData and SMBCLK lines. Copyright© 2001–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LM86

SNIS114E –DECEMBER 2001–REVISED MARCH 2013 www.ti.com DATA SHEET REVISION HISTORY Date Revision 4/2003 1. Added improvedguaranteedTemperatureErrorspecificationfortheRemote Diode Readingsof±0.75ºC topage 1 and ElectricalCharacteristics. 2. inDIE REVISION CODE REGISTER changed "21h"to"11hexadecimalor17 decimal" 3. Changed numberingof"ApplicationsHints"from"4."to"3." 4. Added "Data SheetRevisionHistory"section. 3/2013 Changed layoutofNationalData SheettoTIformat

26 SubmitDocumentationFeedback Copyright© 2001–2013,Texas InstrumentsIncorporated

ProductFolderLinks:LM86

www.ti.com 29-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM86CIM NRND Production SOIC (D) | 8 95 | TUBE No Call TI Level-1-235C-UNLIM 0 to 125 LM86 CIM LM86CIM.A NRND Production SOIC (D) | 8 95 | TUBE No Call TI Level-1-235C-UNLIM 0 to 125 LM86 CIM LM86CIM/NOPB Obsolete Production SOIC (D) | 8 - - Call TI Call TI 0 to 125 LM86 CIM LM86CIMM/NOPB Obsolete Production VSSOP (DGK) | 8 - - Call TI Call TI 0 to 125 T10C LM86CIMMX/NOPB Active Production VSSOP (DGK) | 8 3500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 125 T10C LM86CIMMX/NOPB.A Active Production VSSOP (DGK) | 8 3500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 125 T10C LM86CIMX/NOPB Active Production SOIC (D) | 8 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 125 LM86 CIM LM86CIMX/NOPB.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM 0 to 125 LM86 CIM (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Addendum-Page 1

www.ti.com 29-May-2025 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM86CIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM86CIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) LM86CIM D SOIC 8 95 495 8 4064 3.05 LM86CIM D SOIC 8 95 495 8 4064 3.05 LM86CIM.A D SOIC 8 95 495 8 4064 3.05 LM86CIM.A D SOIC 8 95 495 8 4064 3.05 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05

4.75 TYP

0.15 0.05 0.25 GAGE PLANE 0 -8

1.1 MAX

0.23 0.13 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023

0.13 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. A 20 DETAIL A TYPICAL SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated