LM833_05 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Low V oltage Noise: 4.5 nV/ Hz/C0504
  • High Gain Bandwidth Product: 15 MHz
  • High Slew Rate: 7.0 V//C0109s
  • Low Input Offset V oltage: 0.3 mV
  • Low T.C. of Input Offset V oltage: 2.0 /C0109V/°C
  • Low Distortion: 0.002%
  • Excellent Frequency Stability
  • Dual Supply Operation
  • Pb−Free Packages are Available MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage (VCC to VEE) VS +36 V Input Differential Voltage Range (Note 1) VIDR 30 V Input Voltage Range (Note 1) VIR ±15 V Output Short Circuit Duration (Note 2) tSC Indefinite Operating Ambient Temperature Range TA −40 to +85 °C Operating Junction Temperature TJ +150 °C Storage Temperature Tstg −60 to +150 °C ESD Protection at any Pin − Human Body Model − Machine Model Vesd 600 200 V Maximum Power Dissipation (Notes 2 and 3) PD 500 mW Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Either or both input voltages must not exceed the magnitude of V CC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (T J) is not exceeded (see power dissipation performance characteristic). 3. Maximum value at T A ≤ 85°C. PDIP−8 N SUFFIX CASE 626 SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAMS LM833 = Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week /C0071 = Pb−Free Package PIN CONNECTIONS (Top View) Output 1 Inputs 1 Output 2 Inputs 2 VEE VCC LM833N AWL YYWWG http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

/C0071 LM833N = Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package

http://onsemi.com Figure 21. Inverting Amplifier Figure 22. Noninverting Amplifier Slew Rate Figure 23. Noninverting Amplifier Overshoot Device Package Shipping† LM833N PDIP−8

50 Units / RailLM833NG PDIP−8

(Pb−Free) LM833D SOIC−8

98 Units / RailLM833DG SOIC−8

(Pb−Free) LM833DR2 SOIC−8 2500 / Tape & ReelLM833DR2G SOIC−8 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AG SEATING PLANE N J X 45/C0095 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M /C0095/C0095/C0095/C0095 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 /C0466mm inches/C0467SCALE 6:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT*

http://onsemi.com PACKAGE DIMENSIONS PDIP−8 N SUFFIX CASE 626−05 ISSUE L NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. F NOTE 2 −A− −B− −T− SEATING PLANE H J G D K N C L M MAM0.13 (0.005) B MT DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.40 10.16 0.370 0.400 B 6.10 6.60 0.240 0.260 C 3.94 4.45 0.155 0.175 D 0.38 0.51 0.015 0.020 F 1.02 1.78 0.040 0.070 G 2.54 BSC 0.100 BSC H 0.76 1.27 0.030 0.050 J 0.20 0.30 0.008 0.012 K 2.92 3.43 0.115 0.135 L 7.62 BSC 0.300 BSC N 0.76 1.01 0.030 0.040 /C0095/C0095 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 LM833/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.