LMH6629_1011 NSC | Alldatasheet
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Technical content
Features
Specified for VS = 5V, RL = 100Ω, AV = 10V/V LLP-8 package, unless specified ■ –3dB bandwidth 900 MHz ■ Input voltage noise 0.69 nV/√Hz ■ Input offset voltage max. over temperature ±0.8 mV ■ Slew rate 1600 V/ μs ■ HD2 @ f = 1MHz, 2VPP −90 dBc ■ HD3 @ f = 1MHz, 2VPP −94 dBc ■ Supply voltage range 2.7V to 5.5V ■ Typical supply current 15.5 mA ■ Selectable min. gain ≥4 or ≥10 V/V ■ Enable Time 75 ns ■ Output Current ±250 mA ■ LLP-8 and SOT23-5 Packages
Applications
■ Instrumentation Amplifiers ■ Ultrasound Pre-amps ■ Wide-band Active Filters ■ Opto-electronics ■ Medical imaging systems ■ Base-station Amplifiers ■ Low-Noise Single Ended to Differential Conversion ■ Trans-impedance amplifier Typical Application Circuit 30068011 FIGURE 1. Transimpedance Amplifier
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing LLP-8 LMH6629SD L6629 1k Units Tape and Reel SDA08ALMH6629SDE 250 Units Tape and Reel LMH6629SDX 4.5k Units Tape and Reel SOT23-5 LMH6629MF AE7A 1k Units Tape and Reel MF05ALMH6629MFE 250 Units Tape and Reel LM6629MFX 3k Units Tape and Reel Connection Diagrams 30068052 LLP-8 (Top View) 30068001 SOT23-5 (Top View) www.national.com 2 LMH6629
Absolute Maximum Ratings (Note 1, Note If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 4) Human Body Model 2kV Machine Model 200V Charge-Device Model 750V Positive Supply Voltage −0.5 to 6.0V Differential Input Voltage 3V Analog Input Voltage Range −0.5 to VS Digital Input Voltage −0.5 to VS Junction Temperature +150°C Storage Temperature Range −65°C to +150°C Soldering Information See Product Folder at www.national.com and http:// www.national.com/ms/MS/MS-SOLDERING.pdf Operating Ratings (Note 1) Supply Voltage (V+ - V− 2.7V to 5.5V Operating Temperature Range −40°C to +125°C Package (θJA) LLP-8 71°C/W SOT23-5 179°C/W The following specifications apply for single supply with VS = 5V, RL = 100Ω terminated to 2.5V, gain = 10V/V, VO = 2VPP, VCM = VS/2, COMP Pin = HI (LLP-8 package), unless otherwise noted. Boldface limits apply at the temperature extremes. (Note 2). Symbol Parameter Conditions Min (Note 6) Typ (Note 6) Max (Note 6) Units DYNAMIC PERFORMANCE SSBW Small signal −3dB bandwidth VO = 200 mVPP, LLP-8 package 900 MHzVO = 200 mVPP, SOT23-5 package 1000 AV= 4, VO = 200 mVPP, COMP Pin = LO 800 LSBW Large signal −3dB bandwidth VO = 2VPP 380 MHzCOMP Pin = LO, AV= 4, VO = 2VPP 190 0.1 dB bandwidth AV= 10, VO = 200 mVPP, LLP-8 package 330 MHzAV= 10, VO = 200 mVPP, SOT23-5 package 190 AV= 4, VO = 200 mVPP, COMP Pin = LO 95 Peaking VO = 200 mVPP, LLP-8 package 0 dBVO = 200 mVPP, SOT23-5 package 2 SR Slew rate AV= 10, 2V step 1600 V/μsAV= 4, 2V step, COMP Pin = LO 530 tr/ tf Rise/fall time AV= 10, 2V step, 10% to 90%, LLP-8 package 0.90 ns AV= 10, 2V step, 10% to 90%, SOT23-5 package 0.95 AV= 4, 2V step, 10% to 90%, COMP Pin = LO, (Slew Rate Limited) 2.8 Ts Settling time AV= 10, 1V step, ±0.1% 42 Overload Recovery VIN = 1VPP 2 3 www.national.com LMH6629
Symbol Parameter Conditions Min (Note 6) Typ (Note 6) Max (Note 6) Units NOISE AND DISTORTION HD2 2nd order distortion fc = 1MHz, VO = 2VPP −90 dBc COMP Pin = LO, AV= 4, fc = 1 MHz, VO = 2VPP −88 fc = 10 MHz, VO = 2VPP −70 COMP Pin = LO, fc = 10 MHz, AV= 4V, VO = 2VPP −65 HD3 3rd order distortion fc = 1MHz, VO = 2VPP −94 dBc COMP Pin = LO, AV= 4, fc = 1MHz, VO = 2VPP −87 fc = 10 MHz, VO = 2VPP −82 COMP Pin = LO, fc = 10 MHz, VO = 2VPP −75 OIP3 Two-tone 3rd order intercept point fc = 25 MHz, VO = 2 VPP composite 31 dBmfc = 75 MHz, VO = 2VPP composite 27 en Noise Voltage Input referred f > 1MHz 0.69 nV/√Hz in Noise current 2.6 pA/√Hz NF Noise Figure RS = RT = 50Ω 8.0 dB ANALOG I/O CMVR Input voltage range CMRR > 70 dB, LLP-8 package −0.30 3.8 VCMRR > 70 dB, SOT23-5 package −0.30 to 3.8 VO Output voltage range RL = 100Ω to VS/2 0.89 0.95 0.82 to 4.19 4.0 3.9 V No Load 0.76 0.85 0.72 to 4.28 4.1 4.0 IOUT Linear output current VO = 2.5V (Note 3) 250 mA VOS Input offset voltage ±150 ±780 ±800 µV TcVOS Input offset voltage temperature drift (Note 7) ±0.45 μV/°C IBI Input bias current (Note 6) −15 −23 −37 μA IOS Input offset current ±0.1 ±1.8 ±3.0 μA TCIOS Input offset voltage temperature drift (Note 7) ±2.8 nA/°C CCM Input capacitance Common Mode 1.7 pF RCM Input resistance Common Mode 450 kΩ MISCELLANEOUS PARAMETERS CMRR Common mode rejection ratio VCM from 0V to 3.7V, LLP-8 package 82 70 87 dB VCM from 0V to 3.7V, SOT23-5 package 87 PSRR Power supply rejection ratio 81 78 83 AVOL Open loop gain LLP-8 package 74 72 78 SOT23-5 package 78 www.national.com 4 LMH6629
Symbol Parameter Conditions Min (Note 6) Typ (Note 6) Max (Note 6) Units DIGITAL INPUTS/TIMING VIL Logic low-voltage threshold PD and COMP pins, , LLP-8 package 0.8 V VIH Logic high-voltage threshold PD and COMP pins, LLP-8 package 2.5 IIL Logic low-bias current PD and COMP pins = 0.8V, , LLP-8 package(Note 6) −23 −19 −28 −34 −38 µA IIH Logic high-bias current PD and COMP pins = 2.5V, LLP-8 package(Note 6) −16 −14 −22 −27 −29 Ten Enable time LLP-8 package 75 nsTdis Disable time LLP-8 package 80 POWER REQUIREMENTS IS Supply Current No Load, Normal Operation (PD Pin = HI or open for LLP-8 package) 15.5 16.7 18.2 mANo Load, Shutdown (PD Pin =LO for LLP-8 package) 1.1 1.85 2.0 5 www.national.com LMH6629
3.3V Electrical Characteristics The following specifications apply for single supply with VS = 3.3V, RL = 100Ω terminated to 1.65V, gain = 10V/V, VO = 1VPP, VCM = VS/2, COMP Pin = HI (LLP-8 package), unless otherwise noted. Boldface limits apply at the temperature extremes. (Note Symbol Parameter Conditions Min (Note 5) Typ (Note 5) Max (Note 5) Units DYNAMIC PERFORMANCE SSBW Small signal −3dB bandwidth VO = 200 mVPP, LLP-8 package 820 MHzVO = 200 mVPP, SOT23-5 package 950 COMP Pin = LO, AV= 4, VO = 200 mVPP 730 LSBW Large signal −3dB bandwidth VO = 1VPP 540 MHzCOMP Pin = LO, AV= 4, VO = 1VPP 320 0.1 dB bandwidth AV= 10, VO = 200 mVPP, LLP-8 package 330 MHzAV= 10, VO = 200 mVPP, SOT23-5 package 190 COMP Pin = LO, AV= 4, VO = 200 mVPP Peaking VO = 200 mVPP, LLP-8 package 0 dBVO = 200 mVPP, SOT23-5 package 1.8 SR Slew rate AV= 10, 1.3V step 1100 V/µsCOMP Pin = LO, AV= 4, 1.3V step 500 tr/ tf Rise/fall time AV= 10, 1V step, 10% to 90%, LLP-8 package 0.7 ns AV= 10, 1V step, 10% to 90%, SOT23-5 package 0.55 AV= 4, COMP Pin = LO, 1V step, 10% to 90% (Slew Rate Limited) 1.3 Ts Settling time AV= 10, 1V step, ±0.1% 70 Overload Recovery VIN = 1VPP 2 NOISE AND DISTORTION HD2 2nd order distortion fc = 1MHz, VO = 1VPP –82 dBc COMP Pin = LO, AV= 4, fc = 1MHz, VO = 1VPP -88 fc = 10 MHz, VO = 1VPP -67 COMP Pin = LO, fc = 10 MHz, AV= 4V, VO = 1VPP -74 HD3 3rd order distortion fc = 1MHz, VO = 1VPP -94 dBc COMP Pin = LO, AV= 4, fc = 1MHz, VO = 1VPP -112 fc = 10 MHz, VO = 1VPP -79 COMP pin = LO, fc = 10 MHz, VO = 1VPP –96 OIP3 Two-tone 3rd Order Intercept Point fc = 25 MHz, VO = 1VPP composite 30 dBmfc = 75 MHz, VO = 1VPP composite 26 en Noise voltage Input referred, f > 1MHz 0.69 nV/√HZ in Noise current 2.6 pA/√HZ NF Noise figure RS = RT = 50Ω 8.0 dB www.national.com 6 LMH6629
Symbol Parameter Conditions Min (Note 5) Typ (Note 5) Max (Note 5) Units ANALOG I/O CMVR Input voltage range CMRR > 70 dB, LLP-8 package −0.30 2.1 VCMRR > 70 dB, SOT23-5 package −0.30 to 2.1 VO Output voltage range RL = 100Ω to VS/2 0.90 0.95 0.79 to 2.50 2.4 2.3 V No load 0.76 0.80 0.70 to 2.60 2.5 2.4 IOUT Linear output current VO = 1.65V (Note 3) 230 mA VOS Input Offset Voltage ±150 ±680 ±700 µV TcVOS Input offset voltage temperature drift (Note 7) ±1 μV/°C IBI Input Bias Current (Note 6) −15 −23 −35 μA IOS Input Offset Current ±0.13 ±1.8 ±3.0 μA TCIOS Input offset voltage temperature drift (Note 7) ±3.2 nA/°C CCM Input Capacitance Common Mode 1.7 pF RCM Input Resistance Common Mode 1 MΩ MISCELLANEOUS PARAMETERS CMRR Common Mode Rejection Ratio VCM from 0V to 2.0V, LLP-8 package 84 81 87 dB VCM from 0V to 2.0V, SOT23-5 package 87 PSRR Power supply rejection ratio 82 79 84 AVOL Open Loop Gain LLP-8 package 78 73 79 SOT23-5 package 79 DIGITAL INPUTS/TIMING VIL Logic low-voltage threshold PD and COMP pins, LLP-8 package 0.8 VVIH Logic high-voltage threshold 2.0 IIL Logic low-bias current PD and COMP pins = 0.8V, LLP-8 package (Note 6) -17 −14 −23 −28 −32 µA IIH Logic high-bias current PD and COMP pins = 2.0V, LLP-8 package (Note 6) −16 −13 −22 −27 −31 Ten Enable time LLP-8 package 75 nsTdis Disable time LLP-8 package 80 POWER REQUIREMENTS IS Supply Current No Load, Normal Operation (PD Pin = HI or open for LLP-8 package) 13.7 14.9 16.0 mANo Load, Shutdown (PD Pin = LO for LLP-8 package) 0.89 1.4 1.5 7 www.national.com LMH6629
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 3: The maximum continuous output current (IOUT) is determined by device power dissipation limitations. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C Note 4: Human Body Model, applicable std. JESD22-A114C. Machine Model, applicable std. JESD22-A115-A. Field Induced Charge Device Model, applicable std. JESD22-C101-C. Note 5: Typical numbers are the most likely parametric norm. Bold numbers refer to over-temperature limits. Note 6: Negative input current implies current flowing out of the device. Note 7: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change. www.national.com 8 LMH6629
Typical Performance Characteristics Unless otherwise specified, VS = ±2.5V, Rf = 240Ω, RL = 100Ω, VO = 2VPP, COMP pin = HI, A V = +10 V/V, LLP-8 and SOT23-5 packages (unless specifically noted). Inverting Frequency Response 30068003 Inverting Frequency Response 30068004 Non-Inverting Frequency Response 30068005 Non-Inverting Frequency Response 30068006 Non-Inverting Frequency Response, LLP-8 Package 30068069 Non-Inverting Frequency Response, SOT23-5 Package 30068068 9 www.national.com LMH6629
Non-Inverting Frequency Response with Varying VO, LLP-8 Package 30068007 Non-Inverting Frequency Response with Varying VO, SOT23-5 Package 30068010 Non-Inverting Frequency Response with Varying VO, LLP-8 Package 30068008 Non-Inverting Frequency Response with Varying VO, SOT23-5 Package 30068027 Non-Inverting Frequency Response with Varying VO, LLP-8 Package 30068013 Non-Inverting Frequency Response with Varying VO, LLP-8 Package 30068014 www.national.com 10 LMH6629
Frequency Response with Cap. Loading 30068015 Frequency Response Cap. Loading, LLP-8 Package 30068016 Frequency Response vs. Rf, 30068017 Frequency Response vs. Rf, 30068030 Frequency Response vs. Rf, 30068038 Frequency Response vs. Rf, 30068041 11 www.national.com LMH6629
Distortion vs. Swing, 30068043 Distortion vs. Swing, 30068042 Distortion vs. Swing, 30068077 Distortion vs. Swing, 30068045 Distortion vs. Gain, 30068078 Distortion vs. Gain, 30068048 www.national.com 12 LMH6629
Distortion vs. Frequency, 30068044 Distortion vs. Frequency, 30068047 3rd Order Intermodulation Distortion vs. Output Voltage 30068096 Input Noise Voltage vs. Frequency 30068062 Input Noise Current vs. Frequency 30068063 PSRR vs. Frequency 30068009 13 www.national.com LMH6629
Open Loop Gain/Phase Response 30068060 Output Source Current, 30068057 Output Sink Current 30068058 Output Source Current, 30068065 Output Sink Current, SOT23-5 Package 30068066 Large Signal Step Response 30068073 www.national.com 14 LMH6629
Large Signal Step Response 30068074 Large Signal Step Response 30068064 Large Signal Step Response 30068046 Small Signal Step Response, LLP-8 Package 30068075 Small Signal Step Response, LLP-8 Package 30068076 Turn-On Waveform, LLP-8 Package 30068025 15 www.national.com LMH6629
Turn-Off Waveform, LLP-8 Package 30068024 Supply Current vs. Supply Voltage 30068090 Offset Voltage vs. Supply Voltage (Typical Unit) 30068067 Input Bias Current vs. Supply Voltage (Typical Unit) 30068091 Input Offset Current vs. Supply Voltage (Typical Unit) 30068053 www.national.com 16 LMH6629
National Semiconductor offers evaluation board(s) to aid in device testing and characterization and as a guide for proper layout. As is the case with all high-speed amplifiers, accepted- practice RF design technique on the PCB layout is mandato- ry. Generally, a good high-frequency layout exhibits a separation of power supply and ground traces from the in- verting input and output pins. Parasitic capacitances between these nodes and ground may cause frequency response peaking and possible circuit oscillations (see Application Note OA-15 for more information). Use high-quality chip capacitors with values in the range of 1000 pF to 0.1F for power supply bypassing. One terminal of each chip capacitor is connected to the ground plane and the other terminal is connected to a point that is as close as possible to each supply pin as allowed by the manufacturer’s design rules. In addition, connect a tantalum capacitor with a value between 4.7 μF and 10 μF in parallel with the chip capacitor. Harmonic Distortion, especially HD2, is strongly influenced by the layout and in particular can be affected by decoupling ca- pacitors placed between the V+ and V- terminals as close to the device leads as possible. Signal lines connecting the feedback and gain resistors should be as short as possible to minimize inductance and microstrip line effect. Place input and output termination re- sistors as close as possible to the input/output pins. Traces greater than 1 inch in length should be impedance matched to the corresponding load termination. Symmetry between the positive and negative paths in the layout of differential circuitry should be maintained to mini- mize the imbalance of amplitude and phase of the differential signal. Component value selection is another important parameter in working with high-speed / high-performance amplifiers. Choosing external resistors that are large in value compared to the value of other critical components will affect the closed loop behavior of the stage because of the interaction of these resistors with parasitic capacitances. These parasitic capac- itors could either be inherent to the device or be a by-product of the board layout and component placement. Moreover, a large resistor will also add more thermal noise to the signal path. Either way, keeping the resistor values low will diminish this interaction. On the other hand, choosing very low value resistors could load down nodes and will contribute to higher overall power dissipation and high distortion. 25 www.national.com LMH6629
Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin LLP www.national.com 26 LMH6629
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