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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 LM64±1°C RemoteDiodeTemperatureSensorwithPWM FanControland5GPIO's Check forSamples: LM64 1FEATURES KEY SPECIFICATIONS 2• AccuratelySenses Remote and LocalDiode • Remote Diode Temperature Accuracy Temperatures (includesquantizationerror)

  • IntegratedPWM Fan Speed ControlOutput – Ambient Temp
  • Programmable 8-stepLookup Tablefor – 30°C to50°C QuietingFans – 0°C to85°C
  • ALERT and T_CritOpen-drainOutputs – Diode Temp
  • Tachometer InputforMeasuring Fan RPM – 120°C to140°C
  • 10 bitPlus Sign Remote Diode Temperature – 25°C to140°C Data Format,with0.125°C Resolution – Max Error
  • SMBus 2.0Compatible Interface,Supports – ±1.0°C (max)TIMEOUT – ±3.0°C (max)• 5 GeneralPurpose Input/Outputpins • LocalTemp Accuracy (includesquantization• 5 GeneralPurpose Defaultinputpins error)
  • 24-pinWQFN Package – Ambient Temp 25°C to125°C – Max Error±3.0°C (max)APPLICATIONS
  • Power Supply Requirements• Computer Processor Thermal Management – Supply DC Voltage3.0V to3.6V• Graphics Processor Thermal Management – Supply DC Current1.1mA (typ)• VoltageRegulatorModules
  • ElectronicInstrumentation DESCRIPTION
  • Power Supplies The LM64 isa remotediodetemperaturesensorwith PWM fancontrol.The LM64 accuratelymeasures its• Projectors own temperatureand thatof a remote diode.The LM64 remote temperature accuracy is factory trimmedfora MMBT3904 diode-connectedtransistor with a 16°C offsetforhigh temperatures.TACTUAL DIODE JUNCTION = TLM64 + 16°C The LM64 featuresa PWM, open-drain,fan control output,5 GPIO (GeneralPurpose Input/Output)and 5 GPD (GeneralPurpose Default)pins.The 8-step Lookup Table allowsfora non-linearfan speed vs. temperaturetransferfunctionoften used to quiet acousticfannoise. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2004–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

V GPD5 GPD4 GPD3 T_Crit 234567 10 22 19181716151413 N/C N/C GPIO2 N/C GPD2 GPD1 LM64 DD LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com Connection Diagram Figure1. 24-pinWQFN Package Pin Descriptions Pin Name Input/Output Functionand Connection DigitalInput/ GeneralPurposeOpen-DrainDigitalOutputorDigitalInput.Typicalpull-upresistoris1 GPIO1 Open-DrainOutput 10 kΩ toVDD . DigitalInput/ GeneralPurposeOpen-DrainDigitalOutputorDigitalInput.Typicalpull-upresistoris2 GPIO2 Open-DrainOutput 10 kΩ toVDD . DigitalInput/ GeneralPurposeOpen-DrainDigitalOutputorDigitalInput.Typicalpull-upresistoris3 GPIO3 Open-DrainOutput 10 kΩ toVDD . Open-Drain Open-DrainDigitalOutput.Connecttofandrivecircuitry.The power-ondefaultforthis4 PWM DigitalOutput pinislow(pin4 pulledtoground). Connecttoa low-noise+3.3± 0.3VDC power supply,and bypasstoGND witha 0.1 5 VDD Power SupplyInput µF ceramiccapacitorinparallelwitha 100 pF ceramiccapacitor.A bulkcapacitanceof 10 µF needs tobe inthevicinityoftheLM64's VDD pin. Connecttotheanode (positiveside)oftheremotediode.A 2.2nF ceramiccapacitor6 D+ AnalogInput must be connectedbetween pins6 and 7. Connecttothecathode(negativeside)oftheremotediode.A 2.2nF ceramiccapacitor7 D- AnalogInput must be connectedbetween pins6 and 7. Open-Drain Open-DrainDigitalOutput.Typicalpull-upresistoris3 kΩ toVDD .8 T_Crit DigitalOutput 9 N/C N/A No Connection. 10 N/C N/A No Connection. 11 N/C N/A No Connection. SMBus AddressSelectpin.IfHigh,theSMBus addressis0x4E or,ifLow, theSMBus12 A0 DigitalInput addressis0x18.Typicalpull-upresistoris10 kΩ toVDD . 13 GND Ground Thisistheanalogand digitalgroundreturn. Open-Drain Thispinisan open-drainALERT Output.Typicalpull-upresistoris3 kΩ toVDD .14 ALERT DigitalOutput 15 TACH DigitalInput Thispinisa digitaltachometerinput.Typicalpull-upresistoris3 kΩ toVDD . DigitalInput/ Thisisthebi-directionalSMBus dataline.Typicalpull-upresistoris1.5kΩ toVDD .16 SMBDAT Open-DrainOutput 17 SMBCLK DigitalInput ThisistheSMBus clockinput.Typicalpull-upresistoris1.5kΩ toVDD . DigitalInput/ GeneralPurposeOpen-DrainDigitalOutputorDigitalInput.Typicalpull-upresistoris18 GPIO5 Open-DrainOutput 10 kΩ toVDD .

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Temp Reading, Temp Limit, Hysteresis, and Temp Sensor Filter Registers Status and Status Mask Registers Comparators PWM Fan Control Registers PWM Fan Control PWM ALERT Tachometer Detection GPD1 GPD2 GPD3 GPD4 GPD5 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 T_Crit TACH GPIO Registers SMBus Address ALERT Control Logic LM64 www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Pin Descriptions(continued) Pin Name Input/Output Functionand Connection DigitalInput/ GeneralPurposeOpen-DrainDigitalOutputorDigitalInput.Typicalpull-upresistoris19 GPIO4 Open-DrainOutput 10 kΩ toVDD . GeneralPurposeDefaultInputPin.Typicalpull-upresistoris10 kΩ toVDD .Always20 GPD1 DigitalInput connecttoa logicalHighorLow level. GeneralPurposeDefaultInputPin.Typicalpull-upresistoris10 kΩ toVDD .Always21 GPD2 DigitalInput connecttoa logicalHighorLow level. GeneralPurposeDefaultInputPin.Typicalpull-upresistoris10 kΩ toVDD .Always22 GPD3 DigitalInput connecttoa logicalHighorLow level. GeneralPurposeDefaultInputPin.Typicalpull-upresistoris10 kΩ toVDD .Always23 GPD4 DigitalInput connecttoa logicalHighorLow level. GeneralPurposeDefaultInputPin.Typicalpull-upresistoris10 kΩ toVDD .Always24 GPD5 DigitalInput connecttoa logicalHighorLow level. SimplifiedBlock Diagram Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM64

T_CRIT VDD VDD N/C N/C To SMBus interface control circuitry Fan V+ Fan V- R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 GPD5 GPD4 GPD3 GPD2 GPD1 8 9 10 11 12

2021222324 C4 C5

T_CRIT R15 R16 R17 R18 Thermal Diode on-board Processor Die R1 - R10; R15 = 10 k: R17 = 430: R18 = 10: R11, R12 = 1.5 k: C1 = 10 PF electrolytic C2, C5 = 0.1 PF ceramic C3 = 100 pF ceramic C4 = 2.2 PF electrolytic C3C1 C2 Q2 = MMBT3904 S5 S4 S3 S2 S1 S1 - S5 = SPST Switch C6 = 2.2 nF ceramic R13, R14, R16 = 3 k: LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com TypicalApplication These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 AbsoluteMaximum Ratings(1)(2)(3) SupplyVoltage,VDD −0.3V to6.0V Voltageon SMBDAT, SMBCLK, ALERT, T_Crit,PWM Pins −0.5V to6.0V Voltageon OtherPins −0.3V to(VDD + 0.3 V) InputCurrent,D − Pin ±1 mA InputCurrentatAllOtherPins(4) 5 mA Package InputCurrent(4) 30 mA Package Power Dissipation SMBDAT, ALERT, T_Crit,PWM pins See (5) OutputSinkCurrent 10 mA StorageTemperature −65°C to+150°C ESD Susceptibility(6) Human Body Model 2000 V Machine Model 200 V SMT SolderingInformation See AN-1187 (SNOA401Q ),"LeadlessLeadframePackage"forinformationon SMT Assembly usingLLP Packages. (1) Allvoltagesaremeasured withrespecttoGND, unlessotherwisenoted. (2) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notguaranteeperformancelimits.Forguaranteedspecificationsand testconditions,see the ElectricalCharacteristics.The guaranteedspecificationsapplyonlyforthetestconditionslisted.Some performancecharacteristicsmay degradewhen thedeviceisnotoperatedunderthelistedtestconditions. (3) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. (4) When theinputvoltage(VIN)atany pinexceedsthepower supplies(VIN < GND orVIN > V+),thecurrentatthatpinshouldbe limitedto 5 mA. Parasiticcomponents and/orESD protectioncircuitryareshown intheTable1,fortheLM64 's pins,by an "X"when itexists.Care shouldbe takennottoforwardbiastheparasiticdiode,D1, presenton pinsD+ and D −.Doingso by more than50 mV may corrupt temperaturemeasurements. (5) See AN-1187 SNOA401 forThermalResistanceJunction-to-AmbientTemperature. (6) Human body model,100 pF dischargedthrougha 1.5kΩ resistor.Machine model,200 pF dischargeddirectlyintoeach pin.See Figure3 fortheESD ProtectionInputStructure. OperatingRatings(1)(2) LM64 OperatingTemperatureRange 0°C ≤ TA ≤ +85°C Remote DiodeTemperatureRange 25°C ≤ TD ≤ +140°C ElectricalCharacteristics TMIN ≤ TA ≤ TMAX SupplyVoltageRange (VDD ) +3.0V to+3.6V (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdo notguaranteeperformancelimits.Forguaranteedspecificationsand testconditions,see the ElectricalCharacteristics.The guaranteedspecificationsapplyonlyforthetestconditionslisted.Some performancecharacteristicsmay degradewhen thedeviceisnotoperatedunderthelistedtestconditions. (2) Allvoltagesaremeasured withrespecttoGND, unlessotherwisenoted. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com DC ElectricalCharacteristics TEMPERATURE-TO-DIGITAL CONVERTER CHARACTERISTICS The followingspecificationsapplyforVDD = 3.0VDC to3.6VDC, and allanalogsourceimpedance R S = 50 Ω unless otherwisespecifiedintheconditions.BoldfacelimitsapplyforTA = TMIN toTMAX ;allotherlimitsTA = +25°C. Typical Limits UnitsParameter Conditions (1) (2) (Limits) TemperatureErrorusinga diode-connected TA = +30°C to TD = +120°C to ±1 °C (max)MMBT3904 transistor.TD istheRemote Diode +50°C +140°C JunctionTemperature. TA = +0°C to TD = +25°C to ±3 °C (max)TD = TLM64 + 16°C +85°C +140°C TemperatureErrorUsingtheLocalDiode TA = +25°C to+125°C (3) ±1 ±3 °C (max) Remote DiodeResolution 11 Bits 0.125 °C LocalDiodeResolution 8 Bits 1 °C ConversionTime ofAllTemperatures FastestSetting 31.25 34.4 ms (max) D − SourceVoltage 0.7 V 315 µA (max) (VD+ − VD −)= +0.65V;HighCurrent 160 110 µA (min) DiodeSourceCurrent 20 µA (max) Low Current 13 7 µA (min) (1) “Typicals”areatTA = 25°C and representmost likelyparametricnorm.They aretobe used as generalreferencevaluesnotforcritical designcalculations. (2) LimitsareguaranteedtoTI's AOQL (AverageOutgoingQualityLevel). (3) Localtemperatureaccuracydoes notincludetheeffectsofself-heating.The riseintemperaturedue toself-heatingistheproductofthe internalpower dissipationoftheLM64 and thethermalresistance.See AN-1187 (SNOA401 )forthethermalresistancetobe used inthe self-heatingcalculation. OperatingElectricalCharacteristics Conditions Typ LimitsParameter Units(1) (2) ALERT, T_Critand PWM OutputSaturationVoltage ALERT, T_Crit PWM IOUT 4 mA 6 mA 0.4 V (max) IOUT 6 mA 0.55 Power-On-ResetThresholdVoltage 2.4 V (max)

1.8 V (min)

SupplyCurrent(3) SMBus Inactive,16 Hz 1.1 2.0 mA (max)ConversionRate STANDBY Mode 320 µA (1) “Typicals”areatTA = 25°C and representmost likelyparametricnorm.They aretobe used as generalreferencevaluesnotforcritical designcalculations. (2) LimitsareguaranteedtoTI's AOQL (AverageOutgoingQualityLevel). (3) The supplycurrentwillnotincreasesubstantiallywithan SMBus transaction.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 AC ElectricalCharacteristics The followingspecificationsapplyforVDD = 3.0VDC to3.6VDC, and allanalogsourceimpedance R S = 50Ω unless otherwisespecifiedintheconditions.BoldfacelimitsapplyforTA = TMIN toTMAX ;allotherlimitsTA= +25°C. Typical Limits UnitsSymbol Parameter Conditions (1) (2) (Limit) TACHOMETER ACCURACY Fan ControlAccuracy ±10 % (max) Fan Full-ScaleCount 65535 (max) Fan CounterClockFrequency 90 kHz Fan Count Update Frequency 1.0 Hz FAN PWM OUTPUT FrequencyAccuracy ±10 % (max) (1) “Typicals”areatTA = 25°C and representmost likelyparametricnorm.They aretobe used as generalreferencevaluesnotforcritical designcalculations. (2) LimitsareguaranteedtoTI's AOQL (AverageOutgoingQualityLevel). DigitalElectricalCharacteristics Typical Limits UnitsSymbol Parameter Conditions (1) (2) (Limit) VIH LogicalHighInputVoltage 2.1 V (min) VIL LogicalLow InputVoltage 0.8 V (max) IIH LogicalHighInputCurrent VIN = VDD 0.005 +10 µA (max) IIL LogicalLow InputCurrent VIN = GND −0.005 −10 µA (max) C IN DigitalInputCapacitance 20 pF (1) “Typicals”areatTA = 25°C and representmost likelyparametricnorm.They aretobe used as generalreferencevaluesnotforcritical designcalculations. (2) LimitsareguaranteedtoTI's AOQL (AverageOutgoingQualityLevel). SMBus LogicalElectricalCharacteristics The followingspecificationsapplyforVDD = 3.0VDC to3.6VDC, and allanalogsourceimpedance R S = 50 Ω unless otherwisespecifiedintheconditions.BoldfacelimitsapplyforTA = TMIN toTMAX ;allotherlimitsTA = +25°C. Typical Limits UnitsSymbol Parameter Conditions (1) (2) (Limit) SMBDAT OPEN-DRAIN OUTPUT VOL LogicLow LevelOutputVoltage IOL = 4 mA 0.4 V (max) IOH HighLevelOutputCurrent VOUT = VDD 0.03 10 µA (max) SMBDAT, SMBCLK INPUTS VIH LogicalHighInputVoltage 2.1 V (min) VIL LogicalLow InputVoltage 0.8 V (max) VHYST LogicInputHysteresisVoltage 400 mV (1) “Typicals”areatTA = 25°C and representmost likelyparametricnorm.They aretobe used as generalreferencevaluesnotforcritical designcalculations. (2) LimitsareguaranteedtoTI's AOQL (AverageOutgoingQualityLevel). Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM64

P S VIH VIL SMBDAT tBUF tHD;STA tLOW tR tHD;DAT tHIGH tF tSU;DAT tSU;STA tSU;STO P LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com SMBus DigitalSwitchingCharacteristics Unlessotherwisenoted,thesespecificationsapplyforVDD = +3.0VDC to+3.6VDC, C L (loadcapacitance)on outputlines= 80 pF.BoldfacelimitsapplyforTA = TJ;TMIN ≤ TA ≤ TMAX ;allotherlimitsTA = TJ = +25°C, unlessotherwisenoted.The switchingcharacteristicsoftheLM64 fullymeet orexceed thepublishedspecificationsoftheSMBus version2.0.The followingparametersarethetimingrelationshipsbetween SMBCLK and SMBDAT signalsrelatedtotheLM64. They adhere tobutarenotnecessarilythesame as theSMBus bus specifications. Limits UnitsSymbol Parameter Conditions (1) (Limit) fSMB SMBus ClockFrequency 10 kHz (min) 100 kHz (max) tLOW SMBus ClockLow Time From VIN(0)max toVIN(0)max 4.7 µs (min) tHIGH SMBus ClockHighTime From VIN(1)min toVIN(1)min 4.0 µs (min) 50 µs (max) tR SMBus RiseTime See (2) 1 µs (max) tF SMBus FallTime See (3) 0.3 µs (max) tOF OutputFallTime C L = 400 pF,IO = 3 mA 250 ns (max) tTIMEOUT SMBData and SMBCLK Time Low forResetof 25 ms (min) SerialInterfaceSee (4) 35 ms (max) tSU:DAT Data InSetupTime toSMBCLK High 250 ns (min) tHD:DAT Data Out HoldTime afterSMBCLK Low 300 ns (min) 930 ns (max) tHD:STA HoldTime after(Repeated)StartCondition.After 4.0 µs (min)thisperiodthefirstclockisgenerated. tSU:STO StopConditionSMBCLK HightoSMBDAT Low 100 ns (min)(StopConditionSetup) tSU:STA SMBus Repeated Start-ConditionSetupTime, 4.7 µs (min)SMBCLK HightoSMBDAT Low tBUF SMBus FreeTime between Stopand Start 4.7 µs (min)Conditions (1) LimitsareguaranteedtoTI's AOQL (AverageOutgoingQualityLevel). (2) The outputrisetimeismeasured from(VILmax -0.15V) to(VIH min + 0.15V). (3) The outputfalltimeismeasured from(VIH min + 0.15V) to(VILmin -0.15V). (4) HoldingtheSMBData and/orSMBCLK linesLow fora timeintervalgreaterthantTIMEOUT willresettheLM64 ’s SMBus statemachine, thereforesettingSMBDAT and SMBCLK pinstoa highimpedance state. Figure2. SMBus Timing Diagram forSMBCLK and SMBDAT Signals

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SNP = NMOS Snapback LM64 www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Table1. Pin Name Pin # D1 D2 D3 D4 D5 D6 R1 SNP ESD CLAMP GPIO1 1 X X X GPIO2 2 X X X GPIO3 3 X X X PWM 4 X X X VDD 5 X D+ 6 X X X X X X D − 7 X X X X X X T_Crit 8 X X X X A0 12 X ALERT 14 X X X X TACH 15 X X X SMBDAT 16 X X X SMBCLK 17 X GPIO5 18 X X X GPIO4 19 X X X GPD1 20 X GPD2 21 X GPD3 22 X GPD4 23 X GPD5 24 X Figure3. ESD ProtectionInputStructure Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM64

0.01 0.1 1.0 10 100 CONVERSION RATE (Hz) 200 500 800 1100 1400 1700 2000 2300 2600 SUPPLY CURRENT ( PA LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com FUNCTIONAL DESCRIPTION The LM64 Remote Diode Temperature Sensor with IntegratedFan Controlincorporatesa ΔVBE -based temperaturesensorusinga LocalorRemote diodeand a 10-bitplussignΔΣ ADC (Delta-SigmaAnalog-to-Digital Converter).The pulse-widthmodulated(PWM) open-drainoutput,witha pull-upresistor,can drivea switching transistortomodulatethefan.The LM64 can measure thefanspeed on thepulsesfromthefan’s open-collector tachometeroutput,pulledup by a 1.5kΩ resistortoVDD .The ALERT open-drainoutputwillbe pulledlow under certainconditionsdescibedin the sectionsbelow.The T_Critopen-drainoutputwillbe pulledlow when the T_Critsetpointtemperaturelimitis exceeded. This behaves as a typicalcomparatorfunctionwithoutany latching. The LM64's two-wireinterfaceiscompatiblewiththeSMBus Specification2.0.For more informationthereader isdirectedtowww.smbus.org. IntheLM64, digitalcomparatorsare used tocompare themeasured LocalTemperature(LT)totheLocalHigh Setpointuser-programmabletemperaturelimitregister.The measured Remote Temperature(RT) isdigitally compared to the Remote High Setpoint(RHS), the Remote Low Setpoint(RLS),and the Remote T_CRIT Setpoint(RCS) user-programmabletemperaturelimits.An ALERT outputwilloccur when the measured temperatureis:(1)higherthan eitherthe High Setpointor the T_CRIT Setpoint,or (2)lowerthan the Low Setpoint.The ALERT Mask registerallowstheusertopreventthegenerationoftheseALERT outputs. The temperaturehysteresisissetby thevalueplacedintheHysteresisRegister(TH). The LM64 may be placedina low power Standby mode by settingtheStandby bitfoundintheConfiguration Register.IntheStandby mode continuousconversionsare stopped.InStandby mode theusermay choose to allowthe PWM outputsignalto continue,or not,by programming the PWM Disablein Standby bitin the ConfigurationRegister. The LocalTemperaturereadingand setpointdata registersare 8-bitswide.The formatof the 11-bitremote temperaturedata isa 16-bitleftjustifiedword.Two 8-bitregisters,highand low bytes,are providedforeach setpointas wellas thetemperaturereading.Two Remote TemperatureOffset(RTO) Registers:High Byte and Low Byte (RTOHB and RTOLB) may be used to correctthe temperaturereadingsby addingor subtractinga fixedvaluebased on a differentnon-idealityfactorofthethermaldiodeifdifferentfrom thegraphicsprocessor thermaldiode.See DiodeNon_Ideality. CONVERSION SEQUENCE The LM64 takesapproximately31.25ms toconverttheLocalTemperature(LT),Remote Temperature(RT),and toupdateallofitsregisters.The ConversionRate may be modifiedusingtheConversionRate Register.When theconversionrateismodifieda delayisinsertedbetween conversions,theactualconversiontimeremainsat 31.25ms. DifferentConversionRates willcause theLM64 todraw differentamounts ofsupplycurrentas shown inFigure4. Figure4. Supply Currentvs Conversion Rate

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Status Register: RTDS High TIME TEMPERATURE LM64 www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 THE ALERT OUTPUT When theALERT Mask bitintheConfigurationregisteriswrittenas zerotheALERT interruptsareenabled. The LM64's ALERT pinisversatileand can produce threedifferentmethods of use to bestservethe system designer:(1)as a temperaturecomparator(2)as a temperature-basedinterruptflag,and (3)as partof an SMBus ALERT System. The threemethods of use are furtherdescribedbelow.The ALERT and interrupt methods aredifferentonlyinhow theuserinteractswiththeLM64. The remotetemperature(RT)readingisassociatedwitha T_CRIT SetpointRegister,and bothlocaland remote temperature(LT and RT) readingsareassociatedwitha HIGH setpointregister(LHS and RHS). The RT isalso associatedwitha LOW setpointregister(RLS).At the end of everytemperaturereadinga digitalcomparison determineswhetherthatreadingisabove itsHIGH or T_CRIT setpointor below itsLOW setpoint.Ifso,the correspondingbitintheALERT StatusRegisterisset.IftheALERT mask bitislow,any bitsetintheALERT StatusRegister,withthe exceptionof Busy or Open, willcause the ALERT outputto be pulledlow.Any temperatureconversionthatisout of the limitsdefinedin the temperaturesetpointregisterswilltriggeran ALERT. Additionally,theALERT Mask Bitmust be clearedtotriggeran ALERT inallmodes. The threedifferentALERT modes willbe discussedinthefollowingsections. ALERT Output as a Temperature Comparator When theLM64 isused ina system inwhichdoes notrequiretemperature-basedinterrupts,theALERT output couldbe used as a temperaturecomparator.Inthismode, once theconditionthattriggeredtheALERT togo low isno longerpresent,theALERT isnegated(Figure5).For example,iftheALERT outputwas activatedby the comparisonofLT > LHS, when thisconditionisno longertrue,theALERT willreturnHIGH. Thismode allows operationwithoutsoftwareintervention,once allregistersareconfiguredduringset-up.InorderfortheALERT to be used as a temperaturecomparator,theComparatorMode bitintheRemote Diode TemperatureFilterand ComparatorMode Registermust be asserted.Thisisnotthepower-ondefaultstate. Figure5. ALERT Output as Temperature Comparator Response Diagram ALERT Output as an Interrupt The LM64's ALERT outputcan be implementedas a simpleinterruptsignalwhen itisused totriggeran interrupt serviceroutine.In such systems itisdesirableforthe interruptflagto repeatedlytriggerduringor beforethe interruptserviceroutinehas been completed.Under thismethod of operation,duringthe read of the ALERT StatusRegisterthe LM64 willsetthe ALERT Mask bitinthe ConfigurationRegisterifany bitinthe ALERT StatusRegisterisset,withthe exceptionof Busy and Open. ThispreventsfurtherALERT triggeringuntilthe masterhas resettheALERT Mask bit,attheend oftheinterruptserviceroutine.The ALERT StatusRegisterbits areclearedonlyupon a readcommand fromthemaster(seeFigure5)and willbe re-assertedattheend ofthe next conversionifthe triggeringcondition(s)persist(s).In orderforthe ALERT to be used as a dedicated interruptsignal,the Comparator Mode bitin the Remote Diode Temperature Filterand Comparator Mode Registermust be setlow.Thisisthepower-ondefaultstate.The followingsequence describestheresponseofa systemthatuses theALERT outputpinas an interruptflag: 1. MastersensesALERT low. 2. MasterreadstheLM64 ALERT StatusRegistertodeterminewhat caused theALERT. 3. LM64 clearsALERT StatusRegister,resetsthe ALERT HIGH and sets the ALERT Mask bitin the Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM64

Remote High Limit RDTS Measurement TIME TEMPERATURE ALERT mask set in response to reading of status register by master LM64 ALERT pin Status Register: RTDS High End of Temperature conversion LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com ConfigurationRegister. 4. Masterattendstoconditionsthatcaused theALERT tobe triggered.The fanisstarted,setpointlimitsare adjusted,etc. 5. MasterresetstheALERT Mask bitintheConfigurationRegister. Figure6. ALERT Output as an InterruptTemperature Response Diagram ALERT Output as an SMBus ALERT An SMBus alertlineiscreatedwhen theALERT outputisconnectedto:(1)one ormore ALERT outputsofother SMBus compatibledevices,and (2)to a master.Under thisimplementation,the LM64's ALERT shouldbe operatedusingtheARA (AlertResponse Address)protocol.The SMBus 2.0ARA protocol,definedintheSMBus specification2.0,isa proceduredesignedtoassistthemasterindeterminingwhich partgeneratedan interrupt and toservicethatinterrupt. The SMBus alertlineisconnectedto the open-drainportsof alldeviceson the bus,therebyAND'ing them together.The ARA method allowsthe SMBus master,withone command, to identifywhich partispullingthe SMBus alertlineLOW. ItalsopreventsthepartfrompullingthelineLOW againforthesame triggeringcondition. When an ARA command isreceivedby alldeviceson thebus,thedevicespullingtheSMBus alertlineLOW: (1) send theiraddresstothemasterand (2)releasetheSMBus alertlineafteracknowledgementoftheiraddress. The SMBus Specifications1.1 and 2.0 statethatin response to and ARA (AlertResponse Address)“after acknowledgingtheslaveaddressthedevicemust disengageitsALERT pulldown”.Furthermore,“ifthehoststill sees ALERT low when the message transferis complete,itknows to read the ARA again.” This SMBus “disengagingALERT requirementpreventslockingup theSMBus alertline.Competitivepartsmay addressthe “disengagingofALERT ”differentlythantheLM64 ornotatall.SMBus systemsthatimplementtheARA protocol as suggestedfortheLM64 willbe fullycompatiblewithallcompetitiveparts. The LM64 fulfills“disengagingof ALERT ” by settingthe ALERT Mask Bitinthe ConfigurationRegisterafter sendingoutitsaddressinresponsetoan ARA and releasingtheALERT outputpin.Once theALERT Mask bitis activated,the ALERT outputpinwillbe disableduntilenabledby software.In orderto enablethe ALERT the master must read the ALERT StatusRegister,duringthe interruptserviceroutineand then resetthe ALERT Mask bitintheConfigurationRegisterto0 attheend oftheinterruptserviceroutine. The followingsequence describestheARA responseprotocol. 1. MastersensesSMBus alertlinelow 2. Mastersends a START followedby theAlertResponse Address(ARA) witha Read Command. 3. AlertingDevice(s)send ACK. 4. AlertingDevice(s)send theiraddress.Whiletransmittingtheiraddress,alertingdevicessense whethertheir addresshas been transmittedcorrectly.(The LM64 willresetitsALERT outputand settheALERT Mask bit once itscompleteaddresshas been transmittedsuccessfully.) 5. Master/slaveNoACK 6. Mastersends STOP 7. Masterattendstoconditionsthatcaused theALERT tobe triggered.The ALERT StatusRegisterisreadand fanstarted,setpointsadjusted,etc.

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Status Register: Remote High LM64 www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 8. MasterresetstheALERT Mask bitintheConfigurationRegister. The ARA, 000 1100,isa generalcalladdress.No deviceshouldeverbe assignedtothisaddress. The ALERT ConfigurationbitintheRemote Diode TemperatureFilterand ComparatorMode Registermust be setlowinorderfortheLM64 torespondtotheARA command. The ALERT outputcan be disabledby settingtheALERT Mask bitintheConfigurationRegister.The power-on defaultistohave theALERT Mask bitand theALERT Configurationbitlow. Figure7. ALERT Output as an SMBus ALERT Temperature Response Diagram SMBus INTERFACE SincetheLM64 operatesas a slaveon theSMBus, theSMBCLK lineisan inputand theSMBDAT lineisbi- directional.The LM64 neverdrivestheSMBCLK lineand itdoes notsupportclockstretching.The LM64 has two hardware-selectable7-bitslaveaddresses.The usermay inputa logicalHigh or Low on theA0 Address pinto selectone ofthetwo pre-programmedSMBus slaveaddresses.The optionsareas follows: A0 SMBus SMBus SlaveAddress Bits Pin Address A6 A5 A4 A3 A2 A1 A00x[Hex] 0 18 0 0 1 1 0 0 0 1 4E 1 0 0 1 1 1 0 POWER-ON RESET (POR) DEFAULT STATES Forinformationon thePOR defaultstatessee LM64 REGISTER MAP IN FUNCTIONAL ORDER . TEMPERATURE DATA FORMAT Temperaturedata can onlybe read from the Localand Remote Temperatureregisters.The High,Low and T_CRIT setpointregistersareRead/Write. Remote temperaturedataisrepresentedby an 11-bit,two'scomplement word witha LeastSignificantBit(LSB) equalto0.125°C. The dataformatisa leftjustified16-bitword availableintwo 8-bitregisters.Some examples of temperatureconversionsareshown below. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com Table2.Actualvs.LM64 Remote Temperature Conversion(1) ActualRemote Diode LM64 Remote Diode BinaryResultsinLM64 Remote Hex Remote Temperature,°C Temperature Register,°C Temperature Register Temperature Register 120 +104 0110 1000 0000 0000 6800h 125 +109 0110 1101 0000 0000 6D00h 126 +110 0110 1110 0000 0000 6E00h 130 +114 0111 0010 0010 0000 7200h 135 +119 0111 0111 0000 0000 7700h 140 +124 0111 1100 0000 0000 7C00h (1) Outputis11-bittwo's complement word.LSB = 0.125°C. Table3.Actualvs.Remote T_CritSetpointExample ActualRemote Diode T_Crit Remote T_CRIT BinaryRemote T_CRIT Hex Remote T_CRIT High Setpoint,°C High Setpoint,°C High SetpointValue SetpointValue 126 +110 0110 1110 6Eh LocalTemperaturedataisrepresentedby an 8-bit,two'scomplement bytewithan LSB equalto1°C: DigitalOutput Temperature Binary Hex +125°C 0111 1101 7D +25°C 0001 1001 19 +1°C 0000 0001 01 0°C 0000 0000 00 −1°C 1111 1111 FF −25°C 1110 0111 E7 −55°C 1100 1001 C9 OPEN-DRAIN OUTPUTS, INPUTS, AND PULL-UP RESISTORS The SMBDAT, ALERT, T_Crit,GPIO and PWM open-drainoutputsand the GPD, TACH, and A0 inputsare pulled-upby pull-upresistorstoVDD as suggestedinthetablebelow. Pin Name Pin Number Suggested Pull-upResistor Range Typical SMBCLK 17 1 kΩ to2 kΩ 1.5kΩ SMBDAT 16 1 kΩ to2 kΩ 1.5kΩ ALERT 14 1 kΩ to5 kΩ 3 kΩ T_Crit 8 1 kΩ to5 kΩ 3 kΩ A0 12 5 kΩ to20 kΩ 10 kΩ GPIOx 1-3;18,19 5 kΩ to20 kΩ 10 kΩ GPDx 20-24 5 kΩ to20 kΩ 10 kΩ PWM 4 See (1) See (1) TACH 15 1 kΩ to5 kΩ 3 kΩ (1) Depends on thefandrivecircuitryconnectedtothispin.Intheabsence offancontrolcircuitryuse a 1 kΩ pull-upresistortoVDD .

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 DIODE FAULT DETECTION The LM64 can detectfaultconditionscaused by theremotediode.IftheD+ pinisdetectedtobe shortedtoVDD , or open: (1) the Remote Temperature High Byte (RTHB) registeris loaded with 127°C, (2) the Remote TemperatureLow Byte(RTLB) registerisloadedwith0,and (3)theOPEN bit(D2)inthestatusregisterisset. Therefore,ifthe Remote T_CRIT setpointregister(RCS): (1)issetto a valuelessthan +127°C and (2)the ALERT Mask isdisabled,thentheALERT outputpinwillbe pulledlow.IftheRemote High SetpointHigh Byte (RHSHB) issettoa valuelessthan+127°C and (2)theALERT Mask isdisabled,thentheALERT and T_Crit outputswillbe pulledlow.The OPEN bitby itselfwillnottriggeran ALERT. Ifthe D+ pinisshortedto eitherground or D −, then the Remote TemperatureHigh Byte (RTHB) registeris loadedwith−128°C (10000000)and theOPEN bitintheALERT StatusRegisterwillnotbe set.A temperature readingof−128°C indicatesthatD+ isshortedtoeitherground or D-.IfthevalueintheRemote Low Setpoint HighByte(RLSHB) Registerismore than−128°C and theALERT Mask isDisabled,ALERT willbe pulledlow. COMMUNICATING WITH THE LM64 Each dataregisterintheLM64 fallsintoone offourtypesofuseraccessibility: 1. Read Only 2. WriteOnly 3. Read/Writesame address 4. Read/Writedifferentaddress A WritetotheLM64 iscomprisedofan addressbyteand a command byte.A writetoany registerrequiresone databyte. Reading theLM64 Registerscan takeplaceaftertherequisiteregistersetupsequence takesplace.See LM64 RequiredInitialFan ControlRegisterSequence. The data byte has the Most SignificantBit(MSB) first.At the end of a read,the LM64 can accepteither Acknowledge or No-Acknowledge from theMaster.Note thattheNo-Acknowledge istypicallyused as a signal fortheslaveindicatingthattheMasterhas readitslastbyte. DIGITAL FILTER The LM64 incorporatesa user-configureddigitalfiltertosuppresserroneousRemote Temperaturereadingsdue to noise.The filterisaccessed inthe Remote Diode TemperatureFilterand Comparator Mode Register.The filtercan be setaccordingtothefollowingtable. Level2 ismaximum filtering. Table4.DigitalFilter SelectionTable D2 D1 Filter 0 0 No Filter 0 1 Level1 1 0 Level1 1 1 Level2 Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM64

TEMPERATURE ( oC) LM64 with Filter On LM64 with Filter Off 0 5 10 15 20 25 TEMPERATURE (° C) NUMBER OF SAMPLES No Filter Filter Level 1 Filter Level 2 0 5 10 15 20 25 TEMPERATURE (° C) NUMBER OF SAMPLES No Filter Filter Level 1 Filter Level 2 LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com Figure8.Step Response oftheDigitalFilter Figure9.Impulse Response oftheDigitalFilter The Filteron and offcurveswere purposelyoffsettobettershow noiseperformance. Figure10.DigitalFilterResponse inan IntelPentium 4 processorSystem FAULT QUEUE The LM64 incorporatesa FaultQueue tosuppresserroneousALERT triggering.The FaultQueue preventsfalse triggeringby requiringthree consecutiveout-of-limitHIGH, LOW, or T_CRIT temperaturereadings.See Figure11.The FaultQueue defaultstoOFF upon power-upand may be activatedby settingtheRDTS Fault Queue bitintheConfigurationRegistertoa 1.

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Status Register: RTDS High LM64 www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Figure11. FaultQueue Temperature Response Diagram ONE-SHOT REGISTER The One-Shot Registerisused to initiatea singleconversionand comparisoncyclewhen the deviceisin standbymode, afterwhichthedatareturnstostandby.Thisisnota dataregister.A writeoperationcauses the one-shotconversion.The datawrittentothisaddressisirrelevantand isnotstored.A zerowillalwaysbe read fromthisregister. SERIAL INTERFACE RESET IntheeventthattheSMBus MasterisresetwhiletheLM64 istransmittingon theSMBDAT line,theLM64 must be returnedtoa known stateinthecommunicationprotocol.Thismay be done inone oftwo ways: 1. When SMBDAT isLow, theLM64 SMBus statemachine resetstotheSMBus idlestateifeitherSMBData or SMBCLK areheldLow formore than35 ms (tTIMEOUT ).Alldevicesaretotimeoutwhen eithertheSMBCLK or SMBDAT linesare heldLow for25 ms – 35 ms. Therefore,toinsurea timeoutofalldeviceson thebus, eithertheSMBCLK ortheSMBData linemust be heldLow foratleast35 ms. 2. WithbothSMBDAT and SMBCLK High,themastercan initiatean SMBus startconditionwitha High toLow transitionon the SMBDAT line.The LM64 willrespond properlyto an SMBus startconditionat any point duringthecommunication.AfterthestarttheLM64 willexpectan SMBus Addressaddressbyte. LM64 Registers The followingpages include:LM64 REGISTER MAP IN HEXADECIMAL ORDER a RegisterMap inHexadecimal Order, which shows a summary of allregistersand theirbitassignments,LM64 REGISTER MAP IN FUNCTIONAL ORDER ,a RegisterMap inFunctionalOrder,and LM64 INITIALREGISTER SEQUENCE AND REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER ,a detailedexplanationofeach register.Do notaddress theunused ormanufacturer’s testregisters. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com LM64 REGISTER MAP IN HEXADECIMAL ORDER The followingisa RegisterMap groupedinhexadecimaladdressorder.Some addresslocationshave been left blank to maintaincompatibilitywithLM86. Addresses in parenthesisare mirrorsof “Same As” address for backwards compatibilitywithsome oldersoftware.Reading or writingeitheraddresswillaccess thesame 8-bit register. DATA BITSRegister Register 0x[HEX] Name D7 D6 D5 D4 D3 D2 D1 D0

00 Local LT7 LT6 LT5 LT4 LT3 LT2 LT1 LT0

e

01 Rmt Temp RTHB ± RTHB14 RTHB13 RTHB12 RTHB11 RTHB10 RTHB9 RTHB8

02 ALERT BUSY LHIGH 0 RHIGH RLOW RDFA RCRIT TACH

03 Configuratio ALTMSK STBY PWMDIS 0 0 ALT/TCH TCRITOV FLTQUE

n

04 Conversion 0 0 0 0 CONV3 CONV2 CONV1 CONV0

05 LocalHigh LHS7 LHS6 LHS5 LHS4 LHS3 LHS2 LHS1 LHS0

06 [Reserved] Not Used

07 Rmt High RHSHB15 RHSHB14 RHHBS13 RHSHB12 RHSHB11 RHSHB10 RHSHB9 RHSHB8

08 Rmt Low RLSHB15 RLSHB14 RLSHB13 RLSHB12 RLHBS11 RLSHB10 RLSHB9 RLSHB8

(09) Same as 03 (0A) Same as 04 (0B) Same as 05 0C [Reserved] Not Used (0D) Same as 07 (0E) Same as 08 0F One Shot WriteOnly.Writecommand triggersone temperatureconversioncycle.

10 Rmt Temp RTLB7 RTLB6 RTLB5 0 0 0 0 0

11 Rmt Temp RTOHB15 RTOHB14 RTOHB13 RTOHB12 RTOHB11 RTOHB10 RTOHB9 RTOHB8

12 Rmt Temp RTOLB7 RTOLB6 RTOLB5 0 0 0 0 0

13 Rmt High RHSLB7 RHSLB6 RHSLB5 0 0 0 0 0

14 Rmt Low RLSLB7 RLSLB6 RLSLB5 0 0 0 0 0

15 [Reserved] Not Used

16 ALERT 1 ALTMSK6 1 ALTMSK4 ALTMSK3 1 ALTMSK1 ALTMSK0

17 [Reserved] Not Used 18 [Reserved] Not Used

19 Rmt TCRIT RCS7 RCS6 RCS5 RCS4 RCS3 RCS2 RCS1 RCS0

1A General 0 0 0 GPI5 GPI4 GPI3 GPI2 GPI1 Purpose Input

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 DATA BITSRegister Register 0x[HEX] Name D7 D6 D5 D4 D3 D2 D1 D0 1B General 0 0 0 GPO5 GPO4 GPO3 GPO2 GPO1 Purpose Output 1C –1F [Reserved] Not Used 20 [Reserved] Not Used

21 Rmt TCRIT RTH7 RTH6 RTH5 RTH4 RTH3 RTH2 RTH1 RTH0

22–2F [Reserved] Not Used 30–3F [Reserved] Not Used 40–45 [Reserved] Not Used

46 Tach Count TCLB5 TCLB4 TCLB3 TCLB2 TCLB1 TCLB0 TEDGE1 TEDGE0

47 Tach Count TCHB13 TCHB12 TCHB11 TCHB10 TCHB9 TCHB8 TCHB7 TCHB6

48 Tach Limit TLLB7 TLLB6 TLLB5 TLLB4 TLLB3 TLLB2 Not Used Not Used

49 Tach Limit TLHB15 TLHB14 TLHB13 TLHB12 TLHB11 TLHB10 TLHB9 TLHB8

4A PWM and 0 0 PWPGM PWOUT ± PWCKSL 0 TACH1 TACH0 RPM 4B Fan Spin- 0 0 SPINUP SPNDTY1 SPNDTY0 SPNUPT2 SPNUPT1 SPNUPT0 Up Config 4C PWM Value 0 0 PWVAL5 PWVAL4 PWVAL3 PWVAL2 PWVAL1 PWVAL0 4D PWM 0 0 0 PWMF4 PWMF3 PWMF2 PWMF1 PWMF0 Frequency 4E [Reserved] Not Used 4F Lookup 0 0 0 LOOKH4 LOOKH3 LOOKH2 LOOKH1 LOOKH0 Table Hystersis 50–5F Lookup Lookup Tableofup to8 PWM and Temp Pairsin8-bitRegisters Table 60–BE [Reserved] Not Used BF Rmt Diode 0 0 0 0 0 RDTF1 RDTF0 ALTCOMP Temp Filter C0 –FD [Reserved] Not Used FE Manufactur 0 0 0 0 0 0 0 1 er’s ID FF Stepping/Di 0 1 0 1 0 0 0 1 e Rev.ID Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com LM64 REGISTER MAP IN FUNCTIONAL ORDER The followingisa RegisterMap grouped inFunctionalOrder.Some addresslocationshave been leftblankto maintaincompatibilitywithLM86. Addresses inparenthesisare mirrorsof named address.Reading or writing eitheraddresswillaccessthesame 8-bitregister.The Fan Controland ConfigurationRegistersarelistedfirst,as thereisa requiredordertosetuptheseregistersfirstand thensetuptheothers.The detailedexplanationsof each registerwillfollowtheordershown below.POR = Power-On-Reset. Register POR DefaultRegisterName Read/Write[HEX] [HEX] FAN CONTROL REGISTERS 4A PWM and RPM R/W 20 4B Fan Spin-UpConfiguration R/W 3F 4D PWM Frequency R/W 17 Read Only4C PWM Value 00(R/W ifOverrideBitisSet) 50–5F Lookup Table R/W See Table 4F Lookup TableHysteresis R/W 04 CONFIGURATION REGISTER 03 (09) Configuration R/W 00 TACHOMETER COUNT AND LIMITREGISTERS

46 Tach Count LSB Read Only N/A

47 Tach Count MSB Read Only N/A

48 Tach LimitLSB R/W FF

49 Tach LimitMSB R/W FF

LOCAL TEMPERATURE AND LOCAL SETPOINT REGISTERS

00 LocalTemperature Read Only N/A

05 (0B) LocalHighSetpoint R/W 46 (70°) REMOTE DIODE TEMPERATURE AND SETPOINT REGISTERS

01 Remote TemperatureMSB Read Only N/A

10 Remote TemperatureLSB Read Only N/A

11 Remote TemperatureOffsetMSB R/W 00

12 Remote TemperatureOffsetLSB R/W 00

07 (0D) Remote HighSetpointMSB R/W 46 (70°C)

13 Remote HighSetpointLSB R/W 00

08 (0E) Remote Low SetpointMSB R/W 00 (0°C)

14 Remote Low SetpointLSB R/W 00

19 Remote TCRIT Setpoint R/W 55 (85°C)

21 Remote TCRIT Hys R/W 0A (10°C)

BF Remote DiodeTemperatureFilter R/W 00 CONVERSION AND ONE-SHOT REGISTERS 04 (0A) ConversionRate R/W 08 0F One-Shot WriteOnly N/A ALERT STATUS AND MASK REGISTERS

02 ALERT Status Read Only N/A

16 ALERT Mask R/W A4

FE Manufacturer'sID Read Only 01 FF Stepping/DieRev.ID Read Only 51 GENERAL PURPOSE REGISTERS 1A GeneralPurposeInput Read Only See (1) (1) ForRegister0x1A thePower-On-ResetforthefiveLSB 's arethelogicstatespresenton the5 GPIOx pins.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Register POR DefaultRegisterName Read/Write[HEX] [HEX] 1B GeneralPurposeOutput R/W See (2) [RESERVED] REGISTERS — NOT USED

06 Not Used N/A N/A

15 Not Used N/A N/A

17 Not Used N/A N/A

18 Not Used N/A N/A

1C –1F Not Used N/A N/A

20 Not Used N/A N/A

22–2F Not Used N/A N/A 30–3F Not Used N/A N/A 40–45 Not Used N/A N/A 4E Not Used N/A N/A 60–BE Not Used N/A N/A C0 –FD Not Used N/A N/A (2) ForRegister0x1B thePower-On-ResetforthefiveLSB 's arethelogicstatespresenton the5 GPDx pins. LM64 INITIALREGISTER SEQUENCE AND REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER The followingisa RegisterMap grouped infunctionaland sequence order.Some addresslocationshave been leftblank to maintaincompatibilitywithLM86. Addresses in parenthesisare mirrorsof named address for backwards compatibilitywithsome oldersoftware.Reading or writingeitheraddresswillaccess thesame 8-bit register. LM64 Required InitialFan ControlRegisterSequence Important!The BIOS must followthe sequence below to configurethe followingFan Registersforthe LM64 beforeusingany oftheFan orTachometerorPWM registers: Step [Register]HEX and Setup Instructions(1) 1 [4A]Writebits0 and 1;3 and 4.Thisincludestachsettingsifused,PWM internalclockselect(1.4kHz or360 kHz)and PWM OutputPolarity. 2 [4B]Writebits0 through5 toprogramthespin-upsettings. 3 [4D]Writebits0 through4 tosetthefrequencysettings.ThisworkswiththePWM internalclockselect.

4 Choose,thenwrite,onlyone ofthefollowing:

A.[4F–5F]theLookup Table,or B.[4C]thePWM valuebits0 through5. 5 IfStep4A,Lookup Table,was chosen and writtenthenwrite[4A]bit5 = 0. (1) Allotherregisterscan be writtenatany timeaftertheabove sequence. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com LM64 REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER Fan ControlRegisters Address Read/ Bit POR Name DescriptionHex Write s Value 4A HEX PWM AND RPM REGISTER 7:6 00 These bitsareunused and alwayssetto0. 0:thePWM Value(register4C) and theLookup Table(50–5F)areread-only.The PWM value(0to100%) isdeterminedby thecurrentremotediodetemperatureandPWM theLookup Table,and can be readfromthePWM valueregister.Program5 1 1:thePWM value(register4C) and theLookup Table(Register50–5F)are read/writeenabled.WritingthePWM ValueregisterwillsetthePWM output.Thisis alsothestateduringwhichtheLookup Tablecan be written. PWM 0:thePWM outputpinwillbe 0 V forfanOFF and open forfanON. 4 0 Output 1:thePWM outputpinwillbe open forfanOFF and 0 V forfanON. Polarity PWM Clock if0,themasterPWM clockis360 kHz4A R/W 3 0 Select if1,themasterPWM clockis1.4kHz. 2 0 [Reserved] Alwayswrite0 tothisbit. 00:Traditionaltachinputmonitor,falsereadingswhen underminimum detectable RPM. 01:Traditionaltachinputmonitor,FFFF readingwhen underminimum detectable RPM.Tachometer1:0 00 10:Most accuratereadings,FFFF readingwhen underminimum detectableRPM.Mode 11:Leastefforton programmed PWM offan,FFFF readingwhen underminimum detectableRPM. Note:IfthePWM Clockis360 kHz,mode 00 isused regardlessofthesettingof thesetwo bits. 4B HEX FAN SPIN-UP CONFIGURATION REGISTER 7:6 0 These bitsareunused and alwayssetto0 If0,thefanspin-upuses thedutycycleand spin-uptime,bits0–4. If1,theLM64 setsthePWM outputto100% untilthespin-uptimesout(perbits0–2)Fast ortheminimum desiredRPM has been reached(pertheTachometerSetpointTachometer 5 1 setting)usingthetachometerinput,whicheverhappens first.ThisbitoverridestheSpin-Up PWM Spin-UpDutyCycleregister(bits4:3)— PWM outputisalways100%. IfPWM Spin-UpTime (bits2:0)= 000,theSpin-Upcycleisbypassed,regardlessof thestateofthisbit. 00:Spin-Upcyclebypassed(noSpin-Up),unlessFastTachometerTerminatedSpin- PWM Up (bit5)isset. 4B R/W 4:3 11 Spin-Up 01:50% DutyCycle 10:75% –81% Depends on PWM Frequency.See ApplicationsNotes. 11:100% 000:Spin-Upcyclebypassed(No Spin-Up) 001:0.05seconds 010:0.1sPWM 011:0.2s2:0 111 Spin-Up 100:0.4sTime 101:0.8s 110:1.6s 111:3.2s 4D HEX FAN PWM FREQUENCY REGISTER 7:5 000 These bitsareunused and alwayssetto0 PWM The PWM Frequency= PWM_Clock /2n,where PWM_Clock = 360 kHz or1.4kHz4D R/W Frequency4:0 10111 (perthePWM ClockSelectbitinRegister4A),and n = valueoftheregister.Note:n = 0 ismapped ton = 1.See theApplicationsNotesattheend ofthisdatasheet.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Address Read/ Bit POR Name DescriptionHex Write s Value 4C HEX PWM VALUE REGISTER 7:6 00 These bitsareunused and alwayssetto0 IfPWM Program (register4A,bit5)= 0 thisregisterisreadonlyand reflectstheRead LM64 ’s currentPWM valuefromtheLookup Table.(Write IfPWM Program (register4A,bit5)= 1,thisregisterisread/writeand thedesiredonlyif PWM4C PWM valueiswrittendirectlytothisregister,insteadoffromtheLookup Table,forreg4A Value5:0 000000 directfanspeed control.bit5 = Thisregisterwillread0 duringtheSpin-Upcycle.1.) See ApplicationNotessectionattheend ofthisdatasheetformore information regardingthePWM Valueand DutyCyclein%. 50HEX to5FHEX LOOKUP TABLE (7BitsforTemperature and 6 BitsforPWM foreach Temperature/PWM Pair) 7 0 Thisbitisunused and alwayssetto0.Lookup Table 50 Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry1 inRegister51. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table51 PWM Entry15:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister50. 7 0 Thisbitisunused and alwayssetto0.Lookup Table 52 Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry2 inRegister53. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table53 PWM Entry25:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister52. 7 0 Thisbitisunused and alwayssetto0.Lookup Table 54 Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry3 inRegister55. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table55 PWM Entry35:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister54. 7 0 Thisbitisunused and alwayssetto0.Lookup Table 56 Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry4 inRegister57. Read. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table(Write57 PWM Entry45:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister56.onlyif reg4A 7 0 Thisbitisunused and alwayssetto0.Lookup Tablebit5 =58 Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue1.) 6:0 0x7F Entry5 inRegister59. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table59 PWM Entry55:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister58. 7 0 Thisbitisunused and alwayssetto0.Lookup Table 5A Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry6 inRegister5B. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table5B PWM Entry65:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister5A. 7 0 Thisbitisunused and alwayssetto0.Lookup Table 5C Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry7 inRegister5D. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table5D PWM Entry75:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister5C. 7 0 Thisbitisunused and alwayssetto0.Lookup Table 5E Temperature Iftheremotediodetemperatureexceedsthisvalue,thePWM outputwillbe thevalue6:0 0x7F Entry8 inRegister5F. 7:6 00 These bitsareunused and alwayssetto0.Lookup Table5F PWM Entry85:0 0x3F The PWM valuecorrespondingtothetemperaturelimitinregister5E. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com Address Read/ Bit POR Name DescriptionHex Write s Value 4FHEX LOOKUP TABLE HYSTERESIS 7:5 000 Lookup These bitsareunused and alwayssetto0 4F R/W Table 4:0 00100 The amount ofhysteresisappliedtotheLookup Table.(1LSB = 1°C).Hysteresis ConfigurationRegister ADDRESS Read/ PORBits Name DescriptionHex Write Value 03 (09)HEX CONFIGURATION REGISTER When thisbitisa 0,ALERT interruptsareenabled.ALERT7 0 When thisbitissettoa 1,ALERT interruptsaremasked, and theALERT pinisMask alwaysina highimpedance (open)state. When thisbitisa 0,theLM64 isinoperationalmode, converting,comparing,and updatingthePWM outputcontinuously. When thisbitisa 1,theLM64 entersa lowpower standbymode.6 0 STANDBY InSTANDBY, continuousconversionsarestopped,buta conversion/comparison cyclemay be initiatedby writingany valuetoregister0x0F.Operationofthe PWM outputinSTANDBY depends on thesettingofbit5 inthisregister. 03 (09) R/W When thisbitisa 0,theLM64 ’s PWM outputcontinuestooutputthecurrentfan PWM Disable controlsignalwhileinSTANDBY.5 0 inSTANDBY When thisbitisa 1,thePWM outputisdisabled(asdefinedby thePWM polarity bit)whileinSTANDBY. 4:1 0000 These bitsareunused and alwayssetto0. 0:an ALERT willbe generatedifany Remote Diodeconversionresultisabove theRemote High Set Pointor below theRemote Low Setpoint.RDTS Fault0 0 1:an ALERT willbe generatedonlyifthreeconsecutiveRemote DiodeQueue conversionsareabove theRemote High Set Pointor below theRemote Low Setpoint. Tachometer Count And LimitRegisters ADDRESS Read/ PORBits Name DescriptionHex Write Value 47HEX TACHOMETER COUNT (MSB) and 46HEX TACHOMETER COUNT (LSB) REGISTERS (16bits:Read LSB firsttolockMSB and ensure MSB and LSB arefrom thesame reading) Tachometer These registerscontainthecurrent16-bitTachometerCount,47 Read Only 7:0 N/A Count (MSB) representingtheperiodoftimebetween tachpulses.Note thatthe 16-bittachometerMSB and LSB arereversedfromthe16-bitTachometerRead Only 7:2 N/A temperaturereadingsCount (MSB) Bits: Edges Used Tach_Count_Multiple 00: Reserved-do notuse 46 01: 2 4 TachometerRead Only 1:0 00 10: 2 2Edge Count 11: 5 1 Note:IfPWM_Clock_Select = 360 kHz,thenTach_Count_Multiple = 1 regardlessofthesettingofthesebits. 49HEX TACHOMETER LIMIT(MSB) and 48HEX TACHOMETER LIMIT(LSB) REGISTERS Tachometer These registerscontainthecurrent16-bitTachometerCount,49 R/W 7:0 0xFF Limit(MSB) representingtheperiodoftimebetween tachpulses.Fan RPM = (f *5,400,000)/(TachometerCount),where f= 1 for2 pulses/rev fan;f= 2 for1 pulse/revfan;and f= 2/3for3 pulses/revfan.See Tachometer theApplicationNotessectionformore tachometerinformation.R/W 7:2 0xFF Limit(LSB)48 Note thatthe16-bittachometerMSB and LSB arereversedfrom the16 bittemperaturereadings. R/W 1:0 [Reserved] Not Used.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 LocalTemperature And LocalHigh SetpointRegisters ADDRESS Read/ Bit POR Name DescriptionHex Write s Value 00HEX LOCAL TEMPERATURE REGISTER (8-bits) Read00 7:0 N/A LocalTemperatureReading(8-bit) 8-bittemperatureoftheLM64.Only 05 (0B)HEX LOCAL HIGH SETPOINT REGISTER (8-bits) 0x4605 R/W 7:0 LocalHIGH Setpoint HighSetpointfortheinternaldiode.(70°) Remote Diode Temperature,OffsetAnd SetpointRegisters ADDRESS Read/ PORBits Name DescriptionHex Write Value ThisistheMSB oftheLM64 remotediodetemperaturevalue,2’s complement.Remote DiodeRead Bit7 isthesignbit,bit6 has a weight64°C, and bit0 has a weightof1°C. Read01 7:0 N/A TemperatureOnly thisbytefirst.The actualremotediodetemperatureis16°C higherthantheReading(MSB) valuesinregisters0x01 and 0x10. ThisistheLSB oftheLM64 remotediodetemperaturevalue,in2’s complement. 4:0 00 Always00. Remote These registerscontaintheoffsetvalueadded to,orsubtractedfrom,theremote

11 R/W 7:5 00 Temperature diode’s readingtocompensate forthedifferentnon-idealityfactorsofdifferent

OFFSET (MSB) processors,diodes,etc.The 2’s complement value,intheseregistersisadded to theoutputoftheLM64 ’s ADC toformthetemperaturereadingcontainedinRemote7:5 00 registers01 and 10.12 R/W Temperature 4:0 00 OFFSET (LSB) Always00. 0x46 Remote HIGH07 (0D) R/W 7:0 Highsetpointtemperatureforremotediode.Same formatas Remote(70°C) Setpoint(MSB) Temperature Reading (registers01 and 10). 7:5 00 Remote HIGH13 R/W Setpoint(LSB)4:0 00 Always00. 00 Remote LOW08 (0E) R/W 7:0 Low setpointtemperatureforremotediode.Same formatas Remote(0°C) Setpoint(MSB) Temperature Reading (registers01 and 10). 7:5 00 Remote LOW14 R/W Setpoint(LSB)4:0 00 Always00. 0x55 Remote Diode This8-bitintegerstoringtheT_CRIT limitisinitially85°C (101°C actualremote19 R/W 7:0 (85°C) T_CRIT Limit T_Critlimit).Thisvaluecan be changed atany timeafterpower-up. Remote Diode0x0A 8-bitintegerstoringT_CRIT hysteresis.T_CRIT staysactivateduntiltheremote21 R/W 7:0 T_CRIT(10°C) diodetemperaturegoes below[(T_CRITLimit)— (T_CRIT Hysteresis)].Hysteresis 7:3 00000 These bitsareunused and shouldalwayssetto0. 00:FilterDisabledRemote Diode 01:FilterLevel1 (minimalfiltering,same as 10)2:1 00 Temperature 10:FilterLevel1 (minimalfiltering,same as 01)BF R/W Filter 11:FilterLevel2 (maximum filtering) 0:theALERT pinfunctionsas an InterruptorARA mode.Comparator0 0 1:theALERT pinbehaves as a comparator,assertingitselfwhen an ALERTMode conditionexists,de-assertingitselfwhen theALERT conditiongoes away. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com ALERT StatusAnd Mask Registers ADDRESS Read/ PORBits Name DescriptionHex Write Value 02HEX ALERT STATUS REGISTER (8-bits)(AllAlarms arelatcheduntilread,then clearedifalarm conditionwas removed atthe timeoftheread.) When thisbitisa 0,theADC isnotconverting. 7 0 Busy When thisbitissettoa 1,theADC isperforminga conversion.Thisbitdoes not affectALERT status. When thisbitisa 0,theinternaltemperatureoftheLM64 isatorbelowtheLocal Local HighSetpoint.6 0 HighAlarm When thisbitisa 1,theinternaltemperatureoftheLM64 isabove theLocalHigh Setpoint,and an ALERT istriggered. 5 0 Thisbitisunused and alwaysreadas 0. When thisbitisa 0,thetemperatureoftheRemote Diodeisatorbelowthe Remote Remote HighSetpoint.4 0 HighAlarm When thisbitisa 1,thetemperatureoftheRemote Diodeisabove theRemote HighSetpoint,and an ALERT istriggered. When thisbitisa 0,thetemperatureoftheRemote Diodeisatorabove the Remote Remote Low Setpoint.Read 3 00x02 Low Alarm When thisbitisa 1,thetemperatureoftheRemote DiodeisbelowtheRemoteOnly Low Setpoint,and an ALERT istriggered. When thisbitisa 0,theRemote Diodeappearstobe correctlyconnected.Remote Diode2 0 When thisbitisa 1,theRemote Diodemay be disconnectedorshorted.ThisFaultAlarm Alarmdoes nottriggeran ALERT. When thisbitisa 0,thetemperatureoftheRemote Diodeisatorbelowthe Remote T_CRIT Limit.1 0 T_CRIT Alarm When thisbitisa 1,thetemperatureoftheRemote Diodeisabove theT_CRIT Limit,and an ALERT istriggered. When thisbitisa 0,theTachometercountislowerthanorequaltothe TachometerLimit(theRPM ofthefanisgreaterthanorequaltotheminimum desiredRPM).0 0 Tach Alarm When thisbitisa 1,theTachometercountishigherthantheTachometerLimit (theRPM ofthefanislessthantheminimum desiredRPM), and an ALERT is triggered. 16HEX ALERT MASK REGISTER (8-bits) 7 1 Thisbitisunused and alwaysreadas 1. LocalHigh When thisbitisa 0,a LocalHighAlarmeventwillgeneratean ALERT.6 0 AlarmMask When thisbitisa 1,a LocalHighAlarmwillnotgeneratean ALERT 5 1 Thisbitisunused and alwaysreadas 1. Remote When thisbitisa 0,Remote HighAlarmeventwillgeneratean ALERT.4 0 HighAlarmMask When thisbitisa 1,a Remote HighAlarmeventwillnotgeneratean ALERT. Remote When thisbitisa 0,a Remote Low Alarmeventwillgeneratean ALERT. 16 R/W 3 0 Low Alarm When thisbitisa 1,a Remote Low Alarmeventwillnotgeneratean ALERT. Mask 2 1 Thisbitisunused and alwaysreadas 1. Remote When thisbitisa 0,a Remote T_CRIT eventwillgeneratean ALERT. 1 0 T_CRIT When thisbitisa 1,a Remote T_CRIT eventwillnotgeneratean ALERT. AlarmMask Tach When thisbitisa 0,a Tach Alarmeventwillgeneratean ALERT.0 0 AlarmMask When thisbitisa 1,a Tach Alarmeventwillnotgeneratean ALERT.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Conversion Rate And One-Shot Registers ADDRESS Read/ PORBits Name DescriptionHex Write Value 04 (0A)HEX CONVERSION RATE REGISTER (8-bits) SetstheconversionrateoftheLM64. 00000000 = 0.0625Hz 00000001 = 0.125Hz 00000010 = 0.25Hz 00000011 = 0.5Hz Conversion 00000100 = 1 Hz04 (0A) R/W 7:0 0x08 Rate 00000101 = 2 Hz 00000110 = 4 Hz 00000111 = 8 Hz 00001000 = 16 Hz 00001001 = 32 Hz Allothervalues= 32 Hz 04 (0A)HEX ONE-SHOT REGISTER (8-bits) Write One Shot WiththeLM64 intheSTANDBY mode a singlewritetothisregisterwillinitiate0F 7:0 N/AOnly Trigger one completetemperatureconversioncycle. ID Registers ADDRESS Read/ PORBits Name DescriptionHex Write Value FFHEX STEPPING /DIE REVISION ID REGISTER (8-bits) Read Stepping/DieFF 7:0 0x51 VersionofLM64Only RevisionID FE HEX MANUFACTURER ’S ID REGISTER (8-bits) ReadFE 7:0 0x01 Manufacturer’s ID 0x01 = Texas InstrumentsOnly GeneralPurpose Registers ADDRES Read/ PORS Bits Name DescriptionWrite ValueHex 1A HEX GENERAL PURPOSE INPUT REGISTER (8-bits) 7:5 000 These bitsareunused and alwayssetto0. Read General1A Only 4:0 See (1) Purpose These 5 bitsreflectthelogicstatesoftheGPIOx pins. Input 1B HEX GENERAL PURPOSE OUTPUT REGISTER (8-bits) 7:5 000 These bitsareunused and alwayssetto0. General These 5 bitsreflecttheGPI registerbits[4:0]exceptforPower-On-1B R/W 4:0 See (2) Purpose Defaultwhen theyarethe5 logicstatesoftheGeneralPupose Default Output (GPD) inputpins. (1) ForRegister0x1A thePower-On-ResetforthefiveLSB 's arethelogicstatespresenton the5 GPIOx pins. (2) ForRegister0x1B thePower-On-ResetforthefiveLSB 's arethelogicstatespresenton the5 GPDx pins. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:LM64

%100 %100___ __(%) u= forValuePWM ValuePWMDutyCycle LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com ApplicationNotes FAN CONTROL DUTY CYCLE VS. REGISTER SETTINGS AND FREQUENCY PWM PWM ActualDutyPWM PWM PWM PWMStep Freq at Freq at Cycle,%Freq Value Value ValueResolution, 360 kHz 1.4kHz When4D 4D [5:0] 4C [5:0]for 4C [5:0]% Internal Internal 75% is[4:0] for100% about 75% for50% Clock,kHz Clock,Hz Selected

0 Address0 ismapped toAddress1

1 50 2 1 1 180.0 703.1 50.0 2 25 4 3 2 90.00 351.6 75.0 3 16.7 6 5 3 60.00 234.4 83.3 4 12.5 8 6 4 45.00 175.8 75.0 5 10.0 10 8 5 36.00 140.6 80.0 6 8.33 12 9 6 30.00 117.2 75.0 7 7.14 14 11 7 25.71 100.4 78.6 8 6.25 16 12 8 22.50 87.9 75.0 9 5.56 18 14 9 20.00 78.1 77.8 10 5.00 20 15 10 18.00 70.3 75.0 11 4.54 22 17 11 16.36 63.9 77.27 12 4.16 24 18 12 15.00 58.6 75.00 13 3.85 26 20 13 13.85 54.1 76.92 14 3.57 28 21 14 12.86 50.2 75.00 15 3.33 30 23 15 12.00 46.9 76.67 16 3.13 32 24 16 11.25 43.9 75.00 17 2.94 34 26 17 10.59 41.4 76.47 18 2.78 36 27 18 10.00 39.1 75.00 19 2.63 38 29 19 9.47 37.0 76.32 20 2.50 40 30 20 9.00 35.2 75.00 21 2.38 42 32 21 8.57 33.5 76.19 22 2.27 44 33 22 8.18 32.0 75.00 23 2.17 46 35 23 7.82 30.6 76.09 24 2.08 48 36 24 7.50 29.3 75.00 25 2.00 50 38 25 7.20 28.1 76.00 26 1.92 52 39 26 6.92 27.0 75.00 27 1.85 54 41 27 6.67 26.0 75.93 28 1.79 56 42 28 6.42 25.1 75.00 29 1.72 58 44 29 6.21 24.2 75.86 30 1.67 60 45 30 6.00 23.4 75.00 31 1.61 62 47 31 5.81 22.7 75.81 Computing Duty Cycles fora Given Frequency Selecta PWM Frequencyfromthefirstcolumn correspondingtothedesiredactualfrequencyincolumns 6 or7. Note thePWM Valuefor100% DutyCycle. FindtheDutyCycleby takingthePWM ValueofRegister4C and computing: (1) Example:For a PWM Frequencyof24,a PWM Valueat100% = 48 and PWM Valueactual= 28,thentheDuty

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 USE OF THE LOOKUP TABLE FOR NON-LINEAR PWM VALUES VS TEMPERATURE The Lookup Table,Registers50 through5F,can be used tocreatea non-linearPWM vs Temperaturecurvethat couldbe used to reduce the acousticnoisefrom processorfan due to linearor step transferfunctions.An example isgivenbelow: EXAMPLE: Ina particularsystem itwas foundthatthebestacousticfannoiseperformancewas foundtooccurwhen the PWM vs Temperaturetransferfunctioncurvewas parabolicinshape. From 25°C to105°C thefanistogo from 20% to100%. Sincethereare 8 stepstotheLookup Tablewe will breakup theTemperaturerangeinto8 separatetemperatures.For the80°C over8-steps= 10°C perstep.This takescareofthex-axis. For the PWM Value,we firstselectthe PWM Frequency.In thisexample we willmake the PWM Frequency (Register4C) 20. For100% DutyCyclethen,thePWM valueis40.For20% theminimum is40 x (0.2)= 8. We can thenarrangethePWM, Temperaturepairsina parabolicfashionintheformofy = 0.005•(x−25)2 + 8 PWM Value ClosestPWMTemperature Calculated Value 25 8.0 8 35 8.5 9 45 10.0 10 55 12.5 13 65 16.0 16 75 20.5 21 85 26.0 26 95 32.5 33 105 40.0 40 We can thenprogram theLookup Tablewiththetemperatureand ClosestPWM Valuesrequiredforthecurve requiredinourexample. NON-IDEALITY FACTOR AND TEMPERATURE ACCURACY The LM64 can be appliedto remote diode sensingin the same way as otherintegrated-circuittemperature sensors.Itcan be solderedto a printed-circuitboard,and because the path of best thermalconductivityis between thedieand thepins,itstemperaturewilleffectivelybe thatoftheprinted-circuitboardlandsand traces solderedto itspins.This presumes thatthe ambient airtemperatureis nearlythe same as the surface temperatureof the printed-circuitboard.Ifthe airtemperatureis much higheror lower than the surface temperature,theactualtemperatureoftheLM64 diewillbe an intermediatetemperaturebetween thesurface and airtemperatures.Again,the primarythermalconductionpath isthroughthe leads,so the circuitboard surfacetemperaturewillcontributetothedietemperaturemuch more thantheairtemperature. To measure thetemperatureexternaltothedieuse a remotediode.Thisdiodecan be locatedon thedieofthe targetIC,such as a CPU processorchip,allowingmeasurement of the IC’s temperature,independentof the LM64 ’s temperature.The LM64 has been optimizedforuse witha MMBT3904 diode-connectedtransistor. A discretediodecan alsobe used tosense thetemperatureofexternalobjectsorambientair.Remember thata discretediode’s temperaturewillbe affected,and oftendominatedby,thetemperatureofitsleads. Most silicondiodesdo notlendthemselveswelltothisapplication.Itisrecommended thata diode-connected MMBT3904 transistorbe used.The base ofthetransistorisconnectedtothecollectorand becomes theanode. The emitteristhecathode. Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:LM64

N q kTVbe ln˜¸¨ ' K ¸ SF II ˜ e ˜ T be V V K ª º VT = q kT SF II ˜ e ˜ T be V V K 1 ª º LM64 SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com Diode Non_Ideality When a transistorisconnectedtoa diodethefollowingrelationshipholdsforVbe,T,and IF: (2) where

  • q = 1.6x10−19 Coulombs (theelectroncharge)
  • T = AbsoluteTemperatureinKelvin
  • k = 1.38x10−23 joules/K(Boltzmann’s constant)
  • η isthenon-idealityfactorofthemanufacturingprocessused tomake thethermaldiode
  • Is = SaturationCurrentand isprocessdependent
  • If = ForwardCurrentthroughthebase emitterjunction
  • Vbe = Base EmitterVoltageDrop (3) Intheactiveregion,the−1 termisnegligibleand may be eliminated,yieldingthefollowingequation (4) Intheabove equation,η and Is aredependentupon theprocessthatwas used inthefabricationoftheparticular diode.By forcingtwo currentswitha verycontrolledratio(N)and measuringtheresultingvoltagedifference,itis possibletoeliminatetheIs term.Solvingfortheforwardvoltagedifferenceyieldstherelationship: (5) The non-idealityfactor,η,istheonlyotherparameternotaccountedforand depends on thediodethatisused formeasurement.SinceΔVbe isproportionaltobothη and T, thevariationsinη cannotbe distinguishedfrom variationsintemperature.Sincethetemperaturesensordoes notcontrolthenon-idealityfactor,itwilldirectlyadd totheinaccuracyofthesensor. For example,ifa processormanufacturerspecifiesa ±0.1% variationinη from partto part.As an example, assume thata temperaturesensorhas an accuracyspecificationof ±1°C at room temperatureof 25°C. The resultingaccuracywillbe: The additionalinaccuracyinthetemperaturemeasurement caused by η,can be eliminatedifeach temperature sensoriscalibratedwiththeremotediodethatitwillbe pairedwith.Refertotheprocessordatasheetforthenon- idealityfactor. Compensating forDiode Non-Ideality In orderto compensate forthe errorsintroducedby non-ideality,the temperaturesensor iscalibratedfora particularprocessor.Texas Instrumentstemperaturesensorsarealwayscalibratedtothetypicalnon-idealityofa particularprocessortype. The LM64 iscalibratedfora MMBT3904 diode-connectedtransistor. When a temperaturesensor,calibratedfora specifictypeofprocessorisused witha differentprocessortypeor a givenprocessortypehas a non-idealitythatstraysformthetypicalvalue,errorsareintroduced.

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RPMRPMFan _2723 1983 )_(__ 000,400, 5_ DecimalCountTachTotal fRPMFan u= LM64 www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013 Temperatureerrorsassociatedwithnon-idealitymay be introducedina specifictemperaturerange ofconcern throughtheuse oftheTemperatureOffsetRegisters11HEX and 12HEX . The userisencouragedtosend an e-mailtohardware.monitor.team@nsc.com tofurtherrequestinformation on ourrecommended settingoftheoffsetregisterfordifferentprocessortypes. COMPUTING RPM OF THE FAN FROM THE TACH COUNT The Tach Count Registers46HEX and 47HEX countthenumber ofperiodsofthe90 kHz tachometerclockinthe LM64 forthetachometerinputfromthefanassuming a 2 pulseperrevolutionfantachometer,such as thefans suppliedwiththe Pentium 4 boxed processors.The RPM of the fan can be computed from the Tach Count Registers46HEX and 47HEX .Thiscan bestbe shown throughan example. Example: Given:thefanused has a tachometeroutputwith2 perrevolution. Let: Register46 (LSB)isBF HEX = Decimal(11x 16)+ 15 = 191 and Register47 (MSB) is7HEX = Decimal(7x 256)= 1792. The totalTach Count,indecimal,is191 + 1792 = 1983. The RPM iscomputed usingtheformula (6) where f= 1 for2 pulses/revfantachometeroutput; f= 2 for1 pulse/revfantachometeroutput,and f= 2 /3 for3 pulses/revfantachometeroutput Forourexample (7) PCB LAYOUT FOR MINIMIZING NOISE Figure12. IdealDiode Trace Layout Ina noisyenvironment,such as a processormotherboard,layoutconsiderationsareverycritical.Noiseinduced on tracesrunningbetween the remote temperaturediode sensor and the LM64 can cause temperature conversionerrors.Keep inmind thatthesignalleveltheLM64 istryingtomeasure isinmicrovolts.The following guidelinesshouldbe followed: 1. Placea 0.1µF power supplybypass capacitoras closeas possibletotheVDD pinand therecommended 2.2 nF capacitoras closeas possibleto the LM64's D+ and D − pins.Make sure the tracesto the 2.2 nF capacitorarematched. 2. Ideally,the LM64 shouldbe placedwithin10 cm of the Processordiode pinswiththe tracesbeing as straight,shortand identicalas possible.Trace resistanceof1 Ω can cause as much as 1°C oferror.This Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:LM64

SNAS207A –MAY 2004–REVISED MARCH 2013 www.ti.com errorcan be compensated by usingthe Remote TemperatureOffsetRegisters,sincethe valueplacedin theseregisterswillautomaticallybe subtractedfromoradded totheremotetemperaturereading. 3. Diode tracesshouldbe surroundedby a GND guard ringtoeitherside,above and below ifpossible.This GND guard shouldnotbe between theD+ and D − lines.Intheeventthatnoisedoes coupletothediode linesitwouldbe idealifitiscoupledcommon mode. ThatisequallytotheD+ and D − lines. 4. Avoidroutingdiodetracesincloseproximitytopower supplyswitchingorfilteringinductors. 5. Avoidrunningdiodetracesclosetoor paralleltohighspeed digitaland bus lines.Diode tracesshouldbe keptatleast2 cm apartfromthehighspeed digitaltraces. 6. Ifitisnecessarytocrosshighspeed digitaltraces,thediodetracesand thehighspeed digitaltracesshould crossata 90 degreeangle. 7. The idealplacetoconnecttheLM64's GND pinisas closeas possibletotheProcessor'sGND associated withthesense diode. 8. Leakage currentbetween D+ and GND shouldbe keptto a minimum. One nano-ampere of leakagecan cause as much as 1°C oferrorinthediodetemperaturereading.Keepingtheprintedcircuitboardas clean as possiblewillminimizeleakagecurrent. Noisecouplingintothedigitallinesgreaterthan400 mVp-p (typicalhysteresis)and undershootlessthan500 mV below GND, may preventsuccessfulSMBus communicationwiththeLM64. SMBus no acknowledgeisthemost common symptom, causing unnecessary trafficon the bus. Althoughthe SMBus maximum frequencyof communicationisratherlow (100 kHz max),carestillneeds tobe takentoensureproperterminationwithina system withmultiplepartson the bus and longprintedcircuitboard traces.An RC lowpass filterwitha 3 dB cornerfrequencyofabout40 MHz isincludedon theLM64's SMBCLK input.Additionalresistancecan be added inserieswiththeSMBData and SMBCLK linestofurtherhelpfilternoiseand ringing.Minimizenoisecouplingby keepingdigitaltracesoutofswitchingpower supplyareasas wellas ensuringthatdigitallinescontaininghigh speed datacommunicationscrossatrightanglestotheSMBData and SMBCLK lines.

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www.ti.com SNAS207A –MAY 2004–REVISED MARCH 2013

REVISION HISTORY

Changes from Original(March 2013)toRevisionA Page Copyright© 2004–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:LM64

www.ti.com 7-Oct-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM64CILQ-F/NOPB ACTIVE WQFN NHW 24 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR 0 to 125 64CILQF (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM64CILQ-F/NOPB WQFN NHW 24 1000 213.0 191.0 55.0 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Pack Materials-Page 2

www.ti.com LQA24A (Rev B)

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