LM628

LM628 NSC | Alldatasheet

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n 32-bit position, velocity, and acceleration registers n Programmable digital PID filter with 16-bit coefficients n Programmable derivative sampling interval n 8- or 12-bit DAC output data (LM628) n 8-bit sign-magnitude PWM output data (LM629) n Internal trapezoidal velocity profile generator n Velocity, target position, and filter parameters may be changed during motion n Position and velocity modes of operation n Real-time programmable host interrupts n 8-bit parallel asynchronous host interface n Quadrature incremental encoder interface with index pulse input n Available in a 28-pin dual in-line package or a 24-pin surface mount package (LM629 only) TRI-STATE® is a registered trademark of National Semiconductor Corporation. DS009219-1 FIGURE 1. Block Diagram

*Do not connect. Order Number LM629M-6, LM629M-8, LM628N-6, LM628N-8, LM629N-6 or LM629N-8 See NS Package Number M24B or N28B LM628/LM629 www.national.com 2

Absolute Maximum Ratings(Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Voltage at Any Pin with Respect to GND −0.3V to +7.0V Ambient Storage Temperature −65˚C to +150˚C Lead Temperature 28-pin Dual In-Line Package (Soldering, 4 sec.) 260˚C 24-pin Surface Mount Package (Soldering, 10 sec.) 300˚C Maximum Power Dissipation A ≤ 85˚C, (Note 2) 605 mW ESD Tolerance (CZAP = 120 pF, RZAP = 1.5k) 2000V Operating Ratings Temperature Range −40˚C < TA < +85˚C Clock Frequency: LM628N-6, LM629N-6, LM629M-6 1.0 MHz < fCLK < 6.0 MHz LM628N-8, LM629N-8, LM629M-8 1.0 MHz < fCLK < 8.0 MHz VDD Range 4.5V < VDD < 5.5V (VDD and TA per Operating Ratings; fCLK = 6 MHz) Symbol Parameter Conditions Tested Limits Units Min Max IDD Supply Current Outputs Open 110 mA INPUT VOLTAGES V IH Logic 1 Input Voltage 2.0 V VIL Logic 0 Input Voltage 0.8 V IIN Input Currents 0 ≤ VIN ≤ VDD −10 10 µA OUTPUT VOLTAGES V OH Logic 1 I OH = −1.6 mA 2.4 V VOL Logic 0 I OL = 1.6 mA 0.4 V IOUT TRI-STATE ® Output Leakage Current 0 ≤ VOUT ≤ VDD −10 10 µA (VDD and TA per Operating Ratings; fCLK = 6 MHz; CLOAD = 50 pF; Input Test Signal tr = tf = 10 ns) Timing Interval T # Tested Limits Units Min Max ENCODER AND INDEX TIMING (See Figure 2) Motor-Phase Pulse Width T1 µs Dwell-Time per State T2 µs Index Pulse Setup and Hold T3 0 µs (Relative to A and B Low) CLOCK AND RESET TIMING (See Figure 3) Clock Pulse Width LM628N-6, LM629N-6, LM629M-6 T4 78 ns LM628N-8, LM629N-8, LM629M-8 T4 57 ns Clock Period LM628N-6, LM629N-6, LM629M-6 T5 166 ns LM628N-8, LM629N-8, LM629M-8 T5 125 ns Reset Pulse Width T6 µs LM628/LM629 www.national.com3

other reset and repeat the above steps. coder provides feedback for closing the position servo loop. the digital filter to drive the motor to the desired position. The LM628 interfaces to a motor via an incremental encoder. at the time when all three encoder inputs are logic low. TABLE 1. System Specifications Summary FIGURE 8. 12-Bit Multiplexed Output Timing

Theory of Operation(Continued) tion goes undetected, and the impeding force on the motor is subsequently released, the motor could reach a very high velocity in order to catch up to the desired position (which is still advancing as specified). This condition is easily de- tected; see commands LPEI and LPES. All trajectory parameters are 32-bit values. Position is a signed quantity. Acceleration and velocity are specified as 16-bit, positive-only integers having 16-bit fractions. The in- teger portion of velocity specifies how many counts per sam- pling interval the motor will traverse. The fractional portion designates an additional fractional count per sampling inter- val. Although the position resolution of the LM628 is limited to integer counts, the fractional counts provide increased av- erage velocity resolution. Acceleration is treated in the same manner. Each sampling interval the commanded accelera- tion value is added to the current desired velocity to generate a new desired velocity (unless the command velocity has been reached). One determines the trajectory parameters for a desired move as follows. If, for example, one has a 500-line shaft en- coder, desires that the motor accelerate at one revolution per second per second until it is moving at 600 rpm, and then de- celerate to a stop at a position exactly 100 revolutions from the start, one would calculate the trajectory parameters as follows: let P = target position (units= encoder counts) let R = encoder lines * 4 (system resolution) then R = 500 * 4 = 2000 and P = 2000 * desired number of revolutions P = 2000 * 100 revs= 200,000 counts (value to load) P (coding)= 00030D40 (hex code written to LM628) let V = velocity (units= counts/sample) let T = sample time (seconds)= 341 µs (with 6 MHz clock) let C = conversion factor= 1 minute/60 seconds then V = R * T * C * desired rpm and V = 2000 * 341E−6 * 1/60* 600 rpm V = 6.82 counts/sample V (scaled)= 6.82* 65,536= 446,955.52 V (rounded)= 446,956 (value to load) V (coding)= 0006D1EC (hex code written to LM628) let A = acceleration (units= counts/sample/sample) A = R * T * T * desired acceleration (rev/sec/sec) then A = 2000 * 341E−6 * 341E-6 * 1 rev/sec/sec and A = 2.33E−4 counts/sample/sample A (rounded)= 15 (value to load) A (coding)= 0000000F (hex code written to LM628) The above position, velocity, and acceleration values must be converted to binary codes to be loaded into the LM628. The values shown for velocity and acceleration must be mul- tiplied by 65,536 (as shown) to adjust for the required integer/fraction format of the input data. Note that after scal- ing the velocity and acceleration values, literal fractional data cannot be loaded; the data must be rounded and converted to binary. The factor of four increase in system resolution is due to the method used to decode the quadrature encoder signals, see Figure 9. PID COMPENSATION FILTER The LM628 uses a digital Proportional Integral Derivative (PID) filter to compensate the control loop. The motor is held at the desired position by applying a restoring force to the motor that is proportional to the position error, plus the inte- gral of the error, plus the derivative of the error. The following discrete-time equation illustrates the control performed by the LM628: (1) where u(n) is the motor control signal output at sample time n, e(n) is the position error at sample time n, n' indi- cates sampling at the derivative sampling rate, and kp, ki, and kd are the discrete-time filter parameters loaded by the users. The first term, the proportional term, provides a restoring force porportional to the position error, just as does a spring obeying Hooke’s law. The second term, the integration term, provides a restoring force that grows with time, and thus en- sures that the static position error is zero. If there is a con- stant torque loading, the motor will still be able to achieve zero position error. The third term, the derivative term, provides a force propor- tional to the rate of change of position error. It acts just like viscous damping in a damped spring and mass system (like a shock absorber in an automobile). The sampling interval associated with the derivative term is user-selectable; this capability enables the LM628 to control a wider range of in- ertial loads (system mechanical time constants) by providing a better approximation of the continuous derivative. In gen- eral, longer sampling intervals are useful for low-velocity op- erations. In operation, the filter algorithm receives a 16-bit error signal from the loop summing-junction. The error signal is saturated at 16 bits to ensure predictable behavior. In addition to being multiplied by filter coefficient kp, the error signal is added to an accumulation of previous errors (to form the integral sig- nal) and, at a rate determined by the chosen derivativesam- pling interval, the previous error is subtracted from it (to form the derivative signal). All filter multiplications are 16-bit op- erations; only the bottom 16 bits of the product are used. The integral signal is maintained to 24 bits, but only the top 16 bits are used. This scaling technique results in a more us- able (less sensitive) range of coefficient ki values. The 16 bits are right-shifted eight positions and multiplied by filter coefficient ki to form the term which contributes to the motor control output. The absolute magnitude of this product is compared to coefficient il, and the lesser, appropriately signed magnitude then contributes to the motor control sig- nal. The derivative signal is multiplied by coefficient kd each de- rivativesampling interval. This product contributes to the mo- tor control outputeverysample interval, independent of the user-chosenderivativesampling interval. The kp, limited ki, and kd product terms are summed to form a 16-bit quantity. Depending on the output mode (wordsize), either the top 8 or top 12 bits become the motor control out- put signal. LM628/LM629 www.national.com 10

TABLE 2. LM628 User Command Set (Continued) Note 4:Commands may be executed “On the Fly” during motion. Note 5:Commands not applicable to execution during motion. Note 6:Command may be executed during motion if acceleration parameter was not changed. Note 7:Command needs no code because the command port status-byte read is totally supported by hardware. whether the command is executable during motion. to initialize the system for use. executed at any time, will be completed in less than 1.5 ms. Also see commands PORT8 and PORT12.

Initialization Commands(Continued) This command declares the current position as “home”, or absolute position 0 (Zero). If DFH is executed during motion it will not affect the stopping position of the on-going move unless command STT is also executed. Interrupt Control Commands The following seven LM628 user commands are associated with conditions which can be used to interrupt the host com- puter. In order for any of the potential interrupt conditions to actually interrupt the host via Pin 17, the corresponding bit in the interrupt mask data associated with command MSKI must have been set to logic high (the non-masked state). The identity of all interrupts is made known to the host via reading and parsing the status byte. Even if all interrupts are masked off via command MSKI, the state of each condition is still reflected in the status byte. This feature facilitates poll- ing the LM628 for status information, as opposed to interrupt driven operation. SIP COMMAND: Set Index Position Command Code: 03 Hex Data Bytes: None Executable During Motion: Yes After this command is executed, the absolute position which corresponds to the occurrence of the next index pulse input will be recorded in the index register, and bit 3 of the status byte will be set to logic high. The position is recorded when both encoder-phase inputs and the index pulse input are logic low. This register can then be read by the user (see de- scription for command RDIP) to facilitate aligning the defini- tion of home position (see description of command DFH) with an index pulse. The user can also arrange to have the LM628 interrupt the host to signify that an index pulse has occurred. See the descriptions for commands MSKI and RSTI. LPEI COMMAND: Load Position Error for Interrupt Command Code: 1B Hex Data Bytes: Two Data Range: 0000 to 7FFF Hex Executable During Motion: Yes An excessive position error (the output of the loop summing junction) can indicate a serious system problem; e.g., a stalled rotor. Instruction LPEI allows the user to input a threshold for position error detection. Error detection occurs when the absolute magnitude of the position error exceeds the threshold, which results in bit 5 of the status byte being set to logic high. If it is desired to also stop (turn off) the mo- tor upon detecting excessive position error, see command LPES, below. The first byte of threshold data written with command LPEI is the more significant. The user can have the LM628 interrupt the host to signify that an excessive po- sition error has occurred. See the descriptions for com- mands MSKI and RSTI. LPES COMMAND: Load Position Error for Stopping Command Code: 1A Hex Data Bytes: Two Data Range: 0000 to 7FFF Hex Executable During Motion: Yes Instruction LPES is essentially the same as command LPEI above, but adds the feature of turning off the motor upon de- tecting excessive position error. The motor drive is not actu- ally switched off, it is set to half-scale, the offset-binary code for zero. As with command LPEI, bit 5 of the status byte is also set to logic high. The first byte of threshold data written with command LPES is the more significant. The user can have the LM628 interrupt the host to signify that an exces- sive position error has occurred. See the descriptions for commands MSKI and RSTI. SBPA COMMAND: Command Code: 20 Hex Data Bytes: Four Data Range: C0000000 to 3FFFFFFF Hex Executable During Motion: Yes This command enables the user to set a breakpoint in terms of absolute position. Bit 6 of the status byte is set to logic high when the breakpoint position is reached. This condition is useful for signaling trajectory and/or filter parameter up- dates. The user can also arrange to have the LM628 inter- rupt the host to signify that a breakpoint position has been reached. See the descriptions for commands MSKI and RSTI. SBPR COMMAND: Command Code: 21 Hex Data Bytes: Four Data Range: See Text Executable During Motion: Yes This command enables the user to set a breakpoint in terms of relative position. As with command SBPA, bit 6 of the sta- tus byte is set to logic high when the breakpoint position (relative to the current commanded target position) is reached. The relative breakpoint input value must be such that when this value is added to the target position the result remains within the absolute position range of the system (C0000000 to 3FFFFFFF hex). This condition is useful for signaling trajectory and/or filter parameter updates. The user can also arrange to have the LM628 interrupt the host to sig- nify that a breakpoint position has been reached. See the de- scriptions for commands MSKI and RSTI. MSKI COMMAND: MaSK Interrupts Command Code: 1C Hex Data Bytes: Two Data Range: See Text Executable During Motion: Yes The MSKI command lets the user determine which potential interrupt condition(s) will interrupt the host. Bits 1 through 6 of the status byte are indicators of the six conditions which are candidates for host interrupt(s). When interrupted, the host then reads the status byte to learn which condition(s) occurred. Note that the MSKI command is immediately fol- lowed by two data bytes. Bits 1 through 6 of the second (less significant) byte written determine the masked/unmasked status of each potential interrupt. Any zero(s) in this 6-bit field will mask the corresponding interrupt(s); any one(s) en- able the interrupt(s). Other bits comprising the two bytes have no effect. The mask controls only the host interrupt pro- cess; reading the status byte will still reflect the actual condi- tions independent of the mask byte. See Table 3. LM628/LM629 www.national.com13

TABLE 3. Mask and Reset Bit Allocations for Interrupts Table 3. Also see trol the timing of these system changes. is substituted for the integration term value. TABLE 4. Filter Control word Bit Allocation Table 5. The user must locally save and restore these bits during successive writes of the filter control word. Bits 4 through 7 of the filter control word are not used. choose to update any or all (or none) of the filter parameters. the corresponding bit position(s) of the filter control word. ter control word are written in pairs to comprise 16-bit words. facilitates easier synchronization of multiple-axis controls.

stop, and to control the timing of these system changes. TABLE 5. Derivative-Term Sampling Interval Selection Codes being changed. The first byte written is the more significant. TABLE 6. Trajectory Control Word Bit Allocation effect when in position mode. mode (Bit 11 logic one) or position mode (Bit 11 logic zero).

pleted the current move or has been manually stopped. words; the word and byte order is most-to-least significant. eration, then velocity, and finally position. tates easier synchronization of multiple-axis controls. and the command will be ignored. tus read is selected by placing CS , PS and RD at logic zero. TABLE 7. Status Byte Bit Allocation except as described in the previous sentence. logic one when a position-error interrupt condition exists. rupt mask status. Bit 4 is cleared via command RSTI.

high) will not generate a command-error interrupt. TABLE 8. Signals Register Bit Allocation (and Pin 17) are cleared via command RSTI. not occur until command STT is executed. does not occur until command STT is executed. STT command. Bit 10 is cleared by the next STT command. mand LPES is executed. Bit 9 is cleared by command LPEI. set until the next index pulse occurs. most-to-least significant order.

FIGURE 13. LM628 and HPC Interface

*DAC offset must be adjusted to minimize DAC linearity and monotonicity errors. See text. FIGURE 14. Interfacing a 12-Bit DAC and LM628

Physical Dimensionsinches (millimeters) unless otherwise noted 24-Lead Small Outline Package (M) Order Number LM629M-6 or LM629M-8

28 Lead Molded Dual-In-Line Package (N)

Order Number LM628N-6, LM628N-8, LM629N-6 or LM629N-8 LM628/LM629 www.national.com23

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Français Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com LM628/LM629 Precision Motion Controller National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.