LM6134_14 NSC | Alldatasheet

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 LM6132/LM6134DualandQuadLowPower10MHzRail-to-RailI/OOperationalAmplifiers Check forSamples: LM6132 1FEATURES DESCRIPTION The LM6132/34 providesnew levelsof speed vs. 2• (For5V Supply,Typ Unless Noted) power performanceinapplicationswhere low voltage• Rail-to-RailInputCMVR −0.25Vto5.25V supplies or power limitationspreviouslymade

  • Rail-to-RailOutput Swing 0.01Vto4.99V compromise necessary.Withonly360 μA/amp supply current,the 10 MHz gain-bandwidthof thisdevice• High Gain-Bandwidth,10 MHz at20 kHz supports new portableapplicationswhere higher• Slew Rate 12 V/μs power devicesunacceptablydrainbatterylife.
  • Low Supply Current360 μA/Amp The LM6132/34 can be driven by voltagesthat• Wide Supply Range 2.7Vtoover 24V exceed both power supply rails,thus eliminating
  • CMRR 100 dB concernsover exceedingthe common-mode voltage range.The rail-to-railoutputswingcapabilityprovides• Gain 100 dB withR L = 10k the maximum possibledynamic range at the output.• PSRR 82 dB Thisisparticularlyimportantwhen operatingon low supplyvoltages.The LM6132/34 can alsodrivelargeAPPLICATIONS capacitiveloadswithoutoscillating.
  • BatteryOperated Instrumentation Operatingon suppliesfrom 2.7V to over 24V, the
  • InstrumentationAmplifiers LM6132/34 is excellentfor a very wide range of applications,from batteryoperated systems with• PortableScanners large bandwidth requirements to high speed• WirelessCommunications instrumentation.
  • FlatPanel DisplayDriver Connection Diagram Figure1.8-PinSOIC/PDIP (Top View) Figure2. 14-PinSOIC/PDIP (Top View) See Package Number D and P See Package Number D and NFF0014A These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2000–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com AbsoluteMaximum Ratings(1)(2) ESD Tolerance(3) 2500V DifferentialInputVoltage 15V VoltageatInput/OutputPin (V+)+0.3V,(V−)−0.3V SupplyVoltage(V+–V−) 35V CurrentatInputPin ±10 mA CurrentatOutputPin(4) ±25 mA CurrentatPower SupplyPin 50 mA Lead Temp. (soldering,10 sec.) 260°C StorageTemperatureRange −65°C to+150°C JunctionTemperature(5) 150°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotguaranteed.Forguaranteedspecificationsand thetest conditions,see theElectricalcharacteristics. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Human body model,1.5kΩ inserieswith100 pF. (4) Appliestobothsingle-supplyand split-supplyoperation.Continuousshortcircuitoperationatelevatedambienttemperaturecan resultin exceedingthemaximum allowedjunctiontemperatureof150°C. (5) The maximum power dissipationisa functionofTJ(MAX),θJA,and TA.The maximum allowablepower dissipationatany ambient temperatureisPD = (TJ(MAX) − TA)/θJA.Allnumbers applyforpackagessoldereddirectlyintoa PC board. OperatingRatings(1) SupplyVoltage 1.8V≤ V+ ≤ 24V JunctionTemperatureRange LM6132, LM6134 −40°C ≤ TJ ≤ +85°C Thermalresistance(θJA) P Package,8-pinPDIP 115°C/W D Package,8-pinSOIC 193°C/W D Package,14-pinSOIC 126°C/W (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobe functional,butspecificperformanceisnotguaranteed.Forguaranteedspecificationsand thetest conditions,see theElectricalcharacteristics.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 5.0VDC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 5.0V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω toV+/2. Boldfacelimitsapplyatthetemperatureextremes LM6134AI LM6134BI Typ LM6132AI LM6132BISymbol Parameter Conditions Units(1) Limit Limit (2) (2) VOS InputOffsetVoltage 0.25 2 6 mV 4 8 max TCV OS InputOffsetVoltageAverageDrift 5 μV/C IB InputBiasCurrent 0V ≤ VCM ≤ 5V 110 140 180 nA 300 350 max IOS InputOffsetCurrent 3.4 30 30 nA 50 50 max R IN InputResistance,CM 104 M Ω CMRR Common Mode RejectionRatio 0V ≤ VCM ≤ 4V 100 75 75 70 70 dB min0V ≤ VCM ≤ 5V 80 60 60 55 55 PSRR Power SupplyRejectionRatio ±2.5V≤ V+ ≤ ±12V 82 78 78 dB 75 75 min VCM −0.25 0 0InputCommon-Mode VoltageRange V5.25 5.0 5.0 AV LargeSignalVoltageGain R L = 10k 100 25 15 V/mV 8 6 min VO OutputSwing 100k Load 4.992 4.98 4.98 V 4.93 4.93 min 0.007 0.017 0.017 V 0.019 0.019 max 10k Load 4.952 4.94 4.94 V 4.85 4.85 min 0.032 0.07 0.07 V 0.09 0.09 max 5k Load 4.923 4.90 4.90 V 4.85 4.85 min 0.051 0.095 0.095 V 0.12 0.12 max ISC OutputShortCircuitCurrent Sourcing 4 2 2 mA LM6132 2 1 min Sinking 3.5 1.8 1.8 mA 1.8 1 min ISC OutputShortCircuitCurrent Sourcing 3 2 2 mA LM6134 1.6 1 min Sinking 3.5 1.8 1.8 mA 1.3 1 min IS SupplyCurrent Per Amplifier 400 400 μA360 450 450 max (1) TypicalValuesrepresentthemost likelyparametricnormal. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM6132

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com 5.0VAC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 5.0V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω toV+/2. Boldfacelimitsapplyatthetemperatureextremes LM6134AI LM6134BI Typ LM6132AI LM6132BISymbol Parameter Conditions Units(1) Limit Limit (2) (2) SR Slew Rate ±4V @ VS = ±6V 8 8 V/μs14R S < 1 kΩ 7 7 min GBW Gain-BandwidthProduct f= 20 kHz 7.4 7.4 MHz10 7 7 min θm Phase Margin R L = 10k 33 deg G m Gain Margin R L = 10k 10 dB en InputReferredVoltageNoise f= 1 kHz 27 nV/√Hz in InputReferredCurrentNoise f= 1 kHz 0.18 pA/√Hz (1) TypicalValuesrepresentthemost likelyparametricnormal. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. 2.7VDC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 2.7V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω toV+/2. Boldfacelimitsapplyatthetemperatureextreme LM6134AI LM6134BI Typ LM6132AI LM6132BISymbol Parameter Conditions Units(1) Limit Limit (2) (2) VOS InputOffsetVoltage 0.12 2 6 mV 8 12 max IB InputBiasCurrent 0V ≤ VCM ≤ 2.7V 90 nA IOS InputOffsetCurrent 2.8 nA R IN InputResistance 134 M Ω CMRR Common Mode RejectionRatio 0V ≤ VCM ≤ 2.7V 82 dB PSRR Power SupplyRejectionRatio ±1.35V≤ V+ ≤ ±12V 80 dB VCM InputCommon-Mode VoltageRange 2.7 2.7 V 0 0 AV LargeSignalVoltageGain R L = 10k 100 V/mV IS SupplyCurrent Per Amplifier 330 μA (1) TypicalValuesrepresentthemost likelyparametricnormal. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. 2.7VAC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 2.7V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω toV+/2. LM6134AI LM6134BI Typ LM6132AI LM6132BISymbol Parameter Conditions Units(1) Limit Limit (2) (2) GBW Gain-BandwidthProduct R L = 10k,f= 20 kHz 7 MHz θm Phase Margin R L = 10k 23 deg G m Gain Margin 12 dB (1) TypicalValuesrepresentthemost likelyparametricnormal. (2) Alllimitsareguaranteedby testingorstatisticalanalysis.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 24V DC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 24V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω toV+/2. Boldfacelimitsapplyatthetemperatureextreme LM6134AI LM6134BI Typ LM6132AI LM6132BISymbol Parameter Conditions Units(1) Limit Limit (2) (2) VOS InputOffsetVoltage 1.7 3 7 mV 5 9 max IB InputBiasCurrent 0V ≤ VCM ≤ 24V 125 nA IOS InputOffsetCurrent 4.8 nA R IN InputResistance 210 M Ω CMRR Common Mode RejectionRatio 0V ≤ VCM ≤ 24V 80 dB PSRR Power SupplyRejectionRatio 2.7V≤ V+ ≤ 24V 82 dB VCM InputCommon-Mode VoltageRange −0.25 0 0 V min 24.25 24 24 V max AV LargeSignalVoltageGain R L = 10k 102 V/mV VO OutputSwing R L = 10k V max0.075 0.15 0.15 23.86 23.8 23.8 V min IS SupplyCurrent Per Amplifier 450 450 μA390 490 490 max (1) TypicalValuesrepresentthemost likelyparametricnormal. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. 24V AC ElectricalCharacteristics Unlessotherwisespecified,alllimitsguaranteedforTJ = 25°C, V+ = 24V,V− = 0V,VCM = VO = V+/2and R L > 1 M Ω toV+/2. LM6134AI LM6134BI Typ LM6132AI LM6132BISymbol Parameter Conditions Units(1) Limit Limit (2) (2) GBW Gain-BandwidthProduct R L = 10k,f= 20 kHz 11 MHz θm Phase Margin R L = 10k 23 deg G m Gain Margin R L = 10k 12 dB THD + N TotalHarmonicDistortionand Noise AV = +1,VO = 20VP-P 0.0015 %f= 10 kHz (1) TypicalValuesrepresentthemost likelyparametricnormal. (2) Alllimitsareguaranteedby testingorstatisticalanalysis. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM6132

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com TypicalPerformance Characteristics TA = 25°C, R L = 10 kΩ unlessotherwisespecified Supply Current OffsetVoltage vs. vs. Supply Voltage Supply Voltage Figure3. Figure4. dV OS dV OS vs. vs. VCM VCM Figure5. Figure6. dV OS IBIAS vs. vs. VCM VCM Figure7. Figure8.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 TypicalPerformance Characteristics(continued) TA = 25°C, R L = 10 kΩ unlessotherwisespecified IBIAS IBIAS vs. vs. VCM VCM Figure9. Figure10. InputBias Current NegativePSRR vs. vs. Supply Voltage Frequency Figure11. Figure12. PositivePSSR dV OS vs. vs. Frequency Output Voltage Figure13. Figure14. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM6132

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com TypicalPerformance Characteristics(continued) TA = 25°C, R L = 10 kΩ unlessotherwisespecified dV OS dV OS vs. vs. Output Voltage Output Voltage Figure15. Figure16. CMRR Output Voltage vs. vs. Frequency SinkingCurrent Figure17. Figure18. Output Voltage Output Voltage vs. vs. SinkingCurrent SinkingCurrent Figure19. Figure20.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 TypicalPerformance Characteristics(continued) TA = 25°C, R L = 10 kΩ unlessotherwisespecified Output Voltage Output Voltage vs. vs. Sourcing Current Sourcing Current Figure21. Figure22. Output Voltage Noise Voltage vs. vs. Sourcing Current Frequency Figure23. Figure24. Noise Current NF vs. vs. Frequency Source Resistance Figure25. Figure26. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM6132

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com TypicalPerformance Characteristics(continued) TA = 25°C, R L = 10 kΩ unlessotherwisespecified Gain and Phase Gain and Phase vs. vs. Frequency Frequency Figure27. Figure28. Gain and Phase GBW vs. vs. Frequency Supply Voltageat20 kHz Figure29. Figure30.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 LM6132/34 APPLICATION INFORMATION The LM6132 bringsa new levelofease ofuse toop amp systemdesign. With greaterthan rail-to-railinputvoltagerange concernover exceedingthe common-mode voltagerange is eliminated. Rail-to-railoutputswing providesthe maximum possibledynamic range at the output.This is particularly importantwhen operatingon lowsupplyvoltages. The highgain-bandwidthwithlow supplycurrentopens new batterypowered applications,where highpower consumption,previouslyreducedbatterylifetounacceptablelevels. To takeadvantageofthesefeatures,some ideasshouldbe keptinmind. ENHANCED SLEW RATE Unlikemost bipolarop amps, theuniquephase reversalprevention/speed-upcircuitintheinputstageeliminates phase reversaland allowstheslewratetobe verymuch a functionoftheinputsignalamplitude. Figure32 shows how excess inputsignalisroutedaround the inputcollector-basejunctionsdirectlyto the currentmirrors. The LM6132/34 inputstageconvertstheinputvoltagechange toa currentchange.Thiscurrentchange drives thecurrentmirrorsthroughthecollectorsofQ1 –Q2, Q3 –Q4 when theinputlevelsarenormal. Iftheinputsignalexceeds theslewrateoftheinputstageand thedifferentialinputvoltagerisesabove a diode drop,theexcess signalbypasses thenormalinputtransistors,(Q1–Q4),and isroutedincorrectphase through thetwo additionaltransistors,(Q5,Q6),directlyintothecurrentmirrors. Thisreroutingofexcesssignalallowstheslew-ratetoincreaseby a factorof10 to1 ormore.(See Figure31). As theoverdriveincreases,theop amp reactsbetterthana conventionalop amp. Largefastpulseswillraisethe slew-ratetoaround25V to30 V/μs. Slew Rate vs.DifferentialVIN VS = ±12V Figure31. Thiseffectismost noticeableathighersupplyvoltagesand lowergainswhere incomingsignalsarelikelytobe large. Thisspeed-upactionadds stabilitytothesystemwhen drivinglargecapacitiveloads. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM6132

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com DRIVING CAPACITIVE LOADS Capacitiveloadsdecreasethe phase margin of allop amps. Thisiscaused by the outputresistanceof the amplifierand theloadcapacitanceformingan R-C phase lagnetwork.Thiscan leadtoovershoot,ringingand oscillation.Slew ratelimitingcan alsocause additionallag.Most op amps witha fixedmaximum slew-ratewilllag furtherand furtherbehindwhen drivingcapacitiveloadseven thoughthedifferentialinputvoltageraises.Withthe LM6132, the lagcauses the slew rateto raise.The increasedslew-ratekeeps the outputfollowingthe input much better.Thiseffectivelyreducesphase lag.Afterthe outputhas caughtup withthe input,the differential inputvoltagedropsdown and theamplifiersettlesrapidly. Figure32. These featuresallowtheLM6132 todrivecapacitiveloadsas largeas 500 pF atunitygainand notoscillate.The scope photos(Figure33 and Figure34)above show theLM6132 drivinga 500 pF load.InFigure33 ,thelower traceiswithno capacitiveloadand the upper traceiswitha 500 pF load.Here we are operatingon ±12V supplieswitha 20 VPP pulse.Excellentresponseisobtainedwitha C f of39 pF.InFigure34,thesupplieshave been reducedto±2.5V,thepulseis4 VPP and C F is39 pF.The bestvalueforthecompensationcapacitorshould be establishedafterthe board layoutisfinishedbecause the valueisdependent on board straycapacity,the valueofthefeedbackresistor,theclosedloopgainand,tosome extent,thesupplyvoltage. Anothereffectthatiscommon toallop amps isthephase shiftcaused by thefeedbackresistorand theinput capacitance.Thisphase shiftalsoreducesphase margin.Thiseffectistakencareofatthesame timeas the effectofthecapacitiveloadwhen thecapacitorisplacedacrossthefeedbackresistor. The circuitshown inFigure35 was used forthesescope photos. Figure33.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 Figure34. Figure35. Figure36 shows a method forcompensatingforload capacitance(CO ) effectsby adding both an isolation resistorR O at the outputand a feedbackcapacitorC Fdirectlybetween the outputand the invertinginputpin. Feedback capacitorC F compensates forthe poleintroducedby R O and C O , minimizingringinginthe output waveform whilethefeedbackresistorR F compensates fordc inaccuraciesintroducedby R O .Depending on the sizeoftheloadcapacitance,thevalueofR O istypicallychosen tobe between 100Ω to1 kΩ. Figure36. Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM6132

SNOS751D –APRIL 2000–REVISED FEBRUARY 2013 www.ti.com TypicalApplications

3 OP AMP INSTRUMENTATION AMP WITH RAIL-TO-RAIL INPUT AND OUTPUT

UsingtheLM6134, a 3 op amp instrumentationamplifierwithrail-to-railinputsand railtorailoutputcan be made. These featuresmake theseinstrumentationamplifiersidealforsinglesupplysystems. Some manufacturersuse a precisionvoltagedividerarrayof5 resistorstodividethecommon-mode voltageto getan inputrange ofrail-to-railor greater.The problemwiththismethod isthatitalsodividesthesignal,so to even getunitygain,theamplifiermust be run athighclosedloopgains.Thisraisesthenoiseand driftby the internalgainfactorand lowerstheinputimpedance.Any mismatch intheseprecisionresistorsreducestheCMR as well.UsingtheLM6134, alloftheseproblemsareeliminated. Inthisexample,amplifiersA and B actas bufferstothedifferentialstage(Figure37).These buffersassurethat theinputimpedance isover100 M Ω and theyeliminatetherequirementforprecisionmatched resistorsinthe inputstage.They alsoassurethatthe differenceamp isdrivenfrom a voltagesource.Thisisnecessaryto maintaintheCMR setby thematchingofR1 –R2 withR3 –R4. Figure37. FLAT PANEL DISPLAY BUFFERING Three featuresoftheLM6132/34 make ita superbchoiceforTFT LCD applications.First,itslow currentdraw (360 μA per amplifier@ 5V) makes itan idealchoiceforbatterypowered applicationssuch as in laptop computers.Second, sincethedeviceoperatesdown to2.7V,itisa naturalchoicefornextgeneration3V TFT panels.Last,butnotleast,thelargecapacitivedrivecapabilityoftheLM6132 comes inveryhandy indriving highlycapacitiveloadsthatarecharacteristicofLCD displaydrivers. The largecapacitivedrivecapabilityoftheLM6132/34 allowsittobe used as buffersforthegamma correction referencevoltageinputsofresistor-DACtypecolumn (Source)driversinTFT LCD panels.Thisamplifierisalso usefulforbufferingonlythecenterreferencevoltageinputofCapacitor-DACtypecolumn (Source)driverssuch as theLMC750X series. SinceforVGA and SVGA displays,thebufferedvoltagesmust settlewithinapproximately4 μs,thewellknown techniqueof usinga smallisolationresistorinserieswiththe amplifier'soutputveryeffectivelydampens the ringingattheoutput. With itswide supplyvoltagerange of 2.7V to 24V), the LM6132/34 can be used fora diverserange of applications.The system designeristhusabletochoose a singledevicetypethatservesmany sub-circuitsin thesystem,eliminatingtheneed tospecifymultipledevicesinthebillofmaterials.Alongwithitssisterparts,the LM6142 and LM6152 thathave the same wide supplyvoltagecapability,choiceof the LM6132 in a design eliminatestheneed tosearchformultiplesourcesfornew designs.

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www.ti.com SNOS751D –APRIL 2000–REVISED FEBRUARY 2013

REVISION HISTORY

Changes from RevisionC (February2013)toRevisionD Page Copyright© 2000–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM6132

www.ti.com 27-Mar-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM6132AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM61 32AIM LM6132AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM61 32AIM LM6132AIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM61 32AIM LM6132AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM61 32AIM LM6132BIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM61 32BIM LM6132BIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM61 32BIM LM6132BIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM61 32BIM LM6132BIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM61 32BIM LM6132BIN LIFEBUY PDIP P 8 40 TBD Call TI Call TI -40 to 85 LM6132 BIN LM6132BIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 85 LM6132 BIN LM6134AIM NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LM6134AIM LM6134AIM/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM6134AIM LM6134AIMX NRND SOIC D 14 2500 TBD Call TI Call TI -40 to 85 LM6134AIM LM6134AIMX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM6134AIM LM6134BIM NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LM6134BIM LM6134BIM/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM6134BIM LM6134BIMX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM6134BIM LM6134BIN LIFEBUY PDIP NFF 14 25 TBD Call TI Call TI -40 to 85 LM6134BIN LM6134BIN/NOPB ACTIVE PDIP NFF 14 25 Green (RoHS & no Sb/Br) SN Level-1-NA-UNLIM -40 to 85 LM6134BIN

www.ti.com 27-Mar-2014 Addendum-Page 2 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM6132AIMX SOIC D 8 2500 367.0 367.0 35.0 LM6132AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM6132BIMX SOIC D 8 2500 367.0 367.0 35.0 LM6132BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM6134AIMX SOIC D 14 2500 367.0 367.0 35.0 LM6134AIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LM6134BIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Pack Materials-Page 2

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