LM60430AQRPKRQ1

Texas Instruments

LM604x0-Q1 3.8-V to 36-V, 3-A, and 4-A Ultra-Small Synchronous Step-Down Converter

Manufacturer: Texas Instruments

Document: 39 Pages / 1Mb

Request Quote Download Datasheet Read online HTML view

More from Texas Instruments Browse L parts

Online Datasheet

Read LM60430AQRPKRQ1 online.

LM60440-Q1_V02 TI1 | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 39

Technical content

Output Current (A) Efficiency (%) 100 Eff_ 12V 24V VIN VIN EN BOOT SW FB AGND VOUT CBOOT L1CIN COUT RFBT RFBB VCC PG PGND CVCC Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 LM604x0-Q13.8-Vto36-V,3-A,and4-AUltra-SmallSynchronousStep-DownConverter

1 Features

1• AEC-Q100 qualified for automotive applications: – Temperature grade 1: –40°C to +125°C, TA

Functional Safety-Capable – Documentation available to aid functional safety system design
Low EMI and switching noise – Meets CISPR25 class 5 standard – Enhanced QFN package minimizes parasitic inductance and switch node ringing
Configured for automotive applications – Standard QFN footprint: single large thermal pad and all pins accessible from perimeter – Pin compatible variants: – LM60440-Q1 (36 V, 4 A) – LM60430-Q1 (36 V, 3 A) – Junction temperature range –40°C to +150°C – ±1.5% total output regulation accuracy – Frequency: 400 kHz – Output voltage range: 1 V to 24 V
High efficiency power conversion at all loads – Peak efficiency > 95% – 90% PFM efficiency at 10-mA, 12 VIN, 5 VOUT – Low operating quiescent current of 25 µA
Create a custom design using the LM60440-Q1 with the WEBENCH® Power Designer

2 Applications

Infotainment and cluster: USB charge
Automotive body electronics and lighting

3 Description

The LM604x0-Q1 automotive-qualified regulator is an easy-to-use, synchronous, step-down DC/DC converter that delivers best-in-class efficiency for automotive applications. The LM60430-Q1 drives up to 3-A of load current, and the LM60440-Q1 is industry's smallest 4A step-down converter. The LM604x0-Q1 is available in an ultra-miniature WQFN package with wettable flanks and a standard QFN pin-out with a thermal pad to enhance thermal performance. This enhanced QFN package features extremely small parasitic inductance and resistance, enabling very high efficiency while minimizing switch node ringing and dramatically reducing EMI. The LM604x0-Q1 uses peak-current-mode control to automatically fold back frequency at light load to ensure exceptional efficiency across the entire load range. The low power dissipation paired with a thermally optimized QFN package enables a power dense solution size. In addition the device requires few external components and has a pinout designed for simple PCB layout. The small solution size and feature set of the LM604x0-Q1 are designed to simplify implementation for a wide range of end equipment. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LM60440-Q1 WQFN-13 3.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. space space Simplified Schematic Efficiency versus Output Current VOUT = 5 V, 400 kHz

12.4 Receiving Notification of Documentation Updates 30

13 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (February 2020) to Revision A Page

5 Device Comparison Table

DEVICE OPTION PACKAGE FREQUENCY RATED CURRENT OUTPUT VOLTAGE LM60440AQRPKRQ1 RPK (WQFN-13) 400 kHz 4 A Adjustable LM60430AQRPKRQ1 RPK (WQFN-13) 400 kHz 3 A Adjustable

6 Pin Configuration and Functions

WQFN-13 With PowerPAD™ Top View Pin Functions PIN TYPE DESCRIPTION NO. NAME 1, 11 PGND G Power ground terminal. Connect to system ground and AGND. Connect to a bypass capacitor with short wide traces. 2, 10 VIN P Input supply to regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin and PGND. 3, 12 SW P Regulator switch node. Connect to power inductor. Pin 3 can be used to simplify the connection from the CBOOT capacitor to the SW pin.

4 BOOT P

Bootstrap supply voltage for internal high-side driver. Connect a high-quality 100-nF capacitor from this pin to the SW pin. On the WQFN package, connect the SW pin to NC on the PCB. This simplifies the connection from the CBOOT capacitor to the SW pin. 5 VCC P Internal 5-V LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high quality 1-µF capacitor from this pin to GND. 6 AGND G Analog ground for regulator and system. Ground reference for internal references and logic. All electrical parameters are measured with respect to this pin. Connect to system ground on PCB. 7 FB A Feedback input to regulator. Connect to tap point of feedback voltage divider. Do not float. Do not ground. 8 PG A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. Flag pulls low when EN = Low. Can be left open when not used. 9 EN A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN; Do not float. 13 DAP — Low impedance connection to PGND. Connect to system ground on PCB. Major heat dissipation path for the die. Must be used for heat sinking by soldering to ground copper on PCB. Thermal vias are preferred. A = Analog, P = Power, G = Ground

LM60440-Q1, LM60430-Q1 www.ti.com SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation FeedbackCopyright © 2020, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The voltage on this pin must not exceed the voltage on the VIN pin by more than 0.3 V (3) Under some operating conditions the VCC LDO voltage may increase beyond 5.5 V.

7 Specifications

7.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range(1) PARAMETER MIN MAX UNIT Voltages VIN to PGND –0.3 38 V EN to AGND(2) –0.3 VIN + 0.3 FB to AGND –0.3 5.5 PG to AGND(2) 0 22 AGND to PGND –0.3 0.3 SW to PGND –0.3 VIN + 0.3 V SW to PGND less than 100-ns transients –3.5 38 BOOT to SW –0.3 5.5 VCC to AGND(3) –0.3 5.5 TJ Junction temperature –40 150 °C Tstg Storage temperature –55 150 °C (1) AEC Q100-002 indicates HBM stressing shall be in accordance with ANSI/ESDA/JEDEC JS-001 specification.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002 (1) HBM ESD Classification Level 2 ±2500 V Charged-device model (CBM), per AEC Q100-011 CDM ESD Classification Level C5 ±750 V (1) Recommended operating conditions indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical Characteristics. (2) The voltage on this pin must not exceed the voltage on the VIN pin by more than 0.3 V. (3) The maximum output voltage can be extended to 95% of VIN; contact TI for details. Under no conditions should the output voltage be allowed to fall below zero volts.

7.3 Recommended Operating Conditions

Over the recommended operating temperature range of –40°C to 150°C (unless otherwise noted) (1) MIN MAX UNIT Input voltage VIN to PGND 3.8 36 VEN (2) 0 VIN PG(2) 0 18 Adjustable output voltage VOUT (3) 1 24 V Output current LM60430-Q1 IOUT 0 3 A Output current LM60440-Q1 IOUT 0 4 A

LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 www.ti.com Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) The value of RθJA given in this table is only valid for comparison with other packages and can not be used for design purposes. These values were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance obtained in an actual application.

7.4 Thermal Information

The value of RθJA given in this table is only valid for comparison with other packages and can not be used for design purposes. These values were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance obtained in an actual application. THERMAL METRIC(1)(2) LM60440-Q1/LM60430-Q1 UNITWQFN

13 PINS

RθJA Junction-to-ambient thermal resistance 54(2) °C/W RθJC(top) Junction-to-case (top) thermal resistance 37.8 °C/W RθJB Junction-to-board thermal resistance 15.3 °C/W ψJT Junction-to-top characterization parameter 0.8 °C/W ψJB Junction-to-board characterization parameter 15.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 24.2 °C/W (1) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation. (2) When the voltage across the CBOOT capacitor falls below this voltage, the low side MOSFET is turned on to recharge CBOOT. (3) The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application.

7.5 Electrical Characteristics

Limits apply over the operating junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 12 V, VEN = 4 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VOLTAGE VIN Minimum operating input voltage 3.8 V IQ Non-switching input current; measured at VIN pin (1) VFB = 1.2 V 24 34 µA ISD Shutdown quiescent current; measured at VIN pin EN = 0 5 10 µA ENABLE VEN-VCC-H EN input level required to turn on internal LDO Rising threshold 1 V VEN-VCC-L EN input level required to turn off internal LDO Falling threshold 0.3 V VEN-H EN input level required to start switching Rising threshold 1.2 1.231 1.26 V VEN-HYS Hysteresis below VEN-H Hysteresis below VEN-H; falling 100 mV ILKG-EN Enable input leakage current VEN = 3.3 V 0.2 nA INTERNAL SUPPLIES VCC Internal LDO output voltage appearing at the VCC pin 6 V ≤ VIN ≤ 36 V 4.75 5 5.25 V VBOOT-UVLO Bootstrap voltage undervoltage lock-out threshold(2) 2.2 V VOLTAGE REFERENCE (FB PIN) VFB Feedback voltage 0.985 1 1.015 V IFB Current into FB pin FB = 1 V 0.2 50 nA CURRENT LIMITS(3) ISC High-side current limit LM60440-Q1 4.7 5.5 6 A ISC High-side current limit LM60430-Q1 3.85 4.5 5.05 A ILIMIT Low-side current limit LM60440-Q1 4 4.5 4.9 A ILIMIT Low-side current limit LM60430-Q1 2.9 3.5 4.1 A

LM60440-Q1, LM60430-Q1 www.ti.com SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation FeedbackCopyright © 2020, Texas Instruments Incorporated Electrical Characteristics (continued) Limits apply over the operating junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 12 V, VEN = 4 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (4) See Power-Good Flag Output for details. IPEAK-MIN Minimum peak inductor current LM60440-Q1 0.86 A IPEAK-MIN Minimum peak inductor current LM60430-Q1 0.69 A IZC Zero current detector threshold -0.106 A SOFT START tSS Internal soft-start time 2.9 4.4 6 ms POWER GOOD (PG PIN) VPG-HIGH-UP Power-good upper threshold - rising % of FB voltage 105% 107% 110% VPG-HIGH-DN Power-good upper threshold - falling % of FB voltage 103% 105% 108% VPG-LOW-UP Power-good lower threshold - rising % of FB voltage 92% 94% 97% VPG-LOW-DN Power-good lower threshold - falling % of FB voltage 90% 92% 95% tPG Power-good glitch filter delay(4) 60 170 µs RPG Power-good flag RDSON VIN = 12 V, VEN = 4 V 76 150 Ω VEN = 0 V 35 60 VIN-PG Minimum input voltage for proper PG function 50-µA, EN = 0 V 2 V VPG PG logic low output 50-µA, EN = 0 V, VIN = 2V 0.2 V OSCILLATOR ƒSW Switching frequency 340 400 460 kHz MOSFETS RDS-ON-HS High-side MOSFET ON- resistance 76 146 mΩ RDS-ON-LS Low-side MOSFET ON- resistance 51 96 mΩ

7.6 Timing Characteristics

LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 www.ti.com Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated (1) Deviation is with respect to VIN =12 V, IOUT = 1 A. (2) In dropout the switching frequency drops to increase the effective duty cycle. The lowest frequency is clamped at approximately: ƒMIN = 1 / (tON-MAX + tOFF-MIN). DMAX = tON-MAX /(tON-MAX + tOFF-MIN).

7.7 System Characteristics

The following specifications apply to a typical applications circuit, with nominal component values. Specifications in the typical (TYP) column apply to TJ = 25°C only. Specifications in the minimum (MIN) and maximum (MAX) columns apply to the case of typical components over the temperature range of TJ = –40°C to 150°C. These specifications are not ensured by production testing. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Operating input voltage range VOUT = 3.3 V, IOUT= 0 A 3.8 36 V VOUT Output voltage regulation for VOUT = 5 V(1) VOUT = 5 V, VIN = 7 V to 36 V, IOUT = 0 A to 4 A –1.6% 2.5% VOUT = 5 V, VIN = 7 V to 36 V, IOUT = 1 A to 4 A –1.6% 1.5% Output voltage regulation for VOUT = 3.3 V(1) VOUT = 3.3 V, VIN = 3.8 V to 36 V, IOUT = 0 A to 4 A –1.6% 2.5% VOUT = 3.3 V, VIN = 3.8 V to 36 V, IOUT = 1 A to 4 A –1.6% 1.5% ISUPPLY Input supply current when in regulation VIN = 12 V, VOUT = 3.3 V, IOUT = 0 A, RFBT = 1 MΩ 25 µA VDROP Dropout voltage; (VIN – VOUT) VOUT = 5 V, IOUT = 1A Dropout at –1% of regulation, ƒSW = 140 kHz 150 mV DMAX Maximum switch duty cycle(2) VIN = VOUT = 12 V, IOUT = 1 A 98% VHC FB pin voltage required to trip short-circuit hiccup mode 0.4 V tHC Time between current-limit hiccup burst 94 ms tD Switch voltage dead time 2 ns TSD Thermal shutdown temperature Shutdown temperature 165 °C Recovery temperature 148 °C

7.8 Typical Characteristics

Figure 1. Non-Switching Input Supply Current Figure 2. Shutdown Supply Current Figure 3. Short-Circuit Output Current Figure 4. Precision Enable Thresholds Figure 5. UVLO Thresholds Figure 6. IPEAK-MIN

COMP. ERROR AMPLIFIER POWER GOOD CONTROL SW VIN PGND FB EN INT. REG. BIAS VCC BOOT AGND 1.0V Reference ENABLE LOGIC PG PFM MODE CONTROL LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 www.ti.com Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated

8 Detailed Description

8.1 Overview

The LM604x0-Q1 is a synchronous peak-current-mode buck regulator designed for a wide variety of applications. Advanced high speed circuitry allows the device to regulate from an input voltage of 20 V, while providing an output voltage of 3.3 V. The innovative architecture allows the device to regulate a 3.3-V output from an input of only 3.8 V. The regulator automatically switches modes between PFM and PWM depending on load. At heavy loads, the device operates in PWM at a constant switching frequency. At light loads, the mode changes to PFM with diode emulation allowing DCM. This reduces the input supply current and keeps efficiency high. The device features internal loop compensation which reduces design time and requires fewer external components than externally compensated regulators. The LM604x0-Q1 is available in an ultra-miniature WQFN package with wettable flanks. This enhanced QFN package features extremely small parasitic inductance and resistance, enabling very high efficiency while minimizing switch node ringing and dramatically reducing EMI. The VIN/PGND pin layout is symmetrical on either side of the WQFN package. This allows the input current magnetic fields to partially cancel, resulting in reduce EMI generation.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Power-Good Flag Output

trip the power-good flag. Power-good operation can best be understood by reference to Figure 7 and Figure 8. normal operation of the power-good function. transient currents that can occur when discharging a filter capacitor connected to this output. Figure 7. Static Power-Good Operation

Figure 8. Power-Good-Timing Behavior

8.3.2 Enable and Start-up

Electrical Characteristics table. timings. The rise time of the output voltage is about 4 ms (see the Electrical Characteristics).

Figure 9. Precision Enable Behavior Figure 10. Typical Start-up Behavior

8.3.3 Current Limit and Short Circuit

Figure 11. LM60440-Q1 Inductor Current Burst in Short- Figure 12. LM60440-Q1 Short-Circuit Transient and

8.3.4 Undervoltage Lockout and Thermal Shutdown

transitions, the above values roughly represent the input voltage levels during the transitions.

8.4 Device Functional Modes

8.4.1 Auto Mode

transition between PFM and PWM must be carefully tested before the design is finalized. and load. Typical switching waveforms in PFM and PWM are shown in Figure 13 and Figure 14. See the Application Curves for output voltage variation with load in auto mode. Figure 13. LM60430-Q1 Typical PFM Switching Waveforms Figure 14. LM60430-Q1 Typical PWM Switching

8.4.2 Dropout

short circuit detection threshold is not activated when in dropout mode.

VV d LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 www.ti.com Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Device Functional Modes (continued)

8.4.3 Minimum Switch On-Time

Every switching regulator has a minimum controllable on-time dictated by the inherent delays and blanking times associated with the control circuits. This imposes a minimum switch duty cycle and, therefore, a minimum conversion ratio. The constraint is encountered at high input voltages and low output voltages. To help extend the minimum controllable duty cycle, the LM604x0-Q1 automatically reduces the switching frequency when the minimum on-time limit is reached. This way the converter can regulate the lowest programmable output voltage at the maximum input voltage. An estimate for the approximate input voltage, for a given output voltage, before frequency foldback occurs is found in Equation 2. The values of tON and fSW can be found in the Electrical Characteristics table. As the input voltage is increased, the switch on-time (duty-cycle) reduces to regulate the output voltage. When the on-time reaches the limit, the switching frequency drops, while the on-time remains fixed. (2)

6 V to 36 V

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

allows the tool to create an optimized design and allows the user to experiment with various options. be made in order to ensure that the minimum value of effective capacitance is provided.

9.2 Typical Application

Capacitor Selection section for more details. Figure 15. Example Application Circuit (400 kHz)

9.2.1 Design Requirements

Table 1. Detailed Design Parameters Table 2. LM60440-Q1 Typical External Component Values Table 3. LM60430-Q1 Typical External Component Values

9.2.2 Detailed Design Procedure

The following design procedure applies to Figure 15 and Table 1.

9.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM60440-Q1 device with the WEBENCH® Power Designer.

Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
Compare the generated design with other possible solutions from Texas Instruments.

pricing and component availability.

Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.

9.2.2.2 Choosing the Switching Frequency

The choice of switching frequency is a compromise between conversion efficiency and overall solution size. Lower switching frequency implies reduced switching losses and usually results in higher system efficiency. more compact design. For this example, the LM604x0-Q1 fixed 400-kHz switching frequency was chosen.

V V I Kf VVL º ª V RR REF OUT FBT FBB LM60440-Q1, LM60430-Q1 www.ti.com SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation FeedbackCopyright © 2020, Texas Instruments Incorporated

9.2.2.3 Setting the Output Voltage

The output voltage of the LM604x0-Q1 is externally adjustable using a resistor divider network. The range of recommended output voltage is found in the Recommended Operating Conditions table. The divider network is comprised of RFBT and RFBB, and closes the loop between the output voltage and the converter. The converter regulates the output voltage by holding the voltage on the FB pin equal to the internal reference voltage, VREF. The resistance of the divider is a compromise between excessive noise pick-up and excessive loading of the output. Smaller values of resistance reduce noise sensitivity but also reduce the light-load efficiency. The recommended value for RFBT is 100 kΩ; with a maximum value of 1 MΩ. If a 1 MΩ is selected for RFBT, then a feedforward capacitor must be used across this resistor to provide adequate loop phase margin (see the CFF Selection section). Once RFBT is selected, Equation 3 is used to select RFBB. VREF is nominally 1 V (see the Electrical Characteristics for limits). (3) For this 5-V example, RFBT = 100 kΩ and RFBB = 24.9 kΩ are chosen.

9.2.2.4 Inductor Selection

The parameters for selecting the inductor are the inductance and saturation current. The inductance is based on the desired peak-to-peak ripple current and is normally chosen to be in the range of 20% to 40% of the maximum output current. Experience shows that the best value for inductor ripple current is 30% of the maximum load current. Note that when selecting the ripple current for applications with much smaller maximum load than the maximum available from the device, the maximum device current should be used. Equation 4 can be used to determine the value of inductance. The constant K is the percentage of inductor current ripple. For this example, K = 0.3 was chosen and an inductance was found; the next standard value of 6.8 µH was selected. (4) Ideally, the saturation current rating of the inductor must be at least as large as the high-side switch current limit, ISC (see the Electrical Characteristics). This ensures that the inductor does not saturate even during a short circuit on the output. When the inductor core material saturates, the inductance falls to a very low value, causing the inductor current to rise very rapidly. Although the valley current limit, ILIMIT, is designed to reduce the risk of current run-away, a saturated inductor can cause the current to rise to high values very rapidly. This can lead to component damage; do not allow the inductor to saturate. Inductors with a ferrite core material have very hard saturation characteristics, but usually have lower core losses than powdered iron cores. Powered iron cores exhibit a soft saturation, allowing for some relaxation in the current rating of the inductor. However, they have more core losses at frequencies typically above 1 MHz. In any case, the inductor saturation current must not be less than the device low-side current limit, ILIMIT (see the Electrical Characteristics). The maximum inductance is limited by the minimum current ripple required for the current mode control to perform correctly. As a rule-of- thumb, the minimum inductor ripple current must be no less than about 10% of the device maximum rated current under nominal conditions.

9.2.2.5 Output Capacitor Selection

The value of the output capacitor and the ESR of the capacitor determine the output voltage ripple and load transient performance. The output capacitor bank is usually limited by the load transient requirements, rather than the output voltage ripple. Equation 5 can be used to estimate a lower bound on the total output capacitance and an upper bound on the ESR, which is required to meet a specified load transient.

' # I N OUT OUT OUT OUTSW OUT OUT V VD ) D1 ( 1112 KK1I2 VK2ESR D212 KK1D1KVf IC º ª ' ' d º ª LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 www.ti.com Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated where

ΔVOUT = output voltage transient
ΔIOUT = output current transient
K = ripple factor from Inductor Selection (5) Once the output capacitor and ESR have been calculated, Equation 6 can be used to check the peak-to-peak output voltage ripple; Vr. (6) The output capacitor and ESR can then be adjusted to meet both the load transient and output ripple requirements. For this example, a ΔVOUT ≤ 300 mV for an output current step of ΔIOUT = 4 A is required. Equation 5 gives a minimum value of 86 µF and a maximum ESR of 0.022 Ω. Assuming a 20% tolerance and a 10% bias de-rating, you arrive at a minimum capacitance of 111 µF. This can be achieved with 2 × 47-µF and a 22-µF, 16-V ceramic capacitors in the 1210 case size. More output capacitance can be used to improve the load transient response. Ceramic capacitors can easily meet the minimum ESR requirements. In some cases, an aluminum electrolytic capacitor can be placed in parallel with the ceramics to help build up the required value of capacitance. In general, use a capacitor of at least 10 V for output voltages of 3.3 V or less and a capacitor of 16 V or more for output voltages of 5 V and above. In practice, the output capacitor has the most influence on the transient response and loop phase margin. Load transient testing and Bode plots are the best way to validate any given design and must always be completed before the application goes into production. In addition to the required output capacitance, a small ceramic placed on the output can help reduce high frequency noise. Small case size ceramic capacitors in the range of 1 nF to 100 nF can be very helpful in reducing voltage spikes on the output caused by inductor and board parasitics. The maximum value of total output capacitance must be limited to about 10 times the design value, or 1000 µF, whichever is smaller. Large values of output capacitance can adversely affect the start-up behavior of the regulator as well as the loop stability. If values larger than noted here must be used, then a careful study of start- up at full load and loop stability must be performed.

9.2.2.6 Input Capacitor Selection

The ceramic input capacitors provide a low impedance source to the regulator in addition to supplying the ripple current and isolating switching noise from other circuits. A minimum of 10 µF of ceramic capacitance is required on the input of the LM604x0-Q1. This must be rated for at least the maximum input voltage that the application requires; preferably twice the maximum input voltage. This capacitance can be increased to help reduce input voltage ripple and maintain the input voltage during load transients. In addition, a small case size, 220-nF ceramic capacitor must be used at the input, as close as possible to the regulator. This provides a high frequency bypass for the control circuits internal to the device. For this example, a 4.7-µF, 50-V, X7R (or better)

V VR120 CVC II OUT RMS # LM60440-Q1, LM60430-Q1 www.ti.com SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation FeedbackCopyright © 2020, Texas Instruments Incorporated ceramic capacitor is chosen. The 220 nF must also be rated at 50 V with an X7R dielectric. The WQFN package provides two input voltage pins and two power ground pins on opposite sides of the package. This allows the input capacitors to be split, and placed optimally with respect to the internal power MOSFETs, thus improving the effectiveness of the input bypassing. In this example, a single 4.7-µF and two 100-nF ceramic capacitors at each VIN/PGND location. Many times, it is desirable to use an electrolytic capacitor on the input in parallel with the ceramics. This is especially true if long leads/traces are used to connect the input supply to the regulator. The moderate ESR of this capacitor can help damp any ringing on the input supply caused by the long power leads. The use of this additional capacitor also helps with momentary voltage dips caused by input supplies with unusually high impedance. Most of the input switching current passes through the ceramic input capacitor or capacitors. The approximate worst case RMS value of this current can be calculated from Equation 7 and must be checked against the manufacturers' maximum ratings. (7)

9.2.2.7 CBOOT

The LM604x0-Q1 requires a bootstrap capacitor connected between the BOOT pin and the SW pin. This capacitor stores energy that is used to supply the gate drivers for the power MOSFETs. A high-quality ceramic capacitor of 100 nF and at least 10 V is required.

9.2.2.8 VCC

The VCC pin is the output of the internal LDO used to supply the control circuits of the regulator. This output requires a 1-µF, 16-V ceramic capacitor connected from VCC to GND for proper operation. In general, avoid loading this output with any external circuitry. However, this output can be used to supply the pullup for the power-good function (see the Power-Good Flag Output section). A value of 100 kΩ is a good choice in this case. The nominal output voltage on VCC is 5 V; see the Electrical Characteristics for limits. Do not short this output to ground or any other external voltage.

9.2.2.9 CFF Selection

In some cases, a feedforward capacitor can be used across RFBT to improve the load transient response or improve the loop-phase margin. This is especially true when values of RFBT > 100 kΩ are used. Large values of RFBT, in combination with the parasitic capacitance at the FB pin, can create a small signal pole that interferes with the loop stability. A CFF can help to mitigate this effect. Equation 8 can be used to estimate the value of CFF. The value found with Equation 8 is a starting point; use lower values to determine if any advantage is gained by the use of a CFF capacitor. The Optimizing Transient Response of Internally Compensated DC-DC Converters with Feed-forward Capacitor Application Report is helpful when experimenting with a feedforward capacitor. (8)

9.2.2.10 External UVLO

In some cases, an input UVLO level different than that provided internal to the device is needed. This can be accomplished by using the circuit shown in Figure 16. The input voltage at which the device turns on is designated VON while the turnoff voltage is VOFF. First, a value for RENB is chosen in the range of 10 kΩ to 100 kΩ and then Equation 9 is used to calculate RENT and VOFF.

Figure 16. Setup for External UVLO Application

VON = VIN turnon voltage
VOFF = VIN turnoff voltage (9)

9.2.2.11 Maximum Ambient Temperature

EVM can be adjusted to match the desired application requirements and the efficiency can be measured directly. that table were measured under a specific set of conditions that are rarely obtained in an actual application.

η = efficiency (10) The effective RθJA is a critical parameter and depends on many factors such as power dissipation, air temperature/flow, PCB area, copper heat-sink area, number of thermal vias under the package, and adjacent component placement, just to mention just a few. The copper area given in the graph is for each layer; the top and bottom layers are 2 oz. copper each, while the inner layers are 1 oz. It must be remembered that the data given in these graphs are for illustration purposes only, and the actual performance in any given application depends on all of the previously mentioned factors.

9.2.3 Application Curves

Figure 23, with the appropriate BOM from Table 4. Figure 17. Low-Load Efficiency Figure 18. High-Load Efficiency Figure 19. Line and Load Regulation Figure 20. Start-up Figure 21. Load Transient Figure 22. Load Transient

Figure 23. Circuit for Application Curves Table 4. BOM for Typical Application Curves

9.3 EMI

Figure 24. Low Frequency Conducted EMI Figure 25. High Frequency Conducted EMI

Figure 26. Typical Input EMI Filter

9.4 What to Do and What Not to Do

Don't: Exceed the Absolute Maximum Ratings.
Don't: Exceed the ESD Ratings.
Don't: Exceed the Recommended Operating Conditions .
Don't: Allow the EN input to float.
Don't: Allow the output voltage to exceed the input voltage, nor go below ground.
Don't: Use the value of RθJA given in the Thermal Information table to design your application. Use the information in the Maximum Ambient Temperature section.
Do: Follow all the guidelines and suggestions found in this data sheet before committing the design to production. TI application engineers are ready to help critique your design and PCB layout to help make your project a success.

K IN OUTOUT IN V IVI LM60440-Q1, LM60430-Q1 SNVSBO0A –FEBRUARY 2020–REVISED JUNE 2020 www.ti.com Product Folder Links: LM60440-Q1 LM60430-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated

10 Power Supply Recommendations

The characteristics of the input supply must be compatible with the Absolute Maximum Ratings and Recommended Operating Conditions found in this data sheet. In addition, the input supply must be capable of delivering the required input current to the loaded regulator. The average input current can be estimated with Equation 11, where η is the efficiency. (11) If the regulator is connected to the input supply through long wires or PCB traces, special care is required to achieve good performance. The parasitic inductance and resistance of the input cables can have an adverse effect on the operation of the regulator. The parasitic inductance, in combination with the low-ESR, ceramic input capacitors, can form an under damped resonant circuit, resulting in overvoltage transients at the input to the regulator. The parasitic resistance can cause the voltage at the VIN pin to dip whenever a load transient is applied to the output. If the application is operating close to the minimum input voltage, this dip can cause the regulator to momentarily shutdown and reset. The best way to solve these kind of issues is to reduce the distance from the input supply to the regulator and/or use an aluminum or tantalum input capacitor in parallel with the ceramics. The moderate ESR of these types of capacitors help damp the input resonant circuit and reduce any overshoots. A value in the range of 20 µF to 100 µF is usually sufficient to provide input damping and help to hold the input voltage steady during large load transients. Sometimes, for other system considerations, an input filter is used in front of the regulator. This can lead to instability, as well as some of the effects mentioned above, unless it is designed carefully. The user guide AN-

2162 Simple Success With Conducted EMI From DCDC Converters provides helpful suggestions when

designing an input filter for any switching regulator. In some cases, a transient voltage suppressor (TVS) is used on the input of regulators. One class of this device has a snap-back characteristic (thyristor type). The use of a device with this type of characteristic is not recommended. When the TVS fires, the clamping voltage falls to a very low value. If this voltage is less than the output voltage of the regulator, the output capacitors discharge through the device back to the input. This uncontrolled current flow can damage the device. The input voltage must not be allowed to fall below the output voltage. In this scenario, such as a shorted input test, the output capacitors discharges through the internal parasitic diode found between the VIN and SW pins of the device. During this condition, the current can become uncontrolled, possibly causing damage to the device. If this scenario is considered likely, then a Schottky diode between the input supply and the output should be used.

11 Layout

11.1 Layout Guidelines

The PCB layout of any DC/DC converter is critical to the optimal performance of the design. Bad PCB layout can disrupt the operation of an otherwise good schematic design. Even if the converter regulates correctly, bad PCB layout can mean the difference between a robust design and one that cannot be mass produced. Furthermore, the EMI performance of the regulator is dependent on the PCB layout, to a great extent. In a buck converter, the most critical PCB feature is the loop formed by the input capacitor or input capacitors, and power ground, as shown in Figure 27. This loop carries large transient currents that can cause large transient voltages when reacting with the trace inductance. These unwanted transient voltages will disrupt the proper operation of the converter. Because of this, the traces in this loop must be wide and short, and the loop area as small as possible to reduce the parasitic inductance. 1. Place the input capacitor or capacitors as close as possible to the VIN and GND terminals. VIN and GND pins are adjacent, simplifying the input capacitor placement. With the WQFN package there are two VIN/PGND pairs on either side of the package. This provides for a symmetrical layout and helps minimize switching noise and EMI generation. A wide VIN plane must be used on a lower layer to connect both of the VIN pairs together to the input supply; see Figure 28. 2. Place bypass capacitor for VCC close to the VCC pin. This capacitor must be placed close to the device and routed with short, wide traces to the VCC and GND pins. 3. Use wide traces for the CBOOT capacitor. Place CBOOT close to the device with short/wide traces to the BOOT and SW pins. 4. Place the feedback divider as close as possible to the FB pin of the device. Place RFBB, RFBT, and CFF, if used, physically close to the device. The connections to FB and GND must be short and close to those pins on the device. The connection to VOUT can be somewhat longer. However, this latter trace must not be routed near any noise source (such as the SW node) that can capacitively couple into the feedback path of the regulator. 5. Use at least one ground plane in one of the middle layers. This plane acts as a noise shield and also act as a heat dissipation path. 6. Provide wide paths for VIN, VOUT, and GND. Making these paths as wide and direct as possible reduces any voltage drops on the input or output paths of the converter and maximizes efficiency. 7. Provide enough PCB area for proper heat sinking. As stated in the Maximum Ambient Temperature section, enough copper area must be used to ensure a low RθJA, commensurate with the maximum load current and ambient temperature. Make the top and bottom PCB layers with two-ounce copper; and no less than one ounce. If the PCB design uses multiple copper layers (recommended), thermal vias can also be connected to the inner layer heat-spreading ground planes. 8. Keep switch area small. Keep the copper area connecting the SW pin to the inductor as short and wide as possible. At the same time the total area of this node should be minimized to help reduce radiated EMI. See the following PCB layout resources for additional important guidelines:

Layout Guidelines for Switching Power Supplies
Simple Switcher PCB Layout Guidelines
Construction Your Power Supply- Layout Considerations
Low Radiated EMI Layout Made Simple with LM4360x and LM4600x

Figure 27. Current Loops with Fast Edges

11.1.1 Ground and Thermal Considerations

must be used for sensitive routes. conduction impedance, proper shielding, and lower thermal resistance.

11.2 Layout Example

Figure 28. Example Layout for WQFN Package

12 Device and Documentation Support

12.1 Device Support

12.1.1 Development Support

12.1.1.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM60440-Q1 device with the WEBENCH® Power Designer.

Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
Compare the generated design with other possible solutions from Texas Instruments.

pricing and component availability.

Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.

12.2 Documentation Support

12.2.1 Related Documentation

Thermal Design by Insight not Hindsight
A Guide to Board Layout for Best Thermal Resistance for Exposed Pad Packages
Semiconductor and IC Package Thermal Metrics
Thermal Design Made Simple with LM43603 and LM43602
PowerPADTM Thermally Enhanced Package
PowerPADTM Made Easy
Using New Thermal Metrics
Layout Guidelines for Switching Power Supplies
Simple Switcher PCB Layout Guidelines
Construction Your Power Supply- Layout Considerations
Low Radiated EMI Layout Made Simple with LM4360x and LM4600x

12.3 Related Links

resources, tools and software, and quick access to order now. Table 5. Related Links

12.4 Receiving Notification of Documentation Updates

changed. For change details, review the revision history included in any revised document.

12.5 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

12.6 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.

12.7 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.8 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 25-Jun-2020 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM60430AQRPKRQ1 ACTIVE WQFN-HR RPK 13 3000 Green (RoHS & no Sb/Br) NIPDAU Level-2-260C-1 YEAR -40 to 150 6430AQ LM60440AQRPKRQ1 ACTIVE WQFN-HR RPK 13 3000 Green (RoHS & no Sb/Br) NIPDAU Level-2-260C-1 YEAR -40 to 150 6440AQ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com 25-Jun-2020 Addendum-Page 2 OTHER QUALIFIED VERSIONS OF LM60440-Q1 :

Catalog: LM60440 NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant LM60430AQRPKRQ1 WQFN- HR LM60440AQRPKRQ1 WQFN- HR PACKAGE MATERIALS INFORMATION www.ti.com 24-Jun-2020 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM60430AQRPKRQ1 WQFN-HR RPK 13 3000 205.0 200.0 33.0 LM60440AQRPKRQ1 WQFN-HR RPK 13 3000 205.0 200.0 33.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Jun-2020 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 2X 0.4 0.3 14X 0.23 0.13 (1.45) 4X 0.575 0.3756X 0.55 0.35

0.5 TYP

1.3 2.3

0.1 C A B

0.05 C 8X 0.3 0.2 6X 0.3 0.2 (0.45) 2X 0.5 0.4 0.01 0.00 4X 0.525 0.425 (0.1)

0.1 MIN

(0.2) TYP 0.7 0.6 B 2.1 1.9 A 3.1 2.9 WQFN-HR - 1 mm max heightRPK0013A PLASTIC QUAD FLATPACK - NO LEAD 4224656/B 03/2020 PIN 1 INDEX AREA SEATING PLANE 0.08 C 1 11 SYMM SYMM 0.05 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. SCALE 5.000 SCALE 30.000 SECTION A-A SECTION A-A TYPICAL

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

(0.5) (1.15) (0.25) TYP (0.65) 2X (0.65) (2.75) (1.45) 2X (0.35) (0.45) (0.675) TYP (0.675) TYP (0.65) (R0.05) TYP 6X (0.25) WQFN-HR - 1 mm max heightRPK0013A PLASTIC QUAD FLATPACK - NO LEAD 4224656/B 03/2020 NOTES: (continued) 3. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 4. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented. EXPOSED METAL METAL EDGE SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAIL SYMM SYMM SEE SOLDER MASK DETAIL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 25X

www.ti.com EXAMPLE STENCIL DESIGN 2X (0.35) (0.25) TYP (1.75) (2.75) (0.5) 6X (0.65) (0.45) (1.45) (R0.05) TYP (0.675) TYP (0.675) TYP 6X (0.25) 2X (0.65) WQFN-HR - 1 mm max heightRPK0013A PLASTIC QUAD FLATPACK - NO LEAD 4224656/B 03/2020 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL 100% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE: 25X SYMM

IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated

Product Information

LM60430AQRPKRQ1 specifications and overview.

Summary

LM604x0-Q1 3.8-V to 36-V, 3-A, and 4-A Ultra-Small Synchronous Step-Down Converter

Description

LM604x0-Q1 3.8-V to 36-V, 3-A, and 4-A Ultra-Small Synchronous Step-Down Converter

Source title LM60430AQRPKRQ1 Datasheet(PDF) - Texas Instruments

Related Parts

More parts from the same family.

Browse manufacturer