LM5002SDX

LM5002 NSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 18

Technical content

Features

■ Integrated 75 volt N-Channel MOSFET ■ Ultra-wide input voltage range from 3.1V to 75V ■ Integrated high voltage bias regulator ■ Adjustable output voltage ■ 1.5% output voltage accuracy ■ Current mode control with selectable compensation ■ Wide bandwidth error amplifier ■ Integrated current sensing and limiting ■ Integrated slope compensation ■ 85% maximum duty cycle limit ■ Single resistor oscillator programming ■ Oscillator synchronization capability ■ Enable / Undervoltage Lockout (UVLO) pin ■ Thermal shutdown Packages ■ SO-8 ■ LLP-8 (4mm x 4mm) Typical Application Circuit 30004501 Boost Regulator Application Schematic © 2007 National Semiconductor Corporation 300045 www.national.com LM5002 High Voltage Switch Mode Regulator

Ordering Information

Order Number Package Type NSC Package Drawing Supplied As LM5002MA SO-8 M08A 95 Units in a Rail LM5002MAX SO-8 M08A 2500 Units on Tape and Reel LM5002SD LLP-8 SDC08A 1000 Units on Tape and Reel LM5002SDX LLP-8 SDC08A 4500 Units on Tape and Reel Pin Descriptions Pin Name Description Application InformationSO LLP 1 3 SW Switch pin The drain terminal of the internal power MOSFET. 2 4 VIN Input supply pin Nominal operating range: 3.1V to 75V. 3 5 VCC Bias regulator output, or input for external bias supply VCC tracks VIN up to 6.9V. Above VIN = 6.9V, VCC is regulated to 6.9 Volts. A 0.47 µF or greater ceramic decoupling capacitor is required. An external voltage (7V – 12V) can be applied to this pin which disables the internal VCC regulator to reduce internal power dissipation and improve converter efficiency. 4 6 GND Ground Internal reference for the regulator control functions and the power MOSFET current sense resistor connection. 5 7 RT Oscillator frequency programming and optional synchronization pulse input The internal oscillator is set with a resistor, between this pin and the GND pin. The recommended frequency range is 50KHz to 1.5 MHz. The RT pin can accept synchronization pulses from an external clock. A 100 pF capacitor is recommended for coupling the synchronizing clock to the RT pin. 6 8 FB Feedback input from the regulated output voltage This pin is connected to the inverting input of the internal error amplifier. The 1.26V reference is internally connected to the non-inverting input of the error amplifier. 7 1 COMP Open drain output of the internal error amplifier The loop compensation network should be connected between the COMP pin and the FB pin. COMP pull-up is provided by an internal 5 kΩ resistor which may be used to bias an opto-coupler transistor (while FB is grounded) for isolated ground applications. www.national.com 2 LM5002

Pin Name Description Application InformationSO LLP 8 2 EN Enable / Under Voltage Lock-Out / Shutdown input An external voltage divider can be used to set the line undervoltage lockout threshold. If the EN pin is left unconnected, a 6 µA pull-up current source pulls the EN pin high to enable the regulator. NA EP EP Exposed Pad, LLP only Exposed metal pad on the underside of the package with a resistive connection to pin 6. It is recommended to connect this pad to the PC board ground plane in order to improve heat dissipation. 3 www.national.com LM5002

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN to GND 76V SW to GND (Steady State) -0.3V to 76V VCC, EN to GND 14V COMP, FB, RT to GND -0.3V to 7V Maximum Junction Temperature 150°C Storage Temperature −65°C to +150°C ESD Rating (Note 2) Human Body Model 2kV Operating Conditions VIN 3.1V to 75V Operating Junction Temperature −40°C to +125°C Electrical Characteristics Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VVIN = 10V, RRT = 48.7kΩ unless otherwise stated. See (Note 3). Symbol Parameter Conditions Min Typ Max Units STARTUP REGULATOR VVCC-REG VCC Regulator Output 6.55 6.85 7.15 V VCC Current Limit VVCC = 6V 15 20 mA VCC UVLO Threshold VVCC increasing 2.6 2.8 3 V VCC Undervoltage Hysteresis 0.1 V Bias Current (IIN) VFB = 1.5V 3.1 4.5 mA IQ Shutdown Current (IIN) VEN = 0V 95 130 µA EN THRESHOLDS EN Shutdown Threshold VEN increasing 0.25 0.45 0.65 V EN Shutdown Hysteresis 0.1 V EN Standby Threshold VEN increasing 1.2 1.26 1.32 V EN Standby Hysteresis 0.1 V EN Current Source 6 µA MOSFET CHARACTERISTICS MOSFET RDS(ON) plus Current Sense Resistance ID = 0.25A 850 1600 mΩ MOSFET Leakage Current VSW = 75V 0.05 5 µA MOSFET Gate Charge VVCC = 6.9V 2.4 nC CURRENT LIMIT ILIM Cycle by Cycle Current Limit 0.4 0.5 0.6 A Cycle by Cycle Current Limit Delay 100 200 ns OSCILLATOR FSW1 Frequency1 RRT = 48.7 kΩ 225 260 295 KHz FSW2 Frequency2 RRT = 15.8 kΩ 660 780 900 KHz VRT-SYNC SYNC Threshold 2.2 2.6 3.2 V SYNC Pulse Width Minimum VRT > VRT-SYNC + 0.5V 15 ns PWM COMPARATOR Maximum Duty Cycle 80 85 90 % Min On-time VCOMP > VCOMP-OS 25 ns Min On-time VCOMP < VCOMP-OS 0 ns VCOMP-OS COMP to PWM Comparator Offset 0.9 1.30 1.55 V www.national.com 4 LM5002

Symbol Parameter Conditions Min Typ Max Units ERROR AMPLIFIER VFB-REF Feedback Reference Voltage Internal reference VFB = VCOMP 1.241 1.260 1.279 V FB Bias Current 10 nA DC Gain 72 dB COMP Sink Current VCOMP = 250mV 2.5 mA COMP Short Circuit Current VFB = 0, VCOMP = 0 0.9 1.2 1.5 mA COMP Open Circuit Voltage VFB = 0 4.8 5.5 6.2 V COMP to SW Delay 42 ns Unity Gain Bandwidth 3 MHz THERMAL SHUTDOWN TSD Thermal Shutdown Threshold 165 °C Thermal Shutdown Hysteresis 20 °C THERMAL RESISTANCE θJC Junction to Case, SO-8 32 °C/W θJA Junction to Ambient, SO-8 140 °C/W θJC Junction to Case, LLP-8 4.5 °C/W θJA Junction to Ambient, LLP-8 40 °C/W Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Test Method is per JESD-22-A114. Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL). 5 www.national.com LM5002

Typical Performance Characteristics Efficiency, Boost Converter 30004518 VFB vs Temperature 30004519 IQ (non-switching) vs VIN 30004520 VCC vs VIN 30004521 RDS(ON) vs VCC 30004522 RDS(ON) vs Temperature 30004523 www.national.com 6 LM5002

ILIM vs VCC vs Temperature 30004525 FSW vs RRT 30004526 FSW vs Temperature 30004527 FSW vs VCC 30004528 IEN vs VVIN vs Temperature 30004529 7 www.national.com LM5002

The LM5002 high voltage switching regulator features all the functions necessary to implement an efficient boost, flyback, SEPIC or forward current mode power converter. The oper- ation can be best understood by referring to the block dia- gram. At the start of each cycle, the oscillator sets the driver logic and turns on the power MOSFET to conduct current through the inductor or transformer. The peak current in the MOSFET is controlled by the voltage at the COMP pin. The COMP voltage will increase with larger loads and decrease with smaller loads. This voltage is compared with the sum of a voltage proportional to the power MOSFET current and an internally generated Slope Compensation ramp. Slope Com- pensation is used in current mode PWM architectures to eliminate sub-harmonic current oscillation that occurs with static duty cycles greater than 50%. When the summed signal exceeds the COMP voltage, the PWM comparator resets the driver logic, turning off the power MOSFET. The driver logic is then set by the oscillator at the end of the switching cycle to initiate the next power period. The LM5002 has dedicated protection circuitry to protect the IC from abnormal operating conditions. Cycle-by-cycle cur- rent limiting prevents the power MOSFET current from ex- ceeding 0.5A. This feature can also be used to soft-start the regulator. Thermal Shutdown circuitry holds the driver logic in reset when the die temperature reaches 165°C, and returns to normal operation when the die temperature drops by ap- proximately 20°C. The EN pin can be used as an input voltage under voltage lockout (UVLO) during start-up to prevent op- eration with less than the minimum desired input voltage. High Voltage VCC Regulator The LM5002 VCC Low Drop Out (LDO) regulator allows the LM5002 to operate at the lowest possible input voltage. The VCC pin voltage is very nearly equal to the input voltage from 2.8V up to approximately 6.9V. As the input voltage continues to increase, the VCC pin voltage is regulated at the 6.9V set- point. The total input operating range of the VCC LDO regu- lator is 3.1V to 75V. The output of the VCC regulator is current limited to 20mA. During power-up, the VCC regulator supplies current into the required decoupling capacitor (0.47 µF or greater ceramic capacitor) at the VCC pin. When the voltage at the VCC pin exceeds the VCC UVLO threshold of 2.8V and the EN pin is greater than 1.26V the PWM controller is enabled and switch- www.national.com 8 LM5002

ing begins. The controller remains enabled until VCC falls below 2.7V or the EN pin falls below 1.16V. An auxiliary supply voltage can be applied to the VCC pin to reduce the IC power dissipation. If the auxiliary voltage is greater than 6.9V, the internal regulator will essentially shut- off, and internal power dissipation will be decreased by the VIN voltage times the operating current. The overall converter efficiency will also improve if the VIN voltage is much higher than the auxiliary voltage. The externally applied VCC voltage should not exceed 14V. The VCC regulator series pass MOS- FET includes a body diode (see the Block Diagram) between VCC and VIN that should not be forward biased in normal operation. Therefore, the auxiliary VCC voltage should never exceed the VIN voltage. In high voltage applications extra care should be taken to en- sure the VIN pin does not exceed the absolute maximum voltage rating of 76V. Voltage ringing on the VIN line during line transients that exceeds the Absolute Maximum Ratings will damage the IC. Both careful PC board layout and the use of quality bypass capacitors located close to the VIN and GND pins are essential. Oscillator A single external resistor connected between RT and GND pins sets the LM5002 oscillator frequency. To set a desired oscillator frequency (FSW), the necessary value for the RT re- sistor can be calculated from the following equation: The tolerance of the external resistor and the frequency tol- erance indicated in the Electrical Characteristics must be taken into account when determining the worst case frequen- cy range. External Synchronization The LM5002 can be synchronized to the rising edge of an external clock. The external clock must have a higher fre- quency than the free running oscillator frequency set by the RT resistor. The clock signal should be coupled through a 100pF capacitor into the RT pin. A peak voltage level greater than 2.6V at the RT pin is required for detection of the sync pulse. The DC voltage across the RT resistor is internally regulated at 1.5 volts. The negative portion of the AC voltage of the synchronizing clock is clamped to this 1.5V by an am- plifier inside the LM5002 with ~100 Ω output impedance. Therefore, the AC pulse superimposed on the RT resistor must have positive pulse amplitude of 1.1V or greater to suc- cessfully synchronize the oscillator. The sync pulse width measured at the RT pin should have a duration greater than 15ns and less than 5% of the switching period. The sync pulse rising edge initiates the internal CLK signal rising edge, which turns off the power MOSFET. The RT resistor is always re- quired, whether the oscillator is free running or externally synchronized. The RT resistor should be located very close to the device and connected directly to the RT and GND pins of the LM5002. Enable / Standby The LM5002 contains a dual level Enable circuit. When the EN pin voltage is below 450 mV, the IC is in a low current shutdown mode with the VCC LDO disabled. When the EN pin voltage is raised above the shutdown threshold but below the 1.26V standby threshold, the VCC LDO regulator is en- abled, while the remainder of the IC is disabled. When the EN pin voltage is raised above the 1.26V standby threshold, all functions are enabled and normal operation begins. An inter- nal 6 µA current source pulls up the EN pin to activate the IC when the EN pin is left disconnected. An external set-point resistor divider from VIN to GND can be used to determine the minimum operating input range of the regulator. The divider must be designed such that the EN pin exceeds the 1.26V standby threshold when VIN is in the de- sired operating range. The internal 6 µA current source should be included when determining the resistor values. The shut- down and standby thresholds have 100 mV hysteresis to prevent noise from toggling between modes. When the VIN voltage is below 3.5VDC during start-up and the operating temperature is below -20°C, the EN pin should have a pull-up resistor that will provide 2 µA or greater current. The EN pin is internally protected by a 6V Zener diode through a 1 k Ω resistor. The enabling voltage may exceed the Zener voltage, however the Zener current should be limited to less than 4mA. Error Amplifier and PWM Comparator An internal high gain error amplifier generates an error signal proportional to the difference between the regulated output voltage and an internal precision reference. The output of the error amplifier is connected to the COMP pin allowing the user to add loop compensation, typically a Type II network, as il- lustrated in Figure 1. This network creates a low frequency pole that rolls off the high DC gain of the amplifier, which is necessary to accurately regulate the output voltage. FDC_POLE is the closed loop unity gain (0 dB) frequency of this pole. A zero provides phase boost near the closed loop unity gain frequency, and a high frequency pole attenuates switch- ing noise. The PWM comparator compares the current sense signal from the current sense amplifier to the error amplifier output voltage at the COMP pin. 9 www.national.com LM5002

Application Information

The following information is intended to provide guidelines for the power supply designer using the LM5002. VIN The voltage applied to the VIN pin can vary within the range of 3.1V to 75V. The current into the VIN pin depends primarily on the gate charge of the power MOSFET, the switching fre- quency, and any external load on the VCC pin. It is recom- mended the filter shown in Figure 2 be used to suppress transients which may occur at the input supply. This is par- ticularly important when VIN is operated close to the maxi- mum operating rating of the LM5002. When power is applied and the VIN voltage exceeds 2.8V with the EN pin voltage greater than 0.45V, the VCC regulator is enabled, supplying current into the external capacitor con- nected to the VCC pin. When the VIN voltage is between 2.8V and 6.9V, the VCC voltage is approximately equal to the VIN voltage. When the voltage on the VCC pin exceeds 6.9V, the VCC pin voltage is regulated at 6.9V. In typical flyback appli- cations, an auxiliary transformer winding is connected through a diode to the VCC pin. This winding must raise the VCC voltage above 6.9V to shut off the internal start-up reg- ulator. The current requirements from this winding are rela- tively small, typically less than 20 mA. If the VIN voltage is much higher than the auxiliary voltage, the auxiliary winding will significantly improve conversion efficiency. It also reduces the power dissipation within the LM5002. The externally ap- plied VCC voltage should never exceed 14V. Also the applied VCC should never exceed the VIN voltage to avoid reverse current through the internal VCC to VIN diode shown in the LM5002 block diagram. 30004507 FIGURE 2. Input Transient Protection shutdown mode where the VIN current is reduced to 95 µA. arbitrary current through R1 and R2. low as 50V) for the selected R1 resistor.

FIGURE 5. Soft-Start

Printed Circuit Board Layout The LM5002 Current Sense and PWM comparators are very fast and may respond to short duration noise pulses. The components at the SW, COMP, EN and the RT pins should be as physically close as possible to the IC, thereby minimiz- ing noise pickup on the PC board tracks. The SW output pin of the LM5002 should have a short, wide conductor to the power path inductors, transformers and ca- pacitors in order to minimize parasitic inductance that reduces efficiency and increases conducted and radiated noise. Ce- ramic decoupling capacitors are recommended between the VIN pin to the GND pin and between the VCC pin to the GND pin. Use short, direct connections to avoid clock jitter due to ground voltage differentials. Small package surface mount X7R or X5R capacitors are preferred for high frequency per- formance and limited variation over temperature and applied voltage. If an application using the LM5002 produces high junction temperatures during normal operation, multiple vias from the GND pin to a PC board ground plane will help conduct heat away from the IC. Judicious positioning of the PC board within the end product, along with use of any available air flow will help reduce the junction temperatures. If using forced air cooling, avoid placing the LM5002 in the airflow shadow of large components, such as input capacitors, inductors or transformers. Application Circuit Examples The following schematics present examples of a Non-Isolated Flyback, Isolated Flyback, Boost, 24V SEPIC and a 12V Au- tomotive range SEPIC converters utilizing the LM5002 switching regulator. NON-ISOLATED FLYBACK The Non-Isolated Flyback converter (Figure 6) utilizes the in- ternal voltage reference for the regulation setpoint. The output is +5V at 500mA while the input voltage can vary from 16V to 42V. The switching frequency is set to 250kHz. An auxiliary winding on transformer (T1) provides 7.5V to power the LM5002 when the output is in regulation. This disables the internal high voltage VCC LDO regulator and improves effi- ciency. The input under-voltage threshold is 13.9V. The con- verter can be shut down by driving the EN input below 1.26V with an open-collector or open-drain transistor. An external synchronizing frequency can be applied to the SYNC input. An optional soft-start circuit is connected to the COMP pin input. When power is applied, the soft-start capacitor (C7) is discharged and limits the voltage applied to the PWM com- parator by the internal error amplifier. The internal ~5 k Ω COMP pull-up resistor charges the soft-start capacitor until regulation is achieved. The VCC pull-up resistor (R7) contin- ues to charge C7 so that the soft-start circuit will not affect the compensation network in normal operation. If the output ca- pacitance is small, the soft-start circuit can be adjusted to limit the power-on output voltage overshoot. If the output capaci- tance is sufficiently large, no soft-start circuit is needed be- cause the LM5002 will gradually charge the output capacitor by current limiting at approximately 500mA (ILIM) until regula- tion is achieved. ISOLATED FLYBACK The Isolated Flyback converter (Figure 7) utilizes a 2.5V volt- age reference (LM431) located on the isolated secondary side for the regulation setpoint. The LM5002 internal error amplifier is disabled by grounding the FB pin. The LM431 controls the current through the opto-coupler LED, which sets the COMP pin voltage. The R4 and C3 network boosts the phase response of the opto-coupler to increase the loop bandwidth. The output is +5V at 500mA and the input voltage ranges from 16V to 42V. The switching frequency is set to 250kHz. BOOST The Boost converter (Figure 8) utilizes the internal voltage reference for the regulation setpoint. The output is +48V at 125 mA, while the input voltage can vary from 16V to 36V. The switching frequency is set to 250kHz. The internal VCC regulator provides 6.9V bias power, since there isn’t a simple method for creating an auxiliary voltage with the boost topol- ogy. Note that the boost topology does not provide output short-circuit protection because the power MOSFET cannot interrupt the path between the input and the output. 24V SEPIC The 24V SEPIC converter (Figure 9) utilizes the internal volt- age reference for the regulation setpoint. The output is +24V at 125 mA while the input voltage can vary from 16V to 48V. The switching frequency is set to 250kHz. The internal VCC regulator provides 6.9V bias power for the LM5002. An aux- iliary voltage can be created by adding a winding on L2 and a diode into the VCC pin. 12V AUTOMOTIVE SEPIC The 12V Automotive SEPIC converter (Figure 10) utilizes the internal bandgap voltage reference for the regulation setpoint. The output is +12V at 25 mA while the input voltage can vary from 3.1V to 60V. The output current rating can be increased if the minimum VIN voltage requirement is increased. The switching frequency is set to 750kHz. The internal VCC reg- ulator provides 6.9V bias power for the LM5002. The output voltage can be used as an auxiliary voltage if the nominal VIN voltage is greater than 12V by adding a diode from the output into the VCC pin. In this configuration, the minimum input voltage must be greater than 12V to prevent the internal VCC to VIN diode from conducting. If the applied VCC voltage ex- ceeds the minimum VIN voltage, then an external blocking diode is required between the VIN pin and the power source to block current flow from VCC to the input supply. www.national.com 14 LM5002

Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead SO-8 Package 8-Lead LLP Package 17 www.national.com LM5002

LM5002 High Voltage Switch Mode RegulatorTHE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. Copyright© 2007 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +49 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com