CA139 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • Operation from Single or Dual Supplies
  • Common Mode Input Voltage Range to GND
  • Output Voltage Compatible with TTL, DTL, ECL, MOS and CMOS
  • Differential Input Voltage Range Equal to the Supply Voltage
  • Maximum Input Offset Voltage (V IO)
  • Replacement for Industry Types 139, 239, 339, 139A, 2901, 3302

Applications

  • Square Wave Generator
  • Time Delay Generators
  • Pulse Generators
  • Multivibrators
  • High Voltage Digital Logic Gates
  • A/D Converters
  • MOS Clock Timers Schematic Diagram

Ordering Information

PART NO. (BRAND) TEMP. RANGE (oC) PACKAGE PKG. NO. CA0139E -55 to 125 14 Ld PDIP E14.3 CA0139M, AM (139, 139A) -55 to 125 14 Ld SOIC M14.15 CA0239E -25 to 85 14 Ld PDIP E14.3 CA0239M96 (239) -25 to 85 14 Ld SOIC M14.15 CA0339E 0 to 70 14 Ld PDIP E14.3 CA0339M (339) 0 to 70 14 Ld SOIC M14.15 LM339N 0 to 70 14 Ld PDIP E14.3 LM2901N -40 to 85 14 Ld PDIP E14.3 LM3302M96 (3302) -40 to 85 14 Ld SOIC M14.15 LM3302N -40 to 85 14 Ld PDIP E14.3 OUTPUT 2 OUTPUT 1 NEG. INPUT 1 POS. INPUT 1 NEG. INPUT 2 POS. INPUT 2 OUTPUT 3 OUTPUT 4 GND POS. INPUT 4 NEG. INPUT 4 POS. INPUT 3 NEG. INPUT 3 1 4 2 3 + INPUT - INPUT Q 5 Q 6 Q 4 Q 3Q 2 Q 1 Q 7 Q 8 OUTPUT TO 2, 3, 4 TO 2, 3, 4 - 1 COMPARATOR NO 1 3.5µA 100µA 3.5µA 100µA Data Sheet October 1999 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143| Copyright © Intersil Corporation 1999

Absolute Maximum Ratings Thermal Information Input Current (V Output Short Circuit Duration (Single Supply, Note 2) . . .Continuous Operating Conditions Temperature Range Thermal Resistance (Typical, Note 3)θJA (oC/W) θJC (oC/W) (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Inputs must not go more negative than -0.3V. 2. Short circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current independent of V+ is approximately 20mA. 3. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsV+ = 5V, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS TEMP (oC) CA139 CA139A UNITSMIN TYP MAX MIN TYP MAX Input Offset Voltage V IO VREF = 1.4V, RS = 0, Output Switch Point V ≅ 1.4V TA = 25 - 2 5 - 1 2 mV Note 4 - - 9 - - 4 mV Differential Input Voltage VID Keep All Inputs ≥ 0V, or V- (if used), (Note 5) Note 4 - - 36 - - 36 V Saturation Voltage V SAT VI- = 1V, VI+ = 0V, ISINK ≤ 4mA TA = 25 - 250 400 - 250 400 mV Note 4 - - 700 - - 700 mV Common Mode Input Voltage Range VICR Note 6 T A = 25 0 - V+ -1.5 0 - V+ -1.5 V Note 4 0 - V+ -2 0 - V+ -2 V Input Offset Current I IO II+ - II-T A = 25 - 3 25 - 3 25 nA Note 4 - - 100 - - 100 nA Input Bias Current I IB II+ or II- with Output in Linear Range TA = 25 - 25 100 - 25 100 nA Note 4 - - 300 - - 300 nA Total Supply Current I+ R L =∞ On All Comparators TA = 25 - 0.8 2 - 0.8 2 mA Output Leakage Current VI+ ≥ 1V, VI- = 0V, VO = 5V VI+ ≥ 1V, VI- = 0V, VO = 30V Note 4 - - 1 - - 1 µA Output Sink Current V I-≥ 1V, VI+ = 0V, VO ≤ 1.5V TA = 25 6 16 - 6 16 - mA Voltage Gain A OL R L ≥ 15kΩ , V+ = 15V T A = 25 - 200 - 50 200 - V/mV Large Signal Response Time VI = TTL Logic Swing, VREF = 1.4V, VRL = 5V, R L = 5.1kΩ TA = 25 - 300 - - 300 - ns Response Time (Figures 3, 4) VRL = 5V, RL = 5.1kΩ TA = 25 - 1.3 - - 1.3 - µs CA139, CA139A, CA239, CA339, LM339, LM2901, LM3302

Electrical SpecificationsV+ = 5V, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS TEMP (oC) CA239, CA339, LM339 UNITSMIN TYP MAX Input Offset Voltage V IO VREF = 1.4V, RS = 0, Output Switch Point V≅ 1.4V TA = 25 - 2 5 mV Note 4 - - 9 mV Differential Input Voltage V ID Keep All Inputs ≥ 0V, or V- (if used) (Note 5) Note 4 - - 36 V Saturation Voltage V SAT VI- = 1V, VI+ = 0V, ISINK ≤ 4mA T A = 25 - 250 400 mV Note 4 - - 700 mV Common Mode Input Voltage Range VICR Note 6 T A = 25 0 - V+ -1.5 V Note 4 0 - V+ - 2 V Input Offset Current I IO II+ - II-T A = 25 - 5 50 nA Note 4 - - 150 nA Input Bias Current I IB II+ or II- with Output in Linear Range TA = 25 - 25 250 nA Note 4 - - 400 nA Total Supply Current I+ R L =∞ on All Comparators T A = 25 - 0.8 2 mA Output Leakage Current V I+ ≥ 1V, VI- = 0V, VO = 5V T A = 25 - 0.1 - nA VI+ ≥ 1V, VI- = 0V, VO = 30V Note 4 - - 1 µA Output Sink Current V I-≥ 1V, VI+ = 0V, VO ≤ 1.5V T A = 25 6 16 - mA Voltage Gain A OL R L ≥ 15kΩ , V+ = 15V T A = 25 50 200 - V/mV Large Signal Response Time VI= TTL Logic Swing, VREF = 1.4V, VRL =5 V , RL = 5.1kΩ TA = 25 - 300 - ns Response Time (Figures 3, 4) VRL = 5V, RL = 5.1kΩ TA = 25 - 1.3 - µs NOTES: 4. Ambient Temperature (TA) applicable over operating temperature range as shown below. CA139, CA139A = -55oC to 125oC; CA239 = -25oC to 85oC; CA339, LM339 = 0oC to 70oC; LM2901, LM3302 = -40oC to 85oC. 5. The comparator will provide a proper output state even if the positive swing of the inputs exceeds the power supply voltage level, if the other input remains within the common mode voltage range. The low input voltage state must not be less than -0.3V (or 0.3V below the magnitude of the negative power supply, if used). 6. The upper end of the common mode voltage range is (V+) - 1.5V, but either or both inputs can go to +30V without damage. CA139, CA139A, CA239, CA339, LM339, LM2901, LM3302

FIGURE 1. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 2. INPUT CURRENT vs SUPPLY VOLTAGE

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitewww.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 CA139, CA139A, CA239, CA339, LM339, LM2901, LM3302