LM2700

LM2700 NSC | Alldatasheet

Document overview

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Technical content

Features

n 3.6A, 0.08Ω , internal switch n Operating input voltage range of 2.2V to 12V n Input undervoltage protection n Adjustable output voltage up to 17.5V n 600kHz/1.25MHz pin selectable frequency operation n Over temperature protection n Small 14-Lead TSSOP or LLP package

Applications

Typical Application Circuit 20012301 600 kHz Operation October 2001 LM2700 600kHz/1.25MHz, 2.5A, Step-up PWM DC/DC Converter © 2001 National Semiconductor Corporation DS200123 www.national.com

Ordering Information

Order Number Package Type NSC Package Drawing Supplied As LM2700MT-ADJ TSSOP-14 MTC14 94 Units, Rail LM2700MTX-ADJ TSSOP-14 MTC14 2500 Units, Tape and Reel LM2700LD-ADJ LLP-14 LDA14A 1000 Units, Tape and Reel LM2700LDX-ADJ LLP-14 LDA14A 4500 Units, Tape and Reel Pin Description Pin Name Function 1V C Compensation network connection. Connected to the output of the voltage error amplifier. 2 FB Output voltage feedback input.

3 SHDN

Shutdown control input, active low. 4 AGND Analog ground. 5 PGND Power ground. PGND pins must be connected together directly at the part. 6 PGND Power ground. PGND pins must be connected together directly at the part. 7 PGND Power ground. PGND pins must be connected together directly at the part. 8 SW Power switch input. Switch connected between SW pins and PGND pins. 9 SW Power switch input. Switch connected between SW pins and PGND pins. 10 SW Power switch input. Switch connected between SW pins and PGND pins. 11 NC Pin not connected internally. 12 V IN Analog power input. 13 FSLCT Switching frequency select input. V IN = 1.25MHz. Ground = 600kHz. 14 NC Connect to ground. LM2700 www.national.com 2

Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. V IN 12V SW Voltage 18V FB Voltage 7V V C Voltage 0.965V ≤ VC ≤ 1.565V SHDN Voltage (Note 1) 7V FSLCT (Note 1) 12V Maximum Junction Temperature 150˚C Power Dissipation(Note 3) Internally Limited Lead Temperature 300˚C Vapor Phase (60 sec.) 215˚C Infrared (15 sec.) 220˚C ESD Susceptibility (Note 4) Human Body Model 2kV Machine Model 200V Operating Conditions Operating Junction Temperature Range (Note 5) −40˚C to +125˚C Storage Temperature −65˚C to +150˚C Supply Voltage 2.2V to 12V SW Voltage 17.5V

Electrical Characteristics

Specifications in standard type face are for TJ = 25˚C and those withboldface typeapply over the fullOperating Tempera- ture Range(TJ = −40˚C to +125˚C) Unless otherwise specified. VIN =2.2V and IL = 0A, unless otherwise specified. Symbol Parameter Conditions Min (Note 5) Typ (Note 6) Max (Note 5) Units IQ Quiescent Current FB = 2.2V (Not Switching) FSLCT = 0V 1.2 2 mA FB = 2.2V (Not Switching) FSLCT = V IN 1.3 2 mA VSHDN =0 V 5 20 µA VFB Feedback Voltage 1.2285 1.26 1.2915 V ICL (Note 7) Switch Current Limit V IN = 2.7V (Note 8) 2.55 3.6 4.3 A %V FB /ΔVIN Feedback Voltage Line Regulation 2.2V ≤ VIN ≤ 12.0V 0.02 0.07 %/V IB FB Pin Bias Current (Note 9) 0.5 40 nA VIN Input Voltage Range 2.2 12 V gm Error Amp TransconductanceΔI = 5µA 40 155 290 µmho AV Error Amp Voltage Gain 135 V/V D MAX Maximum Duty Cycle FSLCT = Ground 78 85 % D MIN Minimum Duty Cycle FSLCT = Ground 15 %FSLCT = V IN 30 fS Switching Frequency FSLCT = Ground 480 600 720 kHz FSLCT = V IN 1 1.25 1.5 MHz ISHDN Shutdown Pin Current V SHDN =V IN 0.008 1 µAVSHDN =0 V −0.5 −1 IL Switch Leakage Current V SW = 18V 0.02 20 µA R DSON Switch RDSON (Note 10) V IN = 2.7V, ISW =2 A 8 0 150 m Ω ThSHDN SHDN Threshold Output High 0.9 0.6 V Output Low 0.6 0.3 V UVP On Threshold 1.95 2.05 2.2 V Off Threshold 1.85 1.95 2.1 V θJA Thermal Resistance (Note 11) TSSOP, package only 150 ˚C/WLLP, package only 45 Note 1:This voltage should never exceed VIN. Note 2:Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. LM2700 www.national.com 4

Electrical Characteristics(Continued) Note 3:The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance,θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) −T A)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 4:The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 5:All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical QualityControl (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 6:Typical numbers are at 25˚C and represent the most likely norm. Note 7:Duty cycle affects current limit due to ramp generator. Note 8:Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. VIN Note 9:Bias current flows into FB pin. Note 10:Does not include the bond wires. Measured directly at the die. Note 11:Refer to National’s packaging website for more detailed thermal information and mounting techniques for the LLP and TSSOP packages. Typical Performance Characteristics Efficiency vs. Load Current (VOUT = 8V, fS = 600 kHz) Efficiency vs. Load Current (VOUT = 8V, fS = 1.25 MHz) 20012326 20012325 Efficiency vs. Load Current (VOUT = 5V, fS = 600 kHz) Efficiency vs. Load Current (VOUT = 12V, fS = 600 kHz) 20012334 20012335 LM2700 www.national.com5

Typical Performance Characteristics(Continued) Switch Current Limit vs. Temperature Switch Current Limit vs. V IN 20012320 20012322 R DSON vs. VIN (ISW = 2A) IQ vs. VIN (600 kHz, not switching) 20012327 20012328 IQ vs. VIN (600 kHz, switching) IQ vs. VIN (1.25 MHz, not switching) 20012329 20012321 LM2700 www.national.com 6

Typical Performance Characteristics(Continued) IQ vs. VIN (1.25 MHz, switching) IQ vs. VIN (In shutdown) 20012319 20012318 Frequency vs. VIN (600 kHz) Frequency vs. VIN (1.25 MHz) 20012323 20012324 LM2700 www.national.com7

Operation (Continued) very little load changes, and at lower current outputs, the input capacitor size can often be reduced. The size can also be reduced if the input of the regulator is very close to the source output. The size will generally need to be larger for applications where the regulator is supplying nearly the maximum rated output or if large load steps are expected. A minimum value of 10µF should be used for the less stressful condtions while a 33µF or 47µF capacitor may be required for higher power and dynamic loads. Larger values and/or lower ESR may be needed if the application requires very low ripple on the input source voltage. The choice of output capacitors is also somewhat arbitrary and depends on the design requirements for output voltage ripple. It is recommended that low ESR (Equivalent Series Resistance, denoted R ESR ) capacitors be used such as ceramic, polymer electrolytic, or low ESR tantalum. Higher ESR capacitors may be used but will require more compen- sation which will be explained later on in the section. The ESR is also important because it determines the peak to peak output voltage ripple according to the approximate equation: ΔV OUT )2ΔiLR ESR (in Volts) A minimum value of 10µF is recommended and may be increased to a larger value. After choosing the output capaci- tor you can determine a pole-zero pair introduced into the control loop by the following equations: Where RL is the minimum load resistance corresponding to the maximum load current. The zero created by the ESR of the output capacitor is generally very high frequency if the ESR is small. If low ESR capacitors are used it can be neglected. If higher ESR capacitors are used see the High Output Capacitor ESR Compensationsection. Right Half Plane Zero A current mode control boost regulator has an inherent right half plane zero (RHP zero). This zero has the effect of a zero in the gain plot, causing an imposed +20dB/decade on the rolloff, but has the effect of a pole in the phase, subtracting another 90˚ in the phase plot. This can cause undesirable effects if the control loop is influenced by this zero. To ensure the RHP zero does not cause instability issues, the control loop should be designed to have a bandwidth of less than 1⁄2 the frequency of the RHP zero. This zero occurs at a fre- quency of: where ILOAD is the maximum load current. Selecting the Compensation Components The first step in selecting the compensation components RC and CC is to set a dominant low frequency pole in the control loop. Simply choose values for RC and CC within the ranges given in theIntroduction to Compensationsection to set this pole in the area of 10Hz to 500Hz. The frequency of the pole created is determined by the equation: where RO is the output impedance of the error amplifier, approximately 850kΩ . Since RC is generally much less than R O , it does not have much effect on the above equation and can be neglected until a value is chosen to set the zero fZC . fZC is created to cancel out the pole created by the output capacitor, fP1. The output capacitor pole will shift with differ- ent load currents as shown by the equation, so setting the zero is not exact. Determine the range of f P1 over the ex- pected loads and then set the zero fZC to a point approxi- mately in the middle. The frequency of this zero is deter- mined by: Now R C can be chosen with the selected value for CC . Check to make sure that the pole fPC is still in the 10Hz to 500Hz range, change each value slightly if needed to ensure both component values are in the recommended range. After checking the design at the end of this section, these values can be changed a little more to optimize performance if desired. This is best done in the lab on a bench, checking the load step response with different values until the ringing and overshoot on the output voltage at the edge of the load steps is minimal. This should produce a stable, high performance circuit. For improved transient response, higher values of R C should be chosen. This will improve the overall bandwidth which makes the regulator respond more quickly to tran- sients. If more detail is required, or the most optimal perfor- mance is desired, refer to a more in depth discussion of compensating current mode DC/DC switching regulators. High Output Capacitor ESR Compensation When using an output capacitor with a high ESR value, or just to improve the overall phase margin of the control loop, another pole may be introduced to cancel the zero created by the ESR. This is accomplished by adding another capaci- tor, C C2 , directly from the compensation pin VC to ground, in parallel with the series combination of RC and CC . The pole should be placed at the same frequency as fZ1, the ESR zero. The equation for this pole follows: To ensure this equation is valid, and that CC2 can be used without negatively impacting the effects of RC and CC ,fPC2 must be greater than 10fZC . Checking the Design The final step is to check the design. This is to ensure a bandwidth of1⁄2 or less of the frequency of the RHP zero. This is done by calculating the open-loop DC gain, ADC . After this value is known, you can calculate the crossover visually by placing a −20dB/decade slope at each pole, and a +20dB/decade slope for each zero. The point at which the gain plot crosses unity gain, or 0dB, is the crossover fre- quency. If the crossover frequency is less than 1⁄2 the RHP zero, the phase margin should be high enough for stability. LM2700 www.national.com 10

Operation (Continued) The phase margin can also be improved by adding CC2 as discussed earlier in the section. The equation for ADC is given below with additional equations required for the calcu- lation: mc )0.072fs (in V/s) where RL is the minimum load resistance, VIN is the maxi- mum input voltage, gm is the error amplifier transconduc- tance found in theElectrical Characteristicstable, and RD - SON is the value chosen from the graph ’RDSON vs. VIN ’i n theTypical Performance Characteristicssection. Layout Considerations The LM2700 uses two separate ground connections, PGND for the driver and NMOS power device and AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together at the package. The feed- back and compensation networks should be connected di- rectly to a dedicated analog ground plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then the ground connections of the feed- back and compensation networks must tie directly to the AGND pin. Connecting these networks to the PGND can inject noise into the system and effect performance. The input bypass capacitor C IN, as shown inFigure 3, must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with C IN, close to the VIN pin, to shunt any high frequency noise to ground. The output ca- pacitor, C OUT , should also be placed close to the IC. Any copper trace connections for the COUT capacitor can in- crease the series resistance, which directly effects output voltage ripple. The feedback network, resistors R FB1 and R FB2 , should be kept close to the FB pin, and away from the inductor, to minimize copper trace connections that can in- ject noise into the system. Trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching Power Supplies.

Application Information

FIGURE 3. 600 kHz operation, 8V output

FIGURE 6. 600 kHz operation, 12V output

FIGURE 7. Triple Output TFT Bias (600 kHz operation)

Application Information(Continued) 20012349 Start Up Waveform forFigure 7 VIN = 3.3V, IOUT = 500mA CH1: VIN 2V/div DC Coupled CH2: VOUT 5V/div DC Coupled CH3: Inductor Current 500mA/div DC Coupled 1ms/div 20012350 Load Transient forFigure 7, 8V Output VIN = 3.3V, IOUT = 50mA V375mA V50mA CH1: IOUT 0.2A/div DC Coupled CH2: VOUT 2V/div AC Coupled CH3: Inductor Current 1A/div DC Coupled 500µs/div LM2700 www.national.com15

Physical Dimensionsinches (millimeters) unless otherwise noted LLP-14 Pin Package (LDA) For Ordering, Refer to Ordering Information Table LM2700 www.national.com 16

Physical Dimensionsinches (millimeters) unless otherwise noted (Continued) TSSOP-14 Pin Package (MTC) For Ordering, Refer to Ordering Information Table LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com LM2700 600kHz/1.25MHz, 2.5A, Step-up PWM DC/DC Converter National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.