LM2619

LM2619_15 TI1 | Alldatasheet

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6.65k 33.2k 22PF LM2619 VIN 2.8V to 5 5V VOUT 1.8 V PWM/PFM 39.2k 10PF 330pF 1 0PH FB EN VDD PVIN EAOUT EANEG SGND PGND SW SYNC/ MODE ON/OFF 22.1k 33.2k 68.1k 330pF 22PF LM2619 VIN 3.2V to 5 5V VOUT 2.5V PWM/PFM 10 PH 10PF LM2619 www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 500-mASub-MiniatureStep-DownDC-DCConverter Check forSamples: LM2619 1FEATURES DESCRIPTION The LM2619 step down DC-DC converter is 2• Sub-Miniature10-Bump Thin DSBGA Package optimizedforpoweringcircuitsfrom a singlelithium-• Uses Small Ceramic Capacitors ion cell.Itsteps down an inputvoltageof 2.8V to

• 5-mV (Typical)PWM Mode Output Voltage 5.5V to an outputof 1.5V to 3.6V at up to 500mA. Ripple(COUT = 22 µF) Outputvoltageissetusingresistorfeedbackdividers.
• InternalSoftStart The deviceoffersthreemodes formobilephones and similarportableapplications.Fixed-frequencyPWM• CurrentOverload Protection mode minimizes RF interference.A SYNC input• Thermal Shutdown allowssynchronizingthe switchingfrequencyin a• ExternalCompensation range of 500 kHz to 1 MHz. Low-currenthysteretic PFM mode reduces quiescentcurrentto 160 µA KEY SPECIFICATIONS (typical).Shutdown mode turnsthe deviceoffand reducesbatteryconsumptionto0.02µA (typical).• Operates from a singleLi-ioncell:2.8Vto5.5V Currentlimitand thermalshutdown featuresprotect• Output voltage:1.5Vto3.6V thedeviceand systemduringfaultconditions.• DC feedback voltageprecision:±1% The LM2619 is availablein a 10-bump DSBGA• Maximum Load Capability:500mA package. This packaging uses chip-scaleDSBGA• PWM Mode QuiescentCurrent:600µA typ technologyand offersthe smallestpossiblesize.A
• Shutdown Current:0.02µA typ highswitchingfrequency(600kHz) allowsuse oftiny surface-mountcomponents.• PWM switchingfrequency:600kHz
• SYNC inputforPWM mode frequency The devicefeaturesexternalcompensationto tailor synchronizationfrom 0.5MHz to1MHz theresponsetoa widerangeofoperatingconditions.
• High efficiency(96% typicalat3.9VIN,3.6VOUT APPLICATIONSand 200 mA) inPWM mode from internal synchronous rectification • MobilePhones
• 100% Maximum Duty Cycle forLowest • Hand-Held Radios Dropout • RF PC Cards
• WirelessLAN Cards TypicalApplicationCircuits Figure1.TypicalCircuitfor1.8-VOutput Voltage Figure2.TypicalCircuitfor2.5-VOutput Voltage Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2002–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

22.1k 680pF 22PF VIN 2.8V to 5.5V SYNC/ MODE LM2619 V OU T 1.5V10PF LM2619 SNVS212B –NOVEMBER 2002–REVISED MAY 2013 www.ti.com Figure3. TypicalCircuitfor1.5-VOutput Voltage Connection Diagrams 10-Bump DSBGA Package Figure4.YPA Package Top View Figure5.YPA Package Bottom View Pin Functions Table1.Pin Description Pin No. Pin Name Function A1 FB Feedback AnalogInput. B1 EANEG Invertinginputoferroramplifier. C1 EAOUT Outputoferroramplifier. D1 SYNC/MODE SynchronizationInput.Use thisdigitalinputforfrequencyselectionormodulationcontrol.Set: SYNC/MODE = highforlow-noise600kHz PWM mode SYNC/MODE = lowforlow-currentPFM mode SYNC/MODE = a 500kHz–1MHz externalclockforsynchronizationinPWM mode. (See OPERATING MODE SELECTION and FREQUENCY SYNCHRONIZATION inDeviceInformation.) D2 EN EnableInput.SetthisSchmitttriggerdigitalinputhighfornormaloperation.Forshutdown,setlow.Set EN lowduringsystempower-upand otherlowsupplyvoltageconditions.(See SHUTDOWN MODE in DeviceInformation.) D3 PGND Power Ground. C3 SW SwitchingNode connectiontotheinternalPFET switchand NFET synchronousrectifier.Connecttoan inductorwitha saturationcurrentratingthatexceedsthemax SwitchPeak CurrentLimitoftheLM2619. B3 PVIN Power SupplyVoltageInputtotheinternalPFET switch.Connecttotheinputfiltercapacitor. A3 VDD AnalogSupplyInput.Ifboardlayoutisnotoptimum,an optional0.1µF ceramiccapacitorissuggested. A2 SGND Analogand ControlGround.

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www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings(1) PVIN,VDD toSGND −0.2Vto+6V PGND toSGND, PVIN toVDD −0.2Vto+0.2V EN, EAOUT, EANEG, SYNC/MODE toSGND −0.2Vto+6V FB, SW (GND −0.2V)to(VDD +0.2V) Storagetemperaturerange −45°C to+150°C Lead temperature(soldering,10 sec.) 260°C Junctiontemperature(2) −25°C to+125°C Minimum ESD rating(Human Body Model,C = 100 pF,R = 1.5kΩ) ±2 kV Thermalresistance(θJA) (3) 140°C/W (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothedevicemay occur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional.Forspecificationsand associatedtestconditions,see theMin and Max limitsand Conditionsinthe ElectricalCharacteristicstable.Typical(typ)specificationsaremean oraveragevaluesat25°C. (2) Thermalshutdownwilloccurifthejunctiontemperatureexceeds150°C. (3) Thermalresistancespecifiedwith2 layerPCB (0.5/0.5oz.cu). ElectricalCharacteristics SpecificationswithstandardtypefaceareforTA = TJ = 25°C, and thoseinboldfacetypeapplyoverthefullOperating Temperature Range ofTA = TJ = −25°C to+85°C. Unlessotherwisespecified,PVIN = VDD = EN = SYNC/MODE = 3.6V. Symbol Parameter Conditions Min Typ Max Unit VIN Inputvoltagerange PVIN = VDD = VIN (1) 2.8 3.6 5.5 V VFB Feedback voltage 1.485 1.50 1.515 V VHYST PFM comparatorhysteresisvoltage PFM Mode (SYNC/MODE = 0V)(2) 24 mV ISHDN Shutdown supplycurrent VIN = 3.6V,EN = 0V 0.02 3 µA IQ1_PWM DC biascurrentintoVDD SYNC/MODE = VIN,FB = 2V 600 725 µA IQ2_PFM SYNC/MODE = 0V,FB = 2V 160 195 µA R DSON (P) Pin-pinresistanceforPFET 395 550 m Ω R DSON (N) Pin-pinresistanceforNFET 330 500 m Ω R DSON (TC) FET resistancetemperaturecoefficient 0.5 %/C ILIM Switchpeak currentlimit(3) 620 810 1100 mA VIH Logichighinput,EN, SYNC/MODE 0.95 1.3 V VIL Logiclowinput,EN, SYNC/MODE 0.4 0.80 V FSYNC SYNC/MODE clockfrequencyrange (4) 500 1000 kHz FOSC Internaloscillatorfrequency PWM Mode 468 600 732 kHz Tmin Minimum on-timeofPFET switchin 200 nsPWM mode (1) The LM2619 isdesignedformobilephone applicationswhere turn-onaftersystempower-upiscontrolledby thesystemcontroller. Thus,itshouldbe keptinshutdownby holdingtheEN pinlowuntiltheinputvoltageexceeds2.8V. (2) The hysteresisvoltageistheminimum voltageswingon theFB pinthatcausestheinternalfeedbackand controlcircuitrytoturnthe internalPFET switchon and thenoffduringPFM mode. When resistordividersareused likeintheoperatingcircuitofFigure20,the hysteresisattheoutputwillbe thevalueofthehysteresisatthefeedbackpintimestheresistordividerratio.Inthiscase,24mV (typ)x (3) Currentlimitisbuilt-in,fixed,and notadjustable.IfthecurrentlimitisreachedwhilethevoltageattheFB pinispulledbelow0.7V,the internalPFET switchturnsofffor2.5µs toallowtheinductorcurrenttodiminish. (4) SYNC drivenwithan externalclockswitchingbetween VIN and GND. When an externalclockispresentatSYNC; theIC isforcedtobe inPWM mode attheexternalclockfrequency.The LM2619 synchronizestotherisingedge oftheexternalclock. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM2619

1.4975 1.4980 1.4985 1.4990 1.4995 1.5000 1.5005 1.5010 1.5015 0 100 200 300 400 OUTPUT CURRENT (mA) OUTPUT VOLTAGE (V) SYNC = VIN VOUT = 1.5V VIN = 4.2V VIN = 2.8V VIN = 3.6V 1.4980 1.4985 1.4990 1.4995 1.5000 1.5005 1.5010 1.5015 1.5020 1.5025 1.5030 100mA 300mA SUPPLY VOLTAGE (V) OUTPUT VOLTAGE (V) SYNC = VIN VOUT = 1.5V 0.9995 1.0000 1.0005 1.0010 1.0015 1.0020 1.0025 1.0030 1.0035 0 100 200 300 400 OUTPUT CURRENT (mA) OUTPUT VOLTAGE (V) SYNC = VIN VOUT = 1.0V VIN = 4.2V VIN = 3.6V VIN = 2.8V 100 200 300 400 500 600 700 800 PWM PFM SUPPLY VOLTAGE (V) SUPPLY CURRENT ( PA) VFB = 2V LM2619 SNVS212B –NOVEMBER 2002–REVISED MAY 2013 www.ti.com TypicalPerformance Characteristics LM2619ATL, CircuitofFigure3,VIN = 3.6V,TA = 25°C, unlessotherwisenoted. Shutdown QuiescentCurrentvs Temperature QuiescentSupply Currentvs Supply Voltage (CircuitinFigure3) Figure6. Figure7. Output Voltagevs Supply Voltage Output Voltagevs Supply Voltage (VOUT = 1.5V,PWM MODE) (VOUT = 1.5V,PFM MODE) Figure8. Figure9. Output Voltagevs Output Current Output Voltagevs Output Current (VOUT = 1.5V,PWM MODE) (VOUT = 1.5V,PFM MODE) Figure10. Figure11.

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2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 100 200 300 400 500 OUTPUT CURRENT (mA) OUTPUT VOLTAGE (V) VCON = 0V SYNC = VIN VIN = 4.2V VIN = 2.8V VIN = 3.6V LM2619 www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 TypicalPerformance Characteristics(continued) LM2619ATL, CircuitofFigure3,VIN = 3.6V,TA = 25°C, unlessotherwisenoted. Output Voltagevs Output Current Output Voltagevs Output Current (VOUT = 3.6V,PWM MODE) (VOUT = 3.6V,PWM MODE) (CircuitinFigure20) (CircuitinFigure20) Figure12. Figure13. SwitchingFrequency vs Temperature Feedback Bias Currentvs Temperature (CircuitinFigure3,PWM MODE) (CircuitinFigure3) Figure14. Figure15. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM2619

0 50 100 150 200 250 300 350 400 450 OUTPUT CURRENT (mA) EFFICIENCY (%) SYNC = VIN VOUT = 3.6V D1 = MBRM120 VIN = 3.9V VIN = 5.5V VIN = 4.2V 100 0 50 100 150 200 250 300 350 400 450 OUTPUT CURRENT (mA) EFFICIENCY (%) SYNC = VIN VOUT = 3.6V VIN = 5.5V VIN = 4.2V VIN = 3.9V 100 0 50 100 150 200 250 300 350 400 450 OUTPUT CURRENT (mA) EFFICIENCY (%) SYNC = VIN VOUT = 1.5V D1 = MBRM120 VIN = 2.8V VIN = 4.2V VIN = 3.6V VIN = 5.5V 100 0 50 100 150 200 250 300 350 400 450 OUTPUT CURRENT (mA) EFFICIENCY (%) SYNC = VIN VOUT = 1.5V VIN = 3.6V VIN = 4.2V VIN = 2.8V VIN = 5.5V LM2619 SNVS212B –NOVEMBER 2002–REVISED MAY 2013 www.ti.com TypicalPerformance Characteristics(continued) LM2619ATL, CircuitofFigure3,VIN = 3.6V,TA = 25°C, unlessotherwisenoted. Efficiencyvs Output Current Efficiencyvs Output Current (VOUT = 1.5V,PWM MODE) (VOUT = 1.5V,PWM MODE, withDiode) Figure16. Figure17. Efficiencyvs Output Current Efficiencyvs Output Current (VOUT = 3.6V,PWM MODE) (VOUT = 3.6V,PWM MODE, withDiode) (CircuitinFigure20) (CircuitinFigure20) Figure18. Figure19.

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C3* 0.1PF VIN 3.9V to 5.5V 10PH D1** 10PF VOUT 3.6V 10pF 220pF R3 68.1k 46.4k 33.2k PWM/PFM ON/OFF SYSTEM CONTROLLER LM2619 *C3 IS OPTIONAL **D1 IS OPTIONAL FOR PVIN SW EAOUTPGNDSGND SYNC/MODE EN EANEG FB V DD LM2619 www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 DEVICE INFORMATION The LM2619 isa simple,step-downDC-DC converteroptimizedforpoweringcircuitsinmobilephones,portable communicators,and similarbatterypowered RF devices.Itisbased on a current-modebuck architecture,with synchronousrectificationin PWM mode forhigh efficiency.Itisdesignedfora maximum load capabilityof 500mA inPWM mode. Maximum loadrangemay varyfromthisdependingon inputvoltage,outputvoltageand theinductorchosen. The devicehas allthreeofthepin-selectableoperatingmodes requiredforpoweringcircuitsinmobilephones and othersophisticatedportabledeviceswith complex power management needs. Fixed-frequencyPWM operationoffersfulloutputcurrentcapabilityathighefficiencywhileminimizinginterferencewithsensitiveIFand dataacquisitioncircuits.Duringstandbyoperation,hystereticPFM mode reducesquiescentcurrentto160µA typ. tomaximizebatterylife.Shutdown mode turnsthedeviceoffand reducesbatteryconsumptionto0.02µA (typ). DC PWM mode feedbackvoltageprecisionis±1%. Efficiencyistypically96% fora 200mA loadwith3.6Voutput, 3.9V input.The efficiencycan be furtherincreasedby usinga schottkydiode likeMBRM120L as shown in Figure20.PWM mode quiescentcurrentis600µA typ.The outputvoltagecan be setfrom1.5V to3.6V by using externalfeedbackresistors. Additionalfeaturesincludesoft-start,currentoverloadprotection,overvoltageprotectionand thermalshutdown protection. The LM2619 isconstructedusinga chip-scale10-pinthinDSBGA package.Thispackage offersthe smallest possiblesize,forspace-criticalapplicationssuch as cellphones, where board area isan importantdesign consideration.Use ofa highswitchingfrequency(600kHz)reducesthesizeofexternalcomponents.Board area requiredforimplementationisonly0.58in2(375mm 2). Use ofa DSBGA package requiresspecialdesignconsiderationsforimplementation.(See DSBGA PACKAGE ASSEMBLY AND USE in ApplicationInformation.)Itsfinebump-pitchrequirescarefulboard design and precisionassemblyequipment. Figure20. TypicalOperatingCircuitfor3.6VOutput Voltage CIRCUIT OPERATION ReferringtoFigure20,Figure21,Figure22,and Figure23,theLM2619 operatesas follows.Duringthefirstpart ofeach switchingcycle,thecontrolblockintheLM2619 turnson theinternalPFET switch.Thisallowscurrentto flowfromtheinputthroughtheinductortotheoutputfiltercapacitorand load.The inductorlimitsthecurrenttoa ramp witha slopeof(VIN–VOUT )/L,by storingenergyina magneticfield.Duringthesecond partofeach cycle, the controllerturnsthe PFET switchoff,blockingcurrentflow from the input,and then turnsthe NFET synchronousrectifieron. In response,the inductor'smagneticfieldcollapses,generatinga voltagethatforces currentfromgroundthroughthesynchronousrectifiertotheoutputfiltercapacitorand load.As thestoredenergy istransferredback intothecircuitand depleted,theinductorcurrentramps down witha slopeofVOUT /L.Ifthe inductorcurrentreacheszero beforethe nextcycle,the synchronousrectifieristurnedoffto preventcurrent reversal.The outputfiltercapacitorstoreschargewhen theinductorcurrentishigh,and releasesitwhen low, smoothingthevoltageacrosstheload. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM2619

1.5V REF SOFT START SGND PVINVDD EN PGND SYNC/ MODE FB ZERO CROSSING DETECTOR MOSFET CONTROL LOGIC SHUTDOWN CONTROL OSCILLATOR AND MODE CONTROL SW PFM COMP. OVP COMP. PWM COMP. CURRENT SENSE LM2619 SNVS212B –NOVEMBER 2002–REVISED MAY 2013 www.ti.com The outputvoltageisregulatedby modulatingthePFET switchon timetocontroltheaveragecurrentsenttothe load.The effectisidenticalto sendinga duty-cyclemodulated rectangularwave formed by the switchand synchronousrectifierat SW to a low-passfilterformed by the inductorand outputfiltercapacitor.The output voltageisequaltotheaveragevoltageattheSW pin. Figure21. SimplifiedFunctionalDiagram PWM OPERATION While in PWM (PulseWidth Modulation)mode, the outputvoltageis regulatedby switchingat a constant frequencyand then modulatingthe energy per cycleto controlpower to the load.Energy per cycleissetby modulatingthePFET switchon-timepulse-widthtocontrolthepeak inductorcurrent.Thisisdone by comparing thesignalfromthecurrent-senseamplifierwitha slopecompensated errorsignalfromthevoltage-feedbackerror amplifier.At the beginningof each cycle,the clockturnson the PFET switch,causingthe inductorcurrentto ramp up.When thecurrentsense signalramps pasttheerroramplifiersignal,thePWM comparatorturnsoffthe PFET switchand turnson theNFET synchronousrectifier,endingthefirstpartofthecycle.Ifan increaseinload pullsthe outputvoltagedown, the erroramplifieroutputincreases,which allowsthe inductorcurrentto ramp higherbeforethe comparatorturnsoffthe PFET. Thisincreasesthe average currentsentto the outputand adjustsfortheincreaseintheload. Beforegoingto the PWM comparator,the errorsignalissummed witha slopecompensationramp from the oscillatorforstabilityofthecurrentfeedbackloop.Duringthesecond partofthecycle,a zerocrossingdetector turnsofftheNFET synchronousrectifieriftheinductorcurrentramps tozero.The minimum on timeofthePFET inPWM mode isabout200ns.

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www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 PWM Mode SwitchingWaveform PFM Mode SwitchingWaveform A:InductorCurrent,500mA/div A:InductorCurrent,500mA/div B:SW Pin,2V/div B:SW Pin,2V/div C: VOUT ,10mV/div,AC Coupled C: VOUT ,50mV/div,AC Coupled Figure22. Figure23. PFM OPERATION Connectingthe SYNC/MODE to SGND setsthe LM2619 to hystereticPFM operation.While in PFM (Pulse FrequencyModulation)mode, theoutputvoltageisregulatedby switchingwitha discreteenergyper cycleand then modulatingthe cyclerate,or frequency,to controlpower to the load.This isdone by usingan error comparatortosense theoutputvoltage.The devicewaitsas theloaddischargestheoutputfiltercapacitor,until theoutputvoltagedropsbelowthelowerthresholdofthePFM error-comparator.Then thedeviceinitiatesa cycle by turningon the PFET switch.Thisallowscurrentto flowfrom the input,throughthe inductorto the output, chargingtheoutputfiltercapacitor.The PFET isturnedoffwhen theoutputvoltagerisesabove theregulation thresholdof the PFM errorcomparator.Thus, the outputvoltageripplein PFM mode isproportionalto the hysteresisoftheerrorcomparator. In PFM mode, the deviceonlyswitchesas needed to servicethe load.This lowerscurrentconsumptionby reducingpower consumed duringthe switchingactionin the circuit,due to transitionlossesin the internal MOSFETs, gate drivecurrents,eddy currentlossesin the inductor,etc.Italso improveslight-loadvoltage regulation.During the second halfof the cycle,the intrinsicbody diode of the NFET synchronousrectifier conductsuntiltheinductorcurrentramps tozero. OPERATING MODE SELECTION The LM2619 isdesignedfordigitalcontroloftheoperatingmodes by thesystem controller.Thispreventsthe spuriousswitchover from low-noisePWM mode between transmissionintervalsinmobilephone applications thatcan occurinotherproducts. The SYNC/MODE digitalinputpinisused toselecttheoperatingmode. SettingSYNC/MODE high(above1.3V) selects600kHz current-modePWM operation.PWM mode isoptimizedforlow-noise,high-poweroperationfor use when the load is active.SettingSYNC/MODE low (below 0.4V) selectshystereticvoltage-modePFM operation.PFM mode isoptimizedforreducingpower consumptionand extendingbatterylifewhen theloadisin a low-powerstandbymode. InPFM mode, quiescentcurrentintotheVDD pinis160µA typ.Incontrast,PWM mode VDD -pinquiescentcurrentis600µA typ. PWM operationisintendedforuse withloadsof 50mA or more, when low noiseoperationisdesired.Below 100mA, PFM operationcan be used toallowpreciseregulation,and reducedcurrentconsumption.The LM2619 has an over-voltagefeaturethatpreventstheoutputvoltagefromrisingtoohigh,when thedeviceisleftinPWM mode underlow-loadconditions.See OvervoltageProtection,formore information. Switch modes with the SYNC/MODE pin,using a signalwith a slew ratefasterthan 5V/100µs. Use a comparator,SchmitttriggerorlogicgatetodrivetheSYNC/MODE pin.Do notleavethepinfloatingorallowitto lingerbetween thresholds.These measures willpreventoutputvoltageerrorsinresponseto an indeterminate logicstate.The LM2619 switcheson each risingedge of SYNC. Ensure a minimum loadto keep the output voltageinregulationwhen switchingmodes frequently. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM2619

SNVS212B –NOVEMBER 2002–REVISED MAY 2013 www.ti.com FREQUENCY SYNCHRONIZATION The SYNC/MODE inputcan alsobe used forfrequencysynchronization.Duringsynchronization,the LM2619 initiatescycleson the risingedge of the clock.When synchronizedto an externalclock,itoperatesinPWM mode. The devicecan synchronizeto a 50% duty-cycleclockover frequenciesfrom 500kHz to 1MHz. Ifa differentdutycycleisused otherthan50% therangeforacceptabledutycyclesis30% to70%. Use thefollowingwaveform and dutycycleguidelineswhen applyingan externalclocktotheSYNC/MODE pin. Clockunder/overshootshouldbe lessthan100mV below GND orabove VDD .When applyingnoisyclocksignals, especiallysharp edged signalsfrom a long cableduringevaluation,terminatethe cableat itscharacteristic impedance and add an RC filtertotheSYNC pin,ifnecessary,tosoftentheslewrateand over/undershoot.Note thatsharpedged signalsfroma pulseorfunctiongeneratorcan developunder/overshootas highas 10V atthe end ofan improperlyterminatedcable. OVERVOLTAGE PROTECTION The LM2619 has an over-voltagecomparatorthatpreventsthe outputvoltagefrom risingtoo highwhen the deviceisleftinPWM mode underlow-loadconditions.When theoutputvoltagerisesby about100mV (Figure3) overitsregulationthreshold,theOVP comparatorinhibitsPWM operationtoskippulsesuntiltheoutputvoltage returnstotheregulationthreshold.When resistordividersare used theOVP thresholdattheoutputwillbe the valueof the thresholdat the feedbackpin timesthe resistordividerratio.In over voltageprotection,output voltageand ripplewillincrease. SHUTDOWN MODE Settingthe EN digitalinputpin low (<0.4V) placesthe LM2619 in a 0.02µA (typ)shutdown mode. During shutdown,thePFET switch,NFET synchronousrectifier,reference,controland biascircuitryoftheLM2619 are turnedoff.SettingEN highenablesnormaloperation.Whileturningon,softstartisactivated. EN shouldbe setlow to turnoffthe LM2619 duringsystem power-up and undervoltageconditionswhen the supply is less than the 2.8V minimum operatingvoltage.The LM2619 is designed forcompact portable applications,such as mobile phones. In such applications,the system controllerdeterminespower supply sequencing.AlthoughtheLM2619 istypicallywellbehaved atlowinputvoltages,thisisnotspecified. INTERNAL SYNCHRONOUS RECTIFICATION WhileinPWM mode, theLM2619 uses an internalNFET as a synchronousrectifiertoreducerectifierforward voltagedrop and associatedpower loss.Synchronous rectificationprovidesa significantimprovement in efficiencywhenever theoutputvoltageisrelativelylow compared tothevoltagedropacrossan ordinaryrectifier diode. The internalNFET synchronousrectifieristurnedon duringtheinductorcurrentdown slopeduringthesecond partofeach cycle.The synchronousrectifieristurnedoffpriortothenextcycle,or when theinductorcurrent ramps tozeroatlightloads.The NFET isdesignedtoconductthroughitsintrinsicbody diodeduringtransient intervalsbeforeitturnson,eliminatingtheneed foran externaldiode. CURRENT LIMITING A currentlimitfeatureallowstheLM2619 toprotectitselfand externalcomponents duringoverloadconditions.In PWM mode cycle-by-cyclecurrentlimitisnormallyused.Ifan excessiveloadpullsthevoltageatthefeedback pindown toapproximately0.7V,thenthedeviceswitchestoa timedcurrentlimitmode. Intimedcurrentlimit mode the internalP-FET switchisturnedoffafterthe currentcomparatortripsand the beginningof the next cycleisinhibitedfor2.5µs to forcethe instantaneousinductorcurrentto ramp down to a safevalue.Timed currentlimitmode preventsthelossofcurrentcontrolseen insome productswhen thevoltageatthefeedback pinispulledlowinseriousoverloadconditions.

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VIN = 3.6V VOUT = 1.5V SYNC = VIN

20 Ps/DIV

AC Coupled4.0V 3.0V VIN VOUT VOUT = 1.5V VIN = 3.0V to 4.0V, tr = tf = 10 Ps IOUT = 100 mA SYNC = VIN LM2619 www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 DROPOUT CONSIDERATIONS The LM2619 can be used to providefixedoutputvoltagesby usingexternalfeedbackresistors.The output where theoutputvoltageissethigherthan2.5V,thepartwillgo intodropoutor100% dutycyclewhen theinput voltagegetsclosetothesetoutputvoltage.Near dropouttheon timeoftheP-FET may exceed one PWM clock cycleand cause higherrippleon theoutputforloadcurrentsgreaterthan450mA. Thisincreasedripplewillexist fora narrowrangeofinputvoltagesclosetothe100% dutycycleand once theinputvoltagegoes down further theP-FET willbe fullyon.See SETTING THE OUTPUT VOLTAGE inApplicationInformationforfurtherdetails. IndropoutconditionstheoutputvoltageisVIN − IOUT (Rdc + R DSON (P))where Rdc istheseriesresistanceofthe inductorand R DSON (P)istheon resistanceofthePFET. Load TransientResponse LineTransientResponse (CircuitinFigure3) (CircuitinFigure3) Figure24. Figure25. SOFT-START The LM2619 has softstartto reduce currentinrushduringpower-up and startup.Thisreducesstresson the LM2619 and externalcomponents. Italso reduces startuptransientson the power source.Soft startis implementedby rampingup thereferenceinputtotheerroramplifieroftheLM2619 tograduallyincreasethe outputvoltage. THERMAL SHUTDOWN PROTECTION The LM2619 has a thermalshutdown protectionfunctiontoprotectitselffrom short-termmisuse and overload conditions.When thejunctiontemperatureexceeds 150°C thedeviceturnsofftheoutputstageand when the temperaturedropsbelow 130°C itinitiatesa softstartcycle.Prolongedoperationinthermalshutdown conditions may damage thedeviceand isconsideredbad practice. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM2619

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APPLICATION INFORMATION

SETTING THE OUTPUT VOLTAGE The LM2619 can be used withexternalfeedbackresistorstosettheoutputvoltage.SelectthevalueofR2 to allowatleast100 timesthefeedbackpinbiascurrenttoflowthroughit. VOUT = VFB (1+R1/R2) EXTERNAL COMPENSATION The LM2619 uses externalcomponents connectedtotheEANEG and EAOUT pinstocompensate theregulator (Figure20).Typically,allthatisrequiredisa seriesconnectionofone capacitor(C4)and one resistor(R3).A capacitor(C5)can be connectedacrosstheEANEG and EAOUT pinstoimprovethenoiseimmunityoftheloop. C5 reactswithR3 togivea highfrequencypole.C4 reactswiththehighopen loopgainoftheerroramplifierand theresistanceattheEANEG pintocreatethedominantpoleforthesystem,whileR3 and C4 reacttocreatea zerointhefrequencyresponse.The polerollsofftheloopgain,togivea bandwidthsomewhere between 10kHz and 50kHz,thisavoidsa 100kHz parasiticpolecontributedby thecurrentmode controller.Typicalvaluesinthe 220pF to1nF (C4)rangearerecommended tocreatea poleon theorderof10Hz orless. The nextdominantpoleinthesystem isformedby theoutputcapacitance(C2)and theparallelcombinationof the load resistanceand the effectiveoutputresistanceof the regulator.This combined resistance(Ro) is dominatedby thesmallsignaloutputresistance,whichistypicallyintherangeof3Ω to15Ω.The exactvalueof thisresistance,and thereforethisloadpoledepends on thesteadystatedutycycleand theinternalramp value. Ideallywe want thezeroformedby R3 and C4 tocancelthisloadpole,such thatR3=RoC2/C4. Due tothelarge variationinRo, thisidealcase can onlybe achievedat one operatingcondition.Thereforea compromise of about5Ω forRo shouldbe used todeterminea startingvalueforR3. Thisvaluecan thenbe optimizedon the bench togivethebesttransientresponsetoloadchanges,underallconditions.Typicalvaluesare10pF forC5, 220pF to1nF forC4 and 22K to100K forR3. AO = 20000 ,Open loopgainoferroramplifier R f = 1 ,Transresistanceofoutputstage M c = 362000 A/s,Correctiveramp slope D = VOUT/VIN ,D'= 1-D ,dutycycle M 1 = (VIN-VOUT)/L1 ,slopeofcurrentthroughinductorduringPFET on time R p = (R1 ∥ R2) + 5kΩ ,effectiveresistanceatinvertinginputoferroramp R o = (F•L1)/(D'•(Mc/M1)+½ -D) where R o istheeffectivesmallsignaloutputresistanceofpower stage fP1 = 1/(2•π •AO •R p •C4) ,lowfrequencypole fP2 = 1/(2 •π •(Rload∥ R o)•C2) ,poledue toRload,Ro and C2 fP3 = R o/(2•π •L1),highfrequencypolefromcurrentmode control fP4 = 1/(2•π •R3 •C5) ,highfrequencypoledue toR3 and C5 fZ1 = 1/(2•π •R3 •C4) ,zerodue toR3 and C4 α = R2/(R1+ R2) fX = (α •(Ro ∥ Rload)/Rf)/(2•π •R p •C4) where fX givestheapproximatecrossoverfrequency.Thisequationforcrossoverfrequencyassumes thatfP2 = fZ1. INDUCTOR SELECTION Use a 10µH inductorwithsaturationcurrentratinghigherthan the peak currentratingof the device.The inductor'sresistanceshould be lessthan 0.3Ω forgood efficiency.Table 2 listssuggested inductorsand suppliers.

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www.ti.com SNVS212B –NOVEMBER 2002–REVISED MAY 2013 Table2.Suggested Inductorsand TheirSuppliers PartNumber Vendor Phone FAX DO1608C-103 Coilcraft 847-639-6400 847-639-1469 ELL6SH100M Panasonic 714-373-7366 714-373-7323 ELL6RH100M Panasonic 714-373-7366 714-373-7323 CDRH5D18-100 Sumida 847-956-0666 847-956-0702 P0770.103T Pulse 858-674-8100 858-674-8262 For low-costapplications,an unshieldedinductoris suggested.For noise criticalapplications,a toroidalor shieldedinductorshouldbe used.A good practiceisto layout the board withfootprintsaccommodating both typesfordesignflexibility.Thisallowssubstitutionofa low-noiseshieldedinductor,intheeventthatnoisefrom low-costunshieldedmodels isunacceptable. The saturationcurrentratingis the currentlevelbeyond which an inductorlosesitsinductance.Different manufacturersspecifythesaturationcurrentratingdifferently.Some specifysaturationcurrentpointtobe when inductorvaluefalls30% fromitsoriginalvalue,othersspecify10%. Itisalwaysbettertolookattheinductance versuscurrentcurveand make suretheinductorvaluedoesn’tfallbelow 30% atthepeak currentratingofthe LM2619. Beyond thisrating,theinductorlosesitsabilitytolimitcurrentthroughthePWM switchtoa ramp.This can cause poor efficiency,regulationerrorsor stresstoDC-DC convertersliketheLM2619. Saturationoccurs when the magneticfluxdensityfrom currentthroughthe windingsof the inductorexceeds what the inductor’s corematerialcan supportwitha correspondingmagneticfield. CAPACITOR SELECTION Use a 10µF ceramicinputcapacitor.Use X7R orX5R types,do notuse Y5V. Use oftantalumcapacitorsisnotrecommended. Ceramic capacitorsprovidean optimalbalancebetween smallsize,cost,reliabilityand performanceforcell phones and similarapplications.A 22µF ceramicoutputcapacitorisrecommended forapplicationsthatrequire increasedtolerancetoheavy loadtransients.A 10µF ceramicoutputcapacitorcan be used inapplicationswhere theworstcase loadtransientstepislessthan200mA. Use ofa 10µF outputcapacitortradesoffsmallersizefor an increaseinoutputvoltageripple,and undershootduringloadtransients.Table3 listssuggestedcapacitors and suppliers. The inputfiltercapacitorsuppliescurrenttothePFET switchoftheLM2619 inthefirstpartofeach cycleand reducesvoltagerippleimposed on theinputpower source.The outputfiltercapacitorsmooths outcurrentflow fromtheinductortotheload,helpsmaintaina steadyoutputvoltageduringtransientloadchanges and reduces outputvoltageripple.These capacitorsmust be selectedwithsufficientcapacitanceand sufficientlylow ESR to performthesefunctions. The ESR, orequivalentseriesresistance,ofthefiltercapacitorsisa majorfactorinvoltageripple. Table3.Suggested Capacitorsand TheirSuppliers Model Type Vendor Phone FAX C1, C2 (Inputor Output FilterCapacitor) C2012X5ROJ106M Ceramic TDK 847-803-6100 847-803-6296 JMK212BJ106MG Ceramic Taiyo-Yuden 847-925-0888 847-925-0899 ECJ3YB0J106K Ceramic Panasonic 714-373-7366 714-373-7323 JMK325BJ226MM Ceramic Taiyo-Yuden 847-925-0888 847-925-0899 C3225X5RIA226M Ceramic TDK 847-803-6100 847-803-6296 DSBGA PACKAGE ASSEMBLY AND USE Use oftheDSBGA package requiresspecializedboardlayout,precisionmountingand carefulreflowtechniques, as detailedin applicationnote AN-1112. Refer to the sectionSurfaceMount Technology (SMT) Assembly Considerations. For bestresultsinassembly,alignmentordinalson the PC board shouldbe used to facilitate placementofthedevice. Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM2619

SNVS212B –NOVEMBER 2002–REVISED MAY 2013 www.ti.com The pad styleused withDSBGA package must be theNSMD (non-soldermask defined)type.Thismeans that thesolder-maskopeningislargerthanthepad size.Thispreventsa lipthatotherwiseformsifthesolder-mask and pad overlap,from holdingthe deviceoffthe surfaceof the board and interferingwithmounting.See applicationnoteAN-1112 forspecificinstructionshow todo this. The 10-Bump package used forthe LM2619 has 300 micron solderballsand requires10.82milpads for mountingon the circuitboard.The traceto each pad shouldenterthe pad witha 90° entryangleto prevent debrisfrom beingcaughtindeep corners.Initially,thetracetoeach pad shouldbe 6–7milwide,fora section approximately6millong,as a thermalrelief.Then each traceshouldneck up or down toitsoptimalwidth.The importantcriterionissymmetry.Thisensuresthesolderbumps on theLM2619 reflowevenlyand thatthedevice soldersleveltotheboard.Inparticular,specialattentionmust be paidtothepads forbumps D3 –B3. Because PGND and PVIN aretypicallyconnectedtolargecopperplanes,inadequatethermalreliefscan resultinlateor inadequatereflowofthesebumps. The DSBGA package isoptimizedforthe smallestpossiblesizein applicationswithred or infraredopaque cases.Because the DSBGA package lacksthe plasticencapsulationcharacteristicof largerdevices,itis vulnerableto light.Backsidemetalizationand/orepoxy coating,along withfront-sideshadingby the printed circuitboard,reducethissensitivity. BOARD LAYOUT CONSIDERATIONS PC boardlayoutisan importantpartofDC-DC converterdesign.Poor boardlayoutcan disrupttheperformance ofa DC-DC converterand surroundingcircuitryby contributingtoEMI, groundbounce,and resistivevoltageloss in the traces.These can send erroneoussignalsto the DC-DC converterIC,resultingin poor regulationor instability.Poor layoutcan alsoresultin reflowproblems leadingto poor solderjointsbetween the DSBGA package and boardpads.Poor solderjointscan resultinerraticordegradedperformance. Good layoutfortheLM2619 can be implementedby followinga few simpledesignrules. wide,approximately7 millongtraces,and thenincrementallyincreaseeach tracetoitsoptimalwidth.The importantcriterionissymmetry to ensure the solderbumps on the LM2619 reflowevenly(see DSBGA Package Assembly and Use). 2. Place the LM2619, inductorand filtercapacitorsclosetogetherand make the tracesshort.The traces between thesecomponents carryrelativelyhighswitchingcurrentsand actas antennas.Followingthisrule reducesradiatednoise.Placethecapacitorsand inductorwithin0.2in.(5mm) oftheLM2619. 3. Arrangethecomponents so thattheswitchingcurrentloopscurlinthesame direction.Duringthefirsthalfof each cycle,currentflowsfromtheinputfiltercapacitor,throughtheLM2619 and inductortotheoutputfilter capacitorand back throughground,forminga currentloop.Inthesecond halfofeach cycle,currentispulled up from ground,throughthe LM2619 by the inductor,to the outputfiltercapacitorand then back through ground,forminga second currentloop.Routingthese loopsso the currentcurlsin the same direction preventsmagneticfieldreversalbetween thetwo half-cyclesand reducesradiatednoise. 4. Connect the ground pins of the LM2619, and filtercapacitorstogetherusing generous component-side copperfillas a pseudo-groundplane.Then, connectthistotheground-plane(ifone isused)withseveral vias.This reduces ground-planenoiseby preventingthe switchingcurrentsfrom circulatingthroughthe groundplane.Italsoreducesgroundbounce attheLM2619 by givingita low-impedancegroundconnection. 5. Use wide tracesbetween thepower components and forpower connectionstotheDC-DC convertercircuit. Thisreducesvoltageerrorscaused by resistivelossesacrossthetraces. 6. Route noisesensitivetraces,such as thevoltagefeedbackpath,away fromnoisytracesbetween thepower components.The voltagefeedbacktracemust remain closeto the LM2619 circuitand shouldbe routed directlyfromVOUT attheoutputcapacitorand shouldbe routedoppositetonoisecomponents.Thisreduces EMI radiatedontotheDC-DC converter'sown voltagefeedbacktrace. 7. Placenoisesensitivecircuitry,such as radioIFblocks,away fromtheDC-DC converter,CMOS digitalblocks and othernoisycircuitry.Interferencewithnoise-sensitivecircuitryinthe system can be reduced through distance. Inmobilephones,forexample,a common practiceistoplacetheDC-DC converteron one corneroftheboard, arrange the CMOS digitalcircuitryaround it(sincethisalso generatesnoise),and then place sensitive preamplifiersand IF stageson the diagonallyopposingcorner.Often,the sensitivecircuitryisshieldedwitha metalpan and power toitispost-regulatedtoreduceconductednoise,usinglow-dropoutlinearregulators.

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REVISION HISTORY

Changes from RevisionA (May 2013)toRevisionB Page Copyright© 2002–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM2619

www.ti.com 16-Oct-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM2619ATL/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -25 to 85 S76A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com 16-Oct-2015 Addendum-Page 2

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2619ATL/NOPB DSBGA YPA 10 250 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 Pack Materials-Page 2

www.ti.com TLP10XXX (Rev D) A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. 4215069/A 12/12 NOTES: 0.600 ±0.075 E D D: Max = E: Max = 2.556 mm, Min = 2.302 mm, Min = 2.495 mm 2.241 mm

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