LM2619 NSC | Alldatasheet
Document overview
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Technical content
Features
n Sub-miniature 10-bump thin micro SMD package n Uses small ceramic capacitors n 5mV typ PWM mode output voltage ripple(C OUT = 22µF) n Internal soft start n Current overload protection n Thermal Shutdown n External compensation
Applications
LM2619 500mA Sub-Miniature Step-Down DC-DC Converter © 2002 National Semiconductor Corporation DS200574 www.national.com
Ordering Information
Order Number Package Type NSC Package Marking (*) Supplied As LM2619ATL 10-bump Wafer Level Chip Scale (micro SMD) XYTT S76A 250 Tape and Reel LM2619ATLX XYTT S76A 3000 Tape and Reel (*) XY - denotes the date code marking (2 digit) in production (*) TT - refers to die run/lot traceability for production (*) S - product line designator Package markings may change over the course of production. Pin Description Pin Number Pin Name Function A1 FB Feedback Analog Input. B1 EANEG Inverting input of error amplifier. C1 EAOUT Output of error amplifier. D1 SYNC/MODE Synchronization Input. Use this digital input for frequency selection or modulation control. Set: SYNC/MODE = high for low-noise 600kHz PWM mode SYNC/MODE = low for low-current PFM mode SYNC/MODE = a 500kHz–1MHz external clock for synchronization in PWM mode. (See Synchronization and Operating Modesin the Device Informationsection.) D2 EN Enable Input. Set this Schmitt trigger digital input high for normal operation. For shutdown, set low. Set EN low during system power-up and other low supply voltage conditions. (See Shutdown Modein the Device Informationsection.) D3 PGND Power Ground. C3 SW Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the max Switch Peak Current Limit of the LM2619. B3 PVIN Power Supply Voltage Input to the internal PFET switch. Connect to the input filter capacitor. A3 VDD Analog Supply Input. If board layout is not optimum, an optional 0.1µF ceramic capacitor is suggested. A2 SGND Analog and Control Ground. LM2619 www.national.com3
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. PVIN, VDD to SGND −0.2V to +6V PGND to SGND, PVIN to VDD −0.2V to +0.2V EN, EAOUT, EANEG, SYNC/MODE to SGND −0.2V to +6V FB, SW (GND −0.2V) to (VDD +0.2V) Storage Temperature Range −45˚C to +150˚C Lead Temperature (Soldering, 10 sec.) 260˚C Junction Temperature (Note 2) −25˚C to +125˚C Minimum ESD Rating ±2k V (Human Body Model, C = 100 pF, R = 1.5 k Ω) Thermal Resistance (θJA) (Note 3) 140˚C/W
Electrical Characteristics
Specifications with standard typeface are for T A =T J = 25˚C, and those in boldface type apply over the full Operating Tem- perature Range of TA =T J = −25˚C to +85˚C. Unless otherwise specified, PVIN = VDD = EN = SYNC/MODE = 3.6V. Symbol Parameter Conditions Min Typ Max Units VIN Input Voltage Range PVIN = VDD = V IN (Note 4) 2.8 3.6 5.5 V VFB Feedback Voltage 1.485 1.50 1.515 V VHYST PFM Comparator Hysteresis Voltage PFM Mode (SYNC/MODE = 0V) (Note 5) 24 mV ISHDN Shutdown Supply Current VIN = 3.6V, EN = 0V 0.02 3 µA IQ1_PWM DC Bias Current into VDD SYNC/MODE = VIN F B=2 V 600 725 µA IQ2_PFM SYNC/MODE = 0V F B=2 V 160 195 µA RDSON (P) Pin-Pin Resistance for P FET 395 550 m Ω RDSON (N) Pin-Pin Resistance for N FET 330 500 m Ω RDSON (TC) FET Resistance Temperature Coefficient 0.5 %/C ILIM Switch Peak Current Limit (Note 6) 620 810 1000 mA VIH Logic High Input, EN, SYNC/MODE 0.95 1.3 V VIL Logic Low Input, EN, SYNC/MODE 0.4 0.80 V FSYNC SYNC/MODE Clock Frequency Range (Note 7) 500 1000 kHz FOSC Internal Oscillator Frequency PWM Mode 468 600 732 kHz Tmin Minimum ON-Time of PFET Switch in PWM Mode 200 ns Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but device specifications may not be guaranteed. For guaranteed specifications and associated test conditions, see the Min and Max limits and Conditions in the Electrical Characteristics table. Typical (typ) specifications are mean or average values at 25˚C and are not guaranteed. Note 2: Thermal shutdown will occur if the junction temperature exceeds 150˚C. Note 3: Thermal resistance specified with 2 layer PCB (0.5/0.5 oz. cu). Note 4: The LM2619 is designed for mobile phone applications where turn-on after system power-up is controlled by the system controller. Thus, it should be ke pt in shutdown by holding the EN pin low until the input voltage exceeds 2.8V. Note 5: The hysteresis voltage is the minimum voltage swing on the FB pin that causes the internal feedback and control circuitry to turn the internal PFET swit ch on and then off during PFM mode. When resistor dividers are used like in the operating circuit of Figure 4, the hysteresis at the output will be the value of the Note 6: Current limit is built-in, fixed, and not adjustable. If the current limit is reached while the voltage at the FB pin is pulled below 0.7V, the internal PFET switch turns off for 2.5µs to allow the inductor current to diminish. Note 7: SYNC driven with an external clock switching between V IN and GND. When an external clock is present at SYNC; the IC is forced to be in PWM mode at the external clock frequency. The LM2619 synchronizes to the rising edge of the external clock. LM2619 www.national.com 4
Typical Performance Characteristics LM2619ATL, Circuit of Figure 3,V IN = 3.6V, T A = 25˚C, un- less otherwise noted. Quiescent Supply Current vs Supply Voltage Shutdown Quiescent Current vs Temperature (Circuit in Figure 3) 20057408 20057422 Output Voltage vs Supply Voltage (VOUT = 1.5V, PWM MODE) Output Voltage vs Supply Voltage (VOUT = 1.5V, PFM MODE) 20057409 20057410 Output Voltage vs Output Current (VOUT = 1.5V, PWM MODE) Output Voltage vs Output Current (VOUT = 1.5V, PFM MODE) 20057411 20057413 LM2619 www.national.com5
Typical Performance CharacteristicsLM2619ATL, Circuit of Figure 3,V IN = 3.6V, T A = 25˚C, unless otherwise noted. (Continued) Output Voltage vs Output Current (VOUT = 3.6V, PWM MODE) (Circuit in Figure 4) Dropout Voltage vs Output Current (VOUT = 3.6V, PWM MODE) (Circuit in Figure 4) 20057432 20057412 Switching Frequency vs Temperature (Circuit in Figure 3, PWM MODE) Feedback Bias Current vs Temperature (Circuit in Figure 3) 20057423 20057431 LM2619 www.national.com 6
Typical Performance CharacteristicsLM2619ATL, Circuit of Figure 3,V IN = 3.6V, T A = 25˚C, unless otherwise noted. (Continued) Efficiency vs Output Current (VOUT = 1.5V, PWM MODE) Efficiency vs Output Current (VOUT = 1.5V, PWM MODE, with Diode) 20057415 20057416 Efficiency vs Output Current (VOUT = 3.6V, PWM MODE) (Circuit in Figure 4) Efficiency vs Output Current (VOUT = 3.6V, PWM MODE, with Diode) (Circuit in Figure 4) 20057417 20057418 Device Information The LM2619 is a simple, step-down DC-DC converter opti- mized for powering circuits in mobile phones, portable com- municators, and similar battery powered RF devices. It is based on a current-mode buck architecture, with synchro- nous rectification in PWM mode for high efficiency. It is designed for a maximum load capability of 500mA in PWM mode. Maximum load range may vary from this depending on input voltage, output voltage and the inductor chosen. The device has all three of the pin-selectable operating modes required for powering circuits in mobile phones and other sophisticated portable devices with complex power management needs. Fixed-frequency PWM operation offers full output current capability at high efficiency while minimiz- ing interference with sensitive IF and data acquisition cir- cuits. During standby operation, hysteretic PFM mode re- duces quiescent current to 160µA typ. to maximize battery life. Shutdown mode turns the device off and reduces battery consumption to 0.02µA (typ). DC PWM mode feedback voltage precision is ±1%. Effi- ciency is typically 96% for a 200mA load with 3.6V output, 3.9V input. The efficiency can be further increased by using a schottky diode like MBRM120L as shown inFigure 4. PWM mode quiescent current is 600µA typ. The output voltage can be set from 1.5V to 3.6V by using external feedback resis- tors. Additional features include soft-start, current overload pro- tection, over voltage protection and thermal shutdown pro- tection. The LM2619 is constructed using a chip-scale 10-pin thin micro SMD package. This package offers the smallest pos- sible size, for space-critical applications such as cell phones, where board area is an important design consideration. Use of a high switching frequency (600kHz) reduces the size of LM2619 www.national.com7
tion is only 0.58in 2 (375mm2). switch on time to control the average current sent to the load. average voltage at the SW pin. FIGURE 4. Typical Operating Circuit for 3.6V Output Voltage
Device Information (Continued) PFM OPERATION Connecting the SYNC/MODE to SGND sets the LM2619 to hysteretic PFM operation. While in PFM (Pulse Frequency Modulation) mode, the output voltage is regulated by switch- ing with a discrete energy per cycle and then modulating the cycle rate, or frequency, to control power to the load. This is done by using an error comparator to sense the output voltage. The device waits as the load discharges the output filter capacitor, until the output voltage drops below the lower threshold of the PFM error-comparator. Then the device initiates a cycle by turning on the PFET switch. This allows current to flow from the input, through the inductor to the output, charging the output filter capacitor. The PFET is turned off when the output voltage rises above the regulation threshold of the PFM error comparator. Thus, the output voltage ripple in PFM mode is proportional to the hysteresis of the error comparator. In PFM mode, the device only switches as needed to service the load. This lowers current consumption by reducing power consumed during the switching action in the circuit, due to transition losses in the internal MOSFETs, gate drive cur- rents, eddy current losses in the inductor, etc. It also im- proves light-load voltage regulation. During the second half of the cycle, the intrinsic body diode of the NFET synchro- nous rectifier conducts until the inductor current ramps to zero. OPERATING MODE SELECTION The LM2619 is designed for digital control of the operating modes by the system controller. This prevents the spurious switch over from low-noise PWM mode between transmis- sion intervals in mobile phone applications that can occur in other products. The SYNC/MODE digital input pin is used to select the operating mode. Setting SYNC/MODE high (above 1.3V) selects 600kHz current-mode PWM operation. PWM mode is optimized for low-noise, high-power operation for use when the load is active. Setting SYNC/MODE low (below 0.4V) selects hysteretic voltage-mode PFM operation. PFM mode is optimized for reducing power consumption and extending battery life when the load is in a low-power standby mode. In PFM mode, quiescent current into the V DD pin is 160µA typ. In contrast, PWM mode VDD-pin quiescent current is 600µA typ. PWM operation is intended for use with loads of 50mA or more, when low noise operation is desired. Below 100mA, PFM operation can be used to allow precise regulation, and reduced current consumption. The LM2619 has an over-voltage feature that prevents the output voltage from rising too high, when the device is left in PWM mode under low-load conditions. See Overvoltage Protection, for more information. Switch modes with the SYNC/MODE pin, using a signal with a slew rate faster than 5V/100µs. Use a comparator, Schmitt trigger or logic gate to drive the SYNC/MODE pin. Do not leave the pin floating or allow it to linger between thresholds. These measures will prevent output voltage errors in re- sponse to an indeterminate logic state. The LM2619 switches on each rising edge of SYNC. Ensure a minimum load to keep the output voltage in regulation when switching modes frequently. FREQUENCY SYNCHRONIZATION The SYNC/MODE input can also be used for frequency synchronization. During synchronization, the LM2619 ini- tiates cycles on the rising edge of the clock. When synchro- nized to an external clock, it operates in PWM mode. The device can synchronize to a 50% duty-cycle clock over frequencies from 500kHz to 1MHz. If a different duty cycle is used other than 50% the range for acceptable duty cycles is 30% to 70%. Use the following waveform and duty cycle guidelines when applying an external clock to the SYNC/MODE pin. Clock under/overshoot should be less than 100mV below GND or above V DD. When applying noisy clock signals, especially sharp edged signals from a long cable during evaluation, terminate the cable at its characteristic impedance and add an RC filter to the SYNC pin, if necessary, to soften the slew rate and over/undershoot. Note that sharp edged signals from a pulse or function generator can develop under/overshoot as high as 10V at the end of an improperly terminated cable. OVERVOLTAGE PROTECTION The LM2619 has an over-voltage comparator that prevents the output voltage from rising too high when the device is left in PWM mode under low-load conditions. When the output voltage rises by about 100mV ( Figure 3) over its regulation threshold, the OVP comparator inhibits PWM operation to skip pulses until the output voltage returns to the regulation threshold. When resistor dividers are used the OVP thresh- old at the output will be the value of the threshold at the feedback pin times the resistor divider ratio. In over voltage protection, output voltage and ripple will increase. SHUTDOWN MODE Setting the EN digital input pin low ( <0.4V) places the LM2619 in a 0.02µA (typ) shutdown mode. During shutdown, the PFET switch, NFET synchronous rectifier, reference, control and bias circuitry of the LM2619 are turned off. Setting EN high enables normal operation. While turning on, soft start is activated. EN should be set low to turn off the LM2619 during system power-up and undervoltage conditions when the supply is PFM Mode Switching Waveform 20057426 A: Inductor Current, 500mA/div B: SW Pin, 2V/div C: V OUT, 50mV/div, AC Coupled FIGURE 7. LM2619 www.national.com 10
Application Information
SETTING THE OUTPUT VOLTAGE The LM2619 can be used with external feedback resistors to set the output voltage.Select the value of R2 to allow atleast 100 times the feedback pin bias current to flow through it. V OUT=V FB (1+R1/R2) EXTERNAL COMPENSATION The LM2619 uses external components connected to the EANEG and EAOUT pins to compensate the regulator ( Fig- ure 4). Typically, all that is required is a series connection of one capacitor (C4) and one resistor (R3). A capacitor (C5) can be connected across the EANEG and EAOUT pins to improve the noise immunity of the loop. C5 reacts with R3 to give a high frequency pole. C4 reacts with the high open loop gain of the error amplifier and the resistance at the EANEG pin to create the dominant pole for the system, while R3 and C4 react to create a zero in the frequency response. The pole rolls off the loop gain, to give a bandwidth somewhere between 10kHz and 50kHz, this avoids a 100kHz parasitic pole contributed by the current mode controller. Typical val- ues in the 220pF to 1nF (C4) range are recommended to create a pole on the order of 10Hz or less. The next dominant pole in the system is formed by the output capacitance (C2) and the parallel combination of the load resistance and the effective output resistance of the regula- tor. This combined resistance (Ro) is dominated by the small signal output resistance, which is typically in the range of 3Ω to 15Ω. The exact value of this resistance, and therefore this load pole depends on the steady state duty cycle and the internal ramp value. Ideally we want the zero formed by R3 and C4 to cancel this load pole, such that R3=RoC2/C4. Due to the large variation in Ro, this ideal case can only be achieved at one operating condition. Therefore a compro- mise of about 5 Ω for Ro should be used to determine a starting value for R3. This value can then be optimized on the bench to give the best transient response to load changes, under all conditions. Typical values are 10pF for C5, 220pF to 1nF for C4 and 22K to 100K for R3. A O = 20000 , Open loop gain of error amplifier Rf = 1 , Transresistance of output stage Mc = 362000 A/s , Corrective ramp slope D = VOUT/VIN , D’ = 1-D , duty cycle M 1 = (VIN - VOUT)/L1 , slope of current through inductor during PFET on time Rp = (R1 i R 2 )+5 kΩ , effective resistance at inverting input of error amp where R o is the effective small signal output resistance of power stage fP1 = 1/(2 π AO Rp C4) , low frequency pole fP2 = 1/( 2 π (Rload i Ro) C2) , pole due to Rload,Ro and fP3 =R o/( 2 π L1) , high frequency pole from current mode control fP4 = 1/(2 π R3 C5) , high frequency pole due to R3 and fZ1 = 1/(2 π R3 C4) , zero due to R3 and C4 α = R2/(R1+ R2) fX =( α (Ro i Rload)/Rf)/(2 π Rp C4) where f X gives the approximate crossover frequency.This equation for crossover frequency assumes that f P2 =f Z1. INDUCTOR SELECTION Use a 10µH inductor with saturation current rating higher than the peak current rating of the device. The inductor’s resistance should be less than 0.3 Ω for good efficiency. Table 1lists suggested inductors and suppliers. TABLE 1. Suggested Inductors and Their Suppliers Use of tantalum capacitors is not recommended. 2 lists suggested capacitors and suppliers.
transient load changes and reduces output voltage ripple. tance and sufficiently low ESR to perform these functions. tors is a major factor in voltage ripple. TABLE 2. Suggested Capacitors and Their Suppliers facilitate placement of the device. for specific instructions how to do this. special attention must be paid to the pads for bumps D3–B3. or inadequate reflow of these bumps. sible size in applications with red or infrared opaque cases. lation characteristic of larger devices, it is vulnerable to light. EMI, ground bounce, and resistive voltage loss in the traces. solder joints can result in erratic or degraded performance. ing a few simple design rules.
- Place the LM2619, inductor and filter capacitors close
- Arrange the components so that the switching current
- Connect the ground pins of the LM2619, and filter ca-
a low-impedance ground connection.
- Use wide traces between the power components and for
- Route noise sensitive traces, such as the voltage feed-
Application Information (Continued) 7. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through distance. In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators. LM2619 www.national.com 14
Physical Dimensions inches (millimeters) unless otherwise noted NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211. VARIATION BD. 10-Bump micro SMD Package The dimensions for X1, X2 and X3 are as given: X1 = 2.250 ±0.030 mm X2 = 2.504 ±0.030 mm X3 = 0.600 ±0.075 mm LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com LM2619 500mA Sub-Miniature Step-Down DC-DC Converter National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the righ t at any time without notice to change said circuitry and specifications.