LM2612

LM2612 NSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 19

Technical content

Features

n Sub-miniature 10-pin micro SMD package n Only three tiny surface-mount external components required n Uses small ceramic capacitors. n Internal soft start n Current overload protection n No external compensation required

Applications

Typical Application Circuit 20007102 May 2002 LM2612 400mA Sub-miniature, Programmable, Step-Down DC-DC Converter for Ultra Low-Voltage Circuits © 2002 National Semiconductor Corporation DS200071 www.national.com

Ordering Information

Order Number Package Type NSC Package Drawing Supplied As 10-Pin micro SMD LM2612ABP 10-bump Wafer Level Chip Scale (micro SMD) BPA10VWB

250 Units, Tape and Reel

LM2612BBP 250 Units, Tape and Reel LM2612ABPX 3000 Units, Tape and Reel LM2612BBPX 3000 Units, Tape and Reel Pin Description Pin Number(*) Pin Name Function A1 FB Feedback Analog Input. Connect to the output at the output filter capacitor (Figure 1) B1 VID1 Output Voltage Control Inputs. Set the output voltage using these digital inputs (see Table 1). The output defaults to 1.5V if these pins are unconnected.C1 VID0 D1 SYNC/MODE Synchronization Input. Use this digital input for frequency selection or modulation control. Set: SYNC/MODE = high for low-noise 600kHz PWM mode SYNC/MODE = low for low-current PFM mode SYNC/MOD E = a 500kHz - 1MHz external clock for synchronization to an external clock in PWM mode. See Synchronization and Operating Modesin theDevice Informationsection. D2 EN Enable Input. Set this CMOS Schmitt trigger digital input high to VDD for normal operation. For shutdown, set low to SGND. Set EN low during power-up and other low supply voltage conditions. (See Shutdown Mode in theDevice Informationsection.) D3 PGND Power Ground C3 SW Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an inductor with a saturation current rating that exceeds the 850mA max Switch Peak Current Limit specification of the LM2612 ( Figure 1) B3 PVIN Power Supply Input to the internal PFET switch. Connect to the input filter capacitor (Figure 1). A3 VDD Analog Supply Input. If board layout is not optimum, an optional 0.1µF ceramic capacitor is suggested (Figure 1) A2 SGND Analog and Control Ground (*) note the pin numbering scheme for the MicroSMD package was revised in April, 2002 to comform to JEDEC standard. Only the pin numbers were revised. No changes to the physical location of the inputs/outputs were made. For reference purpose, the obsolete numbering has FB as pin 1, VID1 as pin 2, VID0 as pin3 , SYNC as pin 4, EN as pin 5, PGND as pin 6, SW as pin 7, PVIN as pin 8, VDD as pin 9 and SGND as pin 10. LM2612 www.national.com 2

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. PVIN, VDD, to SGND −0.2V to +6V PGND to SGND −0.2V to +0.2V EN, SYNC/MODE, VID0, VID1 to SGND −0.2V to +6V FB, SW (GND −0.2V) to (VDD +0.2V) Storage Temperature Range −45˚C to +150˚C Lead temperature (Soldering, 10 sec.) 260˚C Junction Temperature (Note 2) −25˚C to 125˚C Minimum ESD Rating Human body model, C = 100pF, R = 1.5 kΩ ±2.5kV Thermal Resistance (θJA) LM2612ABP & LM2612BBP (Note 3) 170˚C/W

Electrical Characteristics

Specifications with standard typeface are for TA =T J = 25˚C, and those inbold face typeapply over the full Operating Tem- perature Range (TA =T J = −25˚C to +85˚C). Unless otherwise specified, PVIN = VDD = EN = SYNC = 3.6V, VID0 = VID1 = 0V. Symbol Parameter Conditions Min Typ Max Units VIN Input Voltage Range (Note PVIN = VDD = VID1 = VIN, VID0 = 0V 2.8 5.5 V VFB Feedback Voltage (Note 6) VID0 = VIN, VID1 = VIN 1.00 1.05 1.10 VVID0 = VIN, VID1 = 0V 1.274 1.30 1.326 VID0 = 0V, VID1 = 0V 1.470 1.50 1.530 VID0 = 0V, VID1 = VIN 1.764 1.8 1.836 VHYST PFM Comparator Hysteresis Voltage (Note 7) PFM Mode (SYNC = 0V) 16 mV I SHDN Shutdown Supply Current EN = 0V 0.1 3 µA IQ1 DC Bias Current into VDD (VOUT set to 1.5V) No-Load, PFM mode (SYNC/MODE = 0V) 150 185 µAIQ2 No-Load, PWM mode (SYNC/MODE = V IN) 555 725 R DSON (P) Pin-Pin Resistance for P FET LM2612ABP & LM2612BBP 370 500 m Ω R DSON (N) Pin-Pin Resistance for N FET LM2612ABP & LM2612BBP 330 500 m Ω R DSON , TC FET Resistance Temperature Coefficient 0.5 %/C Ilim Switch Peak Current Limit (Note 8) LM2612ABP 510 690 850 mALM2612BBP 400 690 980 VEN_H EN Positive Going Threshold Voltage (Note 8) V DD = 3.6V 2.54 2.85 V VEN_L EN Negative Going Threshold Voltage (Note 8) V DD = 3.6V 1.70 2.00 V VSYNC_H SYNC/MODE Positive Going Threshold Voltage 0.95 1.3 V VSYNC_L SYNC/MODE Negative Going Threshold Voltage 0.4 0.9 V VID_H VID0,V ID1 Positive Going Threshold Voltage 0.92 1.2 V VID_L VID0,V ID1 Negative Going Threshold Voltage 0.4 0.83 V LM2612 www.national.com3

Electrical Characteristics(Continued) Specifications with standard typeface are for TA =T J = 25˚C, and those inbold face typeapply over the full Operating Tem- perature Range (TA =T J = −25˚C to +85˚C). Unless otherwise specified, PVIN = VDD = EN = SYNC = 3.6V, VID0 = VID1 = 0V. Symbol Parameter Conditions Min Typ Max Units IVID VID1, VID0 Pull Down Current VID1, VID0 = 3.6V 1.8 µA fsync SYNC/MODE Clock Frequency Range (Note 10) 500 1000 kHz F OSC Internal Oscillator Frequency LM2612ABP, PWM Mode (SYNC = VIN) 468 600 732 kHzLM2612BBP, PWM Mode (SYNC = VIN) 450 600 750 Tmin Minimum ON-Time of P FET Switch in PWM Mode 200 ns Load Transient Response in PWM Mode Circuit ofFigure 1 IOUT = 20mA to 200mA Step ±25 mV Line Transient Response in PFM Mode Circuit ofFigure 1 VIN = 3.0V to 3.6V Step tr =tp =1 0µ s ±3m V Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but parameter specifications may not be guaranteed. For guaranteed specifications and associated test conditions, see the Min andMax limits and Conditions in the Electrical Characteristics table. Electrical Characteristics table limits are guaranteed by production testing, design or correlation using standard Statistical Quality Control methods. Typical (Typ) specifications are mean or average values from characterization at 25C and are not guaranteed. Note 2:In PWM mode, Thermal shutdown will occur if the junction temperature exceeds the 150˚C maximum junction temperature of the device. Note 3:Thermal resistance specified with 2 layer PCB(0.5/0.5 oz. cu). Note 4:Thermal resistance specified with 3 layer PCB (2/1/1 oz. cu) and 12 vias 0.33mm diameter (see Application Note AN-1187). Note 5:The LM2612 is designed for cell phone applications where turn-on after power-up is controlled by the system processor and internal UVLO (Under Voltage LockOut) circuitry is unecessary. The LM2612 has no UVLO circuitry and should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.8V. Although the LM2612 exhibited safe behavior during pre-production evaluation while enabled at low input voltages, this is not guaranteed. Note 6:The feedback voltage is trimmed at the 1.5V output setting. The other output voltages result from the pin selection of the internal DAC’s divider ratios. The precision for the feedback voltages is±2%, except for the 1.05V setting, which is 5%. Contact the Portable Power Applications group at National Semiconductor, if trimming at other voltages is desired. Note 7:: The hysteresis voltage is the minimum voltage swing on FB that causes the internal feedback and control circuitry to turn the internal PFET switch on and then off, during PFM mode. Note 8:Current limit is built-in, fixed, and not adjustable. If the current limit is reached while the output is pulled below about 0.7V, the internal PFET switch turns off for 2.5 µs to allow the inductor current to diminish. Note 9:EN is a CMOS Schmitt trigger digital input with logic thresholds that scale with the supply voltage at the VDD pin. The nominal logic thresholds are approximately 0.71VDD and 0.55VDD for the high and low thresholds respectively. Note 10:SYNC driven with an external clock switching between VIN and GND. When an external clock is present at SYNC, the IC is forced to PWM mode at the external clock frequency. The LM2612 synchronizes to the rising edge of the external clock. LM2612 www.national.com 4

Typical Operating Characteristics LM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 = 10 µH, unless otherwise noted. Quiescent Supply Current vs Temperature Quiescent Supply Current vs Supply Voltage 20007106 20007107 Shutdown Quiescent Current vs Temperature Output Voltage vs Temperature (PWM Mode) 20007108 20007109 Output Voltage vs Temperature (PFM Mode) Output Voltage vs Supply Voltage (VOUT = 1.8V, PWM Mode) 20007110 20007111 LM2612 www.national.com5

Typical Operating CharacteristicsLM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 =1 0 µH, unless otherwise noted. (Continued) Output Voltage vs Supply Voltage (VOUT = 1.8V, PFM Mode) Output Voltage vs Supply Voltage (VOUT = 1.5V, PWM Mode) 20007112 20007113 Output Voltage vs Supply Voltage (VOUT = 1.5V, PFM Mode) Output Voltage vs Supply Voltage (VOUT = 1.3V, PWM Mode) 20007114 20007115 Output Voltage vs Supply Voltage (VOUT = 1.3V, PFM Mode) Output Voltage vs Supply Voltage (VOUT = 1.05V, PWM Mode) 20007116 20007117 LM2612 www.national.com 6

Typical Operating CharacteristicsLM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 =1 0 µH, unless otherwise noted. (Continued) Output Voltage vs Supply Voltage (VOUT = 1.05V, PFM Mode) Output Voltage vs Output Current (VOUT = 1.8V, PWM Mode) 20007118 20007119 Output Voltage vs Output Current (VOUT = 1.8V, PFM Mode) Output Voltage vs Output Current (VOUT = 1.5V, PWM Mode) 20007120 20007121 Output Voltage vs Output Current (VOUT = 1.5V, PFM Modee) Output Voltage vs Output Current (VOUT = 1.3V, PWM Mode) 20007122 20007123 LM2612 www.national.com7

Typical Operating CharacteristicsLM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 =1 0 µH, unless otherwise noted. (Continued) Output Voltage vs Output Current (VOUT = 1.3V, PFM Mode) Output Voltage vs Output Current (VOUT = 1.05V, PWM Mode, With Diode) 20007124 20007125 Output Voltage vs Output Current (VOUT = 1.05V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.8V, PWM Mode, With Diode) 20007126 20007127 Efficiency vs Output Current (VOUT = 1.8V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.5V, PWM Mode, With Diode) 20007128 20007129 LM2612 www.national.com 8

Typical Operating CharacteristicsLM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 =1 0 µH, unless otherwise noted. (Continued) Efficiency vs Output Current (VOUT = 1.5V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.3V, PWM Mode, With Diode) 20007130 20007131 Efficiency vs Output Current (VOUT = 1.3V, PFM Mode) Efficiency vs Output Current (VOUT = 1.05V, PWM Mode) 20007132 20007133 Efficiency vs Output Current (VOUT = 1.05V, PFM Mode, With Diode) Efficiency vs Output Current (VOUT = 1.8V, PWM Mode,No Diode) 20007134 20007135 LM2612 www.national.com9

Typical Operating CharacteristicsLM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 =1 0 µH, unless otherwise noted. (Continued) Efficiency vs Output Current (VOUT = 1.8V, PFM Mode, No Diode) Switching Frquency vs Temperature (PWM Mode) 20007136 20007139 Load Transient Response (PWM Mode) Load Transient Response (PFM Mode) 20007141 A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 5V/div C: V OUT , 50mV/div, AC COUPLED D: LOAD, 20mA to 200mA, 200mA/div 20007146 A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 5V/div C: V OUT , 50mV/div, AC COUPLED D: LOAD, 10mA to 100mA, 100mA/div Shutdown Response (PWM Mode) Shutdown Response (PFM Mode) 20007140 A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: V OUT , 1V/div D: EN, 5V/div 20007145 A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: V OUT , 1V/div D: EN, 5V/div LM2612 www.national.com 10

Typical Operating CharacteristicsLM2612ABP, Circuit ofFigure 1,V IN = 3.6V, TA = 25˚C, L1 =1 0 µH, unless otherwise noted. (Continued) PWM to PFM Response Line Transient Response (PWM Mode) 20007144 A: INDUCTOR CURRENT, 500mA/div B: SW PIN, 2V/div C: V OUT , 50mV/div, AC COUPLED D: SYNC/MODE, 5V/div 20007149 A: SUPPLY VOLTAGE, 500mV/div, AC COUPLED B: SW PIN, 5V/div C: V OUT , 10mV/div, AC COUPLED L1 =2 2µ H LM2612 www.national.com11

age selection pins eliminate external feedback resistors. through the inductor to the output filter capacitor and load. average voltage at the SW pin. FIGURE 1. Typical Operating Circuit

lating the energy per cycle to control power to the load. for the increase in the load. FIGURE 2. Simplified Functional Diagram

tor and the inductor current. ervoltage Protection, for more information. leave the pin floating of allow it to linger between logic levels. otherwise occur in response to an indeterminate logic state. duty-cycle clock over frequencies from 500kHz to 1MHz. FIGURE 3. Typical Circuit Waveforms in (a) PWM Mode and (b) PFM Mode

(SYNC/MODE Pin) (Continued) over/undershoot. Note that sharp edged signals from a pulse or function generator can develop under/overshoot as high as 10V at the end of an improperly terminated cable. Drive the SYNC/MODE pin using a signal with a slew rate faster than 5V/100µs. Use a comparator Schmitt trigger or logic gate to drive the SYNC/MODE pin. Do not leave the pin floating of allow it to linger between logic levels. These measures will prevent output voltage errors that could oth- erwise occur in response to an indeterminate logic state. Overvoltage Protection The LM2612 has an over-voltage comparator that prevents the output voltage from rising too high when the device is left in PWM mode under low-load conditions. Otherwise, the output voltage could rise out of regulation from the minimum energy transferred per cycle due to the 200ns minimum on-time of the PFET switch while in PWM mode. When the output voltage rises by 30mV over its regulation threshold, the OVP comparator inhibits PWM operation to skip pulses until the output voltage returns to the regulation threshold. In over voltage protection, output voltage and ripple increase slightly. Shutdown Mode Setting the EN digital input pin low to SGND places the LM2612 in a 0.1uA (typ) shutdown mode. During shutdown, the PFET switch, NFET synchronous rectifier, reference, control and bias of the LM2612 are turned off. Setting EN high to VDD enables normal operation. While turning on, soft start is activated. EN is a CMOS Schmitt trigger digital input with thresholds that scale with the input voltage at VDD. The nominal logic thresholds are approximately 0.71VDD and 0.55VDD for the high and low thresholds respectively. Drive EN using CMOS logic referenced to the supply voltage at the VDD pin of the LM2612. EN must be set low to turn off the LM2612 during power-up and undervoltage conditions when the supply is less than the 2.8V minimum operating voltage. The LM2612 is designed for mobile phones and similar applications where power sequencing is determined by the system controller and in- ternal UVLO (Under Voltage LockOut) circuitry is unneces- sary. The LM2612 has no UVLO circuitry. Although the LM2612 exhibited safe behavior during pre-production evaluation while enabled at low input voltages, this is not guaranteed. Internal Synchronous Rectification While in PWM mode, the LM2612 uses an internal NFET as a synchronous rectifier to improve efficiency by reducing rectifier forward voltage drop and associated power loss. In general, synchronous rectification provides a significant im- provement in efficiency whenever the output voltage is rela- tively low compared to the voltage drop across an ordinary rectifier diode. Under moderate and heavy loads, the internal NFET syn- chronous rectifier is turned on during the inductor current down-slope in the second part of each cycle. The synchro- nous rectifier is turned off prior to the next cycle, or when the inductor current ramps near zero at light loads. The NFET is designed to conduct through it’s intrinsic body diode during transient intervals before it turns on, eliminating the need for an external diode. Synchronous rectification is disabled and the NFET con- ducts through it’s body diode during the second part of each cycle while in PFM mode to reduce quiescent current asso- ciated with the synchronous rectifier’s control circuitry. The synchronous rectifier may also remain off in PWM mode when duty cycles are short due to high input-output voltage differentials or light loads, when there is insufficient time for the synchronous rectifier to activate. The body diode of the NFET is also used under these conditions. To increase effi- ciency in PFM or short duty-cycle PWM conditions, place an external Schottky diode from PGND to SW. Contact the Portable Power applications group at National Semiconduc- tor, if interested in a device with synchronous rectification in PFM mode. Current Limiting A current limit feature allows the LM2612 to protect itself and external components during overload conditions. Current limiting is implemented using an independent internal com- parator that trips at 850mA max, (980mA for B grade de- vices). In PWM mode, cycle-by-cycle current limiting is nor- mally used. If an excessive load pulls the output voltage down to approximately 0.7V, then the device switches to a timed current limit mode. In timed current limit mode the internal P-FET switch is turned off after the current compara- tor trips and the beginning of the next cycle is inhibited for 2.5µs to force the instantaneous inductor current to ramp down to a safe value. PFM mode also uses timed current limit operation. The synchronous rectifier is off in timed cur- rent limit mode. Timed current limit prevents the loss of current control seen in some products when the output volt- age is pulled low in serious overload conditions. Current Limiting and PWM Mode Transient Response Considerations The LM2612 was designed for fast response to moderate load steps. Harsh transient conditions during loads above 300mA can cause the inductor current to swing up to the 850mA current limit, resulting in PWM mode jitter or instabil- ity from activation of the current limit comparator. To avoid this jitter or instability, do not power-up or start the LM2612 into a full load (loads near or above 400mA). Do not change operating modes or output voltages when operating at a full load. Avoid extremely sharp and wide-ranging load steps to full load, such as from <30mA to >350mA. Pin Selectable Output Voltage The LM2612 features pin-selectable output voltage to elimi- nate the need for external feedback resistors. The output can be set to 1.05V, 1.3V, 1.5V or 1.8V by configuring the VID0 and VID1 pins. See Setting the Output Voltagein the Application Informationsection for further details. Soft-Start The LM2612 has soft start to reduce current inrush during power-up and startup. This reduces stress on the LM2612 and external components. It also reduces startup transients on the power source. LM2612 www.national.com15

Soft-Start(Continued) Soft start is implemented by ramping up the internal refer- ence in the LM2612 to gradually increase the output voltage. The reference ramps up in about 400µs. When powering up in PWM mode, soft start may take an additional 200us to allow time for the error amplifier compensation network to charge. Thermal Overload Protection The LM2612 has a thermal overload protection function that operates to protect itself from short-term misuse and over- load conditions. When the junction temperature exceeds about 155˚C, the device initiates a soft-start cycle which is completed after the temperature drops below 130˚C. Pro- longed operation in thermal overload conditions may dam- age the device and is considered bad practice.

Application Information

Setting The Output Voltage The LM2612 features pin-selectable output voltage to elimi- nate the need for external feedback resistors. Select an output voltage of 1.05V, 1.3V, 1.5V or 1.8V by configuring the VID0 and VID1 pins, as directed in Table 1. TABLE 1. VID0 and VID1 Output Voltage Selection (980mA for B grade) is recommended for most applications. Table 2lists suggested inductors and suppliers. TABLE 2. Suggested Inductors and Their Suppliers corresponding magnetic field. TABLE 3. Suggested Capacitors and Their Suppliers

TABLE 3. Suggested Capacitors and Their Suppliers(Continued) and a 22uF, X7R or X5R ceramic output filter capacitor. Table 3lists suggested capacitors and suppliers. transient load changes and reduces output voltage ripple. tance and sufficiently low ESR to perform these functions. increase efficiency in PFM mode and light-load PWM mode. in theTypical Operating Characteristics. can result in late or inadequate reflow of these bumps. ing. See Applications Note AN-1112 for specific instructions. sible size in applications with red or infra-red opaque cases. lation characteristic of larger devices, it is vulnerable to light.

Application Information(Continued) Do not use or power-up the LM2612 while subjecting it to high intensity red or infrared light, otherwise degraded, un- predictable or erratic operation may result. Examples of light sources with high red or infrared content include the sun and halogen lamps. Package the circuit in a case opaque to red or infrared light. Board Layout Considerations PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or instability. Poor layout can also result in reflow problems leading to poor solder joints between the micro SMD package and board pads. Poor solder joints can result in erratic or degraded performance. Good layout for the LM2612 can be implemented by follow- ing a few simple design rules: 1. Place the LM2612 on 6.7mil pads for micro SMD pack- age. As a thermal relief, connect to each pad with a 6mil wide trace (micro SMD), 6mils long or longer, then in- crementally increase each trace to its optimal width over a span so that the taper extends beyond the edge of the package. The important criterion is symmetry to ensure re-flow occurs evenly (see Micro SMD Package Assem- bly and Use). 2. Place the LM2612, inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching cur- rents and act as antennas. Following this rule reduces radiated noise. Place the capacitors and inductor within 0.2in (5mm) of the LM2612. 3. Arrange the components so that the switching current loops curl in the same direction. During the first part of each cycle, current flows from the input filter capacitor, through the LM2612 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second part of each cycle, current is pulled up from ground, through the LM2612 by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents mag- netic field reversal between the two part-cycles and reduces radiated noise. 4. Connect the ground pins of the LM2612 and filter ca- pacitors together using generous component-side cop- per fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several vias. This reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM2612 by giving it a low-impedance ground connection. 5. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors caused by resistive losses across the traces. 6. Route noise sensitive traces, such as the voltage feed- back path, away from noisy traces between the power components. The voltage feedback trace must remain close to the LM2612 circuit and should be direct but should be routed away from to noisy components. This reduces EMI radiated onto the DC-DC converter’s own voltage feedback trace. 7. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through distance. In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators, such as the LP2966. LM2612 www.national.com 18

Physical Dimensionsinches (millimeters) unless otherwise noted 10-Bump micro SMD Package The dimensions for X1, X2 and X3 are as given: NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6.NO JEDEC REGISTRATION AS OF SEPT. 2000. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com LM2612 400mA Sub-miniature, Programmable, Step-Down DC-DC Converter for Ultra Low-Voltage Circuits National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.