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LM25010Q1MHX/NOPB.B

Texas Instruments

LM25010, LM25010-Q1 42-V, 1-A Step-Down Switching Regulator REVISED MAY 2016

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Copyright © 2016, Texas Instruments Incorporated Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM25010,LM25010-Q1 SNVS419E –DECEMBER 2005–REVISED MAY 2016 LM25010,LM25010-Q142-V,1-AStep-DownSwitchingRegulator

1 Features

1• LM25010-Q1 Qualified for Automotive

Applications

AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range – Device Temperature Grade 0: –40°C to 150°C Ambient Operating Temperature Range – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C5
Wide 6-V to 42-V Input Voltage Range
Valley Current Limiting at 1.25 A
Programmable Switching Frequency Up To 1 MHz
Integrated N-Channel Buck Switch
Integrated High Voltage Bias Regulator
No Loop Compensation Required
Ultra-Fast Transient Response
Nearly Constant Operating Frequency With Line and Load Variations
Adjustable Output Voltage
2.5 V, ±2% Feedback Reference
Programmable Soft Start
Thermal Shutdown

2 Applications

Non-Isolated Telecommunications Regulators
Secondary Side Post Regulators
Automotive Electronics

3 Description

The LM25010 features all the functions needed to implement a low-cost, efficient, buck regulator capable of supplying in excess of 1-A load current. This high voltage regulator integrates an N-Channel Buck Switch, and is available in thermally enhanced 10-pin WSON and 14-pin HTSSOP packages. The constant ON-time regulation scheme requires no loop compensation resulting in fast load transient response and simplified circuit implementation. The operating frequency remains constant with line and load variations due to the inverse relationship between the input voltage and the ON-time. The valley current limit detection is set at 1.25 A. Additional features include: VCC undervoltage lockout, thermal shutdown, gate drive undervoltage lockout, and maximum duty cycle limiter. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LM25010x WSON (10) 4.00 mm × 4.00 mm HTSSOP (14) 4.40 mm × 5.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Basic Step-Down Regulator

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (February 2013) to Revision E Page

Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Changes from Revision C (February 2013) to Revision D Page

5 Pin Configuration and Functions

BST 2 3 I Boost pin for bootstrap capacitor. Connect a capacitor from SW to the BST pin. The capacitor is charged from VCC through an internal diode during the buck switch OFF-time. EP — — — Exposed metal pad on the underside of the device. It is recommended to connect this pad to the PC board ground plane to aid in heat dissipation. FB 6 9 I Voltage feedback input from the regulated output. Input to both the regulation and overvoltage comparators. The FB pin regulation level is 2.5 V. ISEN 3 4 I Current sense. During the buck switch OFF-time, the inductor current flows through the internal sense resistor, and out of the ISEN pin to the free-wheeling diode. The current limit comparator keeps the buck switch off if the ISEN current exceeds 1.25 A (typical). NC — 1, 7, 8, 14 — No internal connection. Can be connected to ground plane to improve heat dissipation. RON/SD 8 11 I ON-time control and shutdown. An external resistor from VIN to the RON/SD pin sets the buck switch ON-time. Grounding this pin shuts down the regulator. RTN 5 6 — Ground return for all internal circuitry other than the current sense resistor. SGND 4 5 — Current sense ground. Recirculating current flows into this pin to the current sense resistor. SS 7 10 I Soft start. An internal 11.5-µA current source charges the SS pin capacitor to 2.5 V to softstart the reference input of the regulation comparator. SW 1 2 O Switching node. Internally connected to the buck switch source. Connect to the inductor, free-wheeling diode, and bootstrap capacitor. VCC 9 12 I Output of the bias regulator. The voltage at VCC is nominally equal to VIN for VIN < 8.9 V, and regulated at 7 V for VIN > 8.9 V. Connect a 0.47-µF, or larger capacitor from VCC to ground, as close as possible to the pins. An external voltage can be applied to this pin to reduce internal dissipation if VIN is greater than 8.9 V. MOSFET body diodes clamp VCC to VIN if VCC > VIN. VIN 10 13 I Input supply. Nominal input range is 6 V to 42 V. Input bypass capacitors should be located as close as possible to the VIN and RTN pins.

LM25010,LM25010-Q1 SNVS419E –DECEMBER 2005–REVISED MAY 2016 www.ti.com Product Folder Links: LM25010 LM25010-Q1 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Ratings. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) For detailed information on soldering plastic HTSSOP and WSON packages, see Mechanical, Packaging, and Orderable Information.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VIN to RTN –0.3 45 V BST to RTN –0.3 59 V SW to RTN (steady state) –1.5 V BST to VCC 45 V BST to SW 14 V VCC to RTN –0.3 14 V SGND to RTN –0.3 0.3 V SS to RTN –0.3 4 V VIN to SW 45 V All other inputs to RTN –0.3 7 V Lead temperature (soldering, 4 s)(2) 260 °C Junction temperature, TJ (LM25010, Q1,Q0) –40 150 °C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings: LM25010

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. (2) Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process. (3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings: LM25010-Q1, LM25010-Q0

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1)(2) ±2000 V Charged-device model (CDM), per AEC Q100-011(3) ±750

6.4 Recommended Operating Ratings

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input voltage 6 42 V IO Output current 1 A Ext-VCC External bias voltage 8 13 V TJ Junction temperature LM25010 –40 125 °C LM25010-Q1, LM25010-Q0 –40 150 °C

LM25010,LM25010-Q1 www.ti.com SNVS419E –DECEMBER 2005–REVISED MAY 2016 Product Folder Links: LM25010 LM25010-Q1 Submit Documentation FeedbackCopyright © 2005–2016, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Thermal Information

THERMAL METRIC(1) LM25010, LM25010-Q1 UNITDPR (WSON) PWP (HTSSOP)

10 PINS 14 PINS

RθJA Junction-to-ambient thermal resistance 36 41.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 31.9 26.5 °C/W RθJB Junction-to-board thermal resistance 13.2 22.5 °C/W ψJT Junction-to-top characterization parameter 0.3 0.7 °C/W ψJB Junction-to-board characterization parameter 13.5 22.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 3 3.3 °C/W (1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. (2) The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) as follows: TJ = TA + (PD × RθJA) where RθJA (in °C/W) is the package thermal impedance provided in Thermal Information

6.6 Electrical Characteristics

Typical values correspond to TJ = 25°C, minimum and maximum limits apply over TJ = –40°C to 125°C, VIN = 24 V, and RON = 200 kΩ (unless otherwise noted).(1)(2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC REGULATOR VCCReg VCC regulated output 6.6 7 7.4 V VIN - VCC ICC = 0 mA, FS ≤ 200 kHz, 6 V ≤ VIN ≤ 8.5 V 100 mV VCC bypass threshold VIN increasing 8.9 V VCC bypass hysteresis VIN decreasing 260 mV VCC output impedance (0 mA ≤ ICC ≤ 5 mA) VIN = 6 V 55 ΩVIN = 8 V 50 VIN = 24 V 0.21 VCC current limit VIN = 24 V, VCC = 0 V 15 mA UVLOVCC VCC undervoltage lockout threshold VCC increasing 5.25 V UVLOVCC hysteresis VCC decreasing 180 mV UVLOVCC filter delay 100-mV overdrive 3 µs IIN operating current Non-switching, FB = 3 V 645 920 µA IIN shutdown current RON/SD = 0 V 90 170 µA SOFTSTART PIN ISS Internal current source 8 11.5 15 µA CURRENT LIMIT ILIM Threshold Current out of ISEN 1 1.25 1.5 A Resistance from ISEN to SGND 130 mΩ Response time 150 ns ON TIMER, RON/SD PIN Shutdown threshold Voltage at RON/SD rising 0.3 0.7 1.05 V Threshold hysteresis 40 mV REGULATION AND OVER-VOLTAGE COMPARATORS (FB PIN) VREF FB regulation threshold TJ ≤ 125°C 2.445 2.5 2.55 V TJ ≤ 150°C 2.435 FB overvoltage threshold 2.9 V FB bias current 1 nA

applying statistical process control.

6.7 Switching Characteristics

Figure 1. Start-Up Sequence

6.8 Typical Characteristics

Figure 2. VCC vs VIN Figure 3. VCC vs ICC Figure 4. ICC vs Externally Applied VCC Figure 5. ON-Time vs VIN and RON Figure 6. Voltage at RON/SD Pin Figure 7. IIN vs VIN

50 m: CURRENT LIMIT COMPARATOR REGULATION COMPARATOR 2.9V VIN R CL (optional) VOUT 62.5 mV 11.5 PA 2.5V SD R ON COMPLETE VCC UVL VIN SENSE VCCVIN RON/SD 0.7V Copyright © 2016, Texas Instruments Incorporated LM25010,LM25010-Q1 SNVS419E –DECEMBER 2005–REVISED MAY 2016 www.ti.com Product Folder Links: LM25010 LM25010-Q1 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The LM25010 step-down switching regulator features all the functions needed to implement a low cost, efficient buck DC-DC converter capable of supplying in excess of 1 A to the load. This high voltage regulator integrates an N-Channel buck switch, with an easy to implement constant ON-time controller. It is available in the thermally enhanced WSON and HTSSOP packages. The regulator compares the feedback voltage to a 2.5-V reference to control the buck switch, and provides a switch ON-time which varies inversely with VIN. This feature results in the operating frequency remaining relatively constant with load and input voltage variations. The switching frequency can range from less than 100 kHz to 1 MHz. The regulator requires no loop compensation resulting in very fast load transient response. The valley current limit circuit holds the buck switch off until the free-wheeling inductor current falls below the current limit threshold, nominally set at 1.25 A. The LM25010 can be applied in numerous applications to efficiently step-down higher DC voltages. Features include: thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, and maximum duty cycle limit.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Control Circuit Overview

The LM25010 employs a control scheme based on a comparator and a one-shot ON timer, with the output voltage feedback (FB) compared to an internal reference (2.5 V). If the FB voltage is below the reference the buck switch is turned on for a time period determined by the input voltage and a programming resistor (RON). Following the ON-time the switch remains off for a fixed 260-ns OFF-time, or until the FB voltage falls below the reference, whichever is longer. The buck switch then turns on for another ON-time period. Referring to the Functional Block Diagram, the output voltage is set by R1 and R2. The regulated output voltage is calculated with Equation 1.

FS = VOUT 2 x L1 x 1.4 x 1020 RL x RON DC = tON tON + tOFF VOUT VIN = tON x FS = FS = VOUT x (VIN ± 1.4V) 1.18 x 10-10 x (RON + 1.4 k:) x VIN LM25010,LM25010-Q1 www.ti.com SNVS419E –DECEMBER 2005–REVISED MAY 2016 Product Folder Links: LM25010 LM25010-Q1 Submit Documentation FeedbackCopyright © 2005–2016, Texas Instruments Incorporated Feature Description (continued) The LM25010 requires a minimum of 25-mV of ripple voltage at the FB pin for stable fixed-frequency operation. If the output capacitor’s ESR is insufficient, additional series resistance may be required (R3 in the Functional Block Diagram). The LM25010 operates in continuous conduction mode at heavy load currents, and discontinuous conduction mode at light load currents. In continuous conduction mode current always flows through the inductor, never decaying to zero during the OFF-time. In this mode the operating frequency remains relatively constant with load and line variations. The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude. Calculate the operating frequency in the continuous conduction mode with Equation 2. (2) The buck switch duty cycle is equal to Equation 3. (3) Under light load conditions, the LM25010 operates in discontinuous conduction mode, with zero current flowing through the inductor for a portion of the OFF-time. The operating frequency is always lower than that of the continuous conduction mode, and the switching frequency varies with load current. Conversion efficiency is maintained at a relatively high level at light loads because the switching losses diminish as the power delivered to the load is reduced. Calculate the approximate discontinuous mode operating frequency with Equation 4. where

RL = the load resistance (4)

7.3.2 Start-Up Regulator (VCC)

A high voltage bias regulator is integrated within the LM25010. The input pin (VIN) can be connected directly to line voltages between 6 V and 42 V. Referring to the Functional Block Diagram and the graph of VCC vs VIN, when VIN is between 6 V and the bypass threshold (nominally 8.9 V), the bypass switch (Q2) is on, and VCC tracks VIN within 100 mV to 150 mV. The bypass switch on-resistance is approximately 50 Ω, with inherent current limiting at approximately 100 mA. When VIN is above the bypass threshold, Q2 is turned off, and VCC is regulated at 7 V. The VCC regulator output current is limited at approximately 15 mA. When the LM25010 is shutdown using the RON/SD pin, the VCC bypass switch is shut off, regardless of the voltage at VIN. When VIN exceeds the bypass threshold, the time required for Q2 to shut off is approximately 2 µs to 3 µs. The capacitor at VCC (C3) must be a minimum of 0.47 µF to prevent the voltage at VCC from rising above its absolute maximum rating in response to a step input applied at VIN. C3 must be located as close as possible to the LM25010 pins. In applications with a relatively high input voltage, power dissipation in the bias regulator is a concern. An auxiliary voltage of between 7.5 V and 14 V can be diode connected to the VCC pin (D2 in Figure 8) to shut off the VCC regulator, reducing internal power dissipation. The current required into the VCC pin is shown in the Typical Performance Characteristics. Internally a diode connects VCC to VIN requiring that the auxiliary voltage be less than VIN. The turn-on sequence is shown in Figure 1. When VCC exceeds the undervoltage lockout threshold (UVLO) of 5.25 V (t1 in Figure 1), the buck switch is enabled, and the SS pin is released to allow the softstart capacitor (C6) to charge up. The output voltage VOUT is regulated at a reduced level which increases to the desired value as the softstart voltage increases (t2 in Figure 1).

Figure 8. Self-Biased Configuration

7.3.3 Regulation Comparator

7.3.4 Overvoltage Comparator

suddenly. The buck switch remains off until the voltage at FB falls below 2.5 V.

7.3.5 ON-Time Control

The RON resistor can be determined from the desired ON-time by re-arranging Equation 5 to Equation 6. the minimum VIN is determined from Equation 8.

7.3.6 Current Limit

operation and during current limit. The output current IO is the average of the inductor ripple current waveform. ripple amplitude (ΔI) is calculated from Equation 9. The current limit threshold can be increased by connecting an external resistor (RCL) between SGND and ISEN. 1.5 A, and the peak current out of the SW pin should not exceed 2 A. Figure 9. Inductor Current - Current Limit Operation

7.3.7 Soft Start

reaching the current limit threshold during start-up, thereby reducing inrush currents. shutdown using the RON/SD pin.

7.3.8 N-Channel Buck Switch and Driver

7.3.9 Thermal Shutdown

switch and the ON timer. This feature helps prevent catastrophic failures from accidental device overheating.

7.4 Device Functional Modes

7.4.1 Shutdown

than one to two cycles of the regulator’s nominal switching frequency. Figure 10. Shutdown Implementation

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

Calculator, can be used to design a single output non-synchronous buck converter. materials, estimated efficiency, solution size, and cost of the complete solution.

8.2 Typical Application

measured approximately 1.3 A. Figure 11. LM25010 Example Circuit

8.2.1 Design Requirements

Table 1 lists the operating parameters for Figure 11. Table 1. Design Parameters

8.2.2 Detailed Design Procedure

in Figure 11 according to the components listed in Table 2. Table 2. List of Components for LM25010 Example Circuit

8.2.2.1 Component Selection

8.2.2.1.1 R1 and R2

These resistors set the output voltage, and calculate the ratio with Equation 10. kΩ. A value of 1 kΩ is used for R1 and R2.

8.2.2.1.2 RON, FS

cost), but higher switching losses. A lower frequency means a higher efficiency, but with larger components. ±25% tolerance. Using Equation 7 at a nominal VIN of 8 V in Equation 11. voltage (VIN(min), VIN(max)). See Figure 12. Figure 12. Inductor Current

ESR (min) = 34.5 mA 50 mV = 1.45: IOR(min) = L1max x FS(max) x VIN(min) VOUT x (VIN(min) - VOUT )

120 PH x 201 kHz x 6V

5V x (6V - 5V) = 34.5 mAp-p= IOR(max) =80 PH x 152 kHz x 40V 5V x (40V - 5V) = 360 mAp-p IOR(max) = L1min x FS(min) x VIN(max) VOUT x (VIN(max) - VOUT ) L1 =0.40A x 152 kHz x 40V 5V x (40V - 5V) = 72 PH L1 = IOR x FS(min) x VIN(max) VOUT x (VIN(max) - VOUT ) LM25010,LM25010-Q1 www.ti.com SNVS419E –DECEMBER 2005–REVISED MAY 2016 Product Folder Links: LM25010 LM25010-Q1 Submit Documentation FeedbackCopyright © 2005–2016, Texas Instruments Incorporated To keep the circuit in continuous conduction mode, the maximum allowed ripple current is twice the minimum load current, or 400 mAP-P. Using this value of ripple current, the inductor (L1) is calculated using Equation 12 and Equation 13. where

FS(min) is the minimum frequency of 152 kHz (203 kHz – 25%) at VIN(max) (12) (13) Equation 13 provides the minimum value for inductor L1. When selecting an inductor, use a higher standard value (100 uH). To prevent saturation, and possible destructive current levels, L1 must be rated for the peak current which occurs if the current limit and maximum ripple current are reached simultaneously (IPK in Figure 9). The maximum ripple amplitude is calculated by rearranging Equation 12 using VIN(max), FS(min), and the minimum inductor value, based on the manufacturer’s tolerance. Assume, for Equation 14, Equation 15, and Equation 16, the inductor’s tolerance is ±20%. (14) (15) IPK = ILIM + IOR(max) = 1.5 A + 0.36 A = 1.86 A where
ILIM is the maximum current limit threshold (16) At the nominal maximum load current of 1 A, the peak inductor current is 1.18 A.

8.2.2.1.4 RCL

Since it is obvious that the lower peak of the inductor current waveform does not exceed 1 A at maximum load current (see Figure 12), it is not necessary to increase the current limit threshold. Therefore RCL is not needed for this exercise. For applications where the lower peak exceeds 1 A, see Increasing The Current Limit Threshold.

8.2.2.1.5 C2 and R3

Since the LM25010 requires a minimum of 25 mVP-P of ripple at the FB pin for proper operation, the required ripple at VOUT is increased by R1 and R2, and is equal to Equation 17. VRIPPLE = 25 mVP-P × (R1 + R2) / R2 = 50 mVP-P (17) This necessary ripple voltage is created by the inductor ripple current acting on C2’s ESR + R3. First, determine the minimum ripple current, which occurs at minimum VIN, maximum inductor value, and maximum frequency with Equation 18. (18) The minimum ESR for C2 is then equal to Equation 19. (19) If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in the Functional Block Diagram. The value chosen for C2 is application dependent, and it is recommended that it be no smaller than 3.3 µF. C2 affects the ripple at VOUT, and transient response. Experimentation is usually necessary to determine the optimum value for C2.

C6 = 2.5V tSS x 11.5 PA C1 = 'V IO x tON = 13 PF0.5V 1.0A x 6.5 Ps= tON(max) = 6V - 1.4V 1.18 x 10-10 x (200k + 1.4k) + 67 nsx 1.25 = 6.5 Ps LM25010,LM25010-Q1 SNVS419E –DECEMBER 2005–REVISED MAY 2016 www.ti.com Product Folder Links: LM25010 LM25010-Q1 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated 8.2.2.1.6 D1 A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode should be rated for the maximum VIN (40 V), the maximum load current (1 A), and the peak current which occurs when current limit and maximum ripple current are reached simultaneously (IPK in Figure 9), previously calculated to be 1.86 A. The diode’s forward voltage drop affects efficiency due to the power dissipated during the OFF- time. The average power dissipation in D1 is calculated from Equation 20. PD1 = VF × IO × (1 – D) where

IO is the load current
D is the duty cycle (20) 8.2.2.1.7 C1 This capacitor limits the ripple voltage at VIN resulting from the source impedance of the supply feeding this circuit, and the on/off nature of the switch current into VIN. At maximum load current, when the buck switch turns on, the current into VIN steps up from zero to the lower peak of the inductor current waveform (IPK- in Figure 12), ramps up to the peak value (IPK+), then drops to zero at turnoff. The average current into VIN during this ON-time is the load current. For a worst case calculation, C1 must supply this average current during the maximum ON- time. The maximum ON-time is calculated at VIN = 6 V using Equation 5, with a 25% tolerance added to Equation 21. (21) The voltage at VIN should not be allowed to drop below 5.5 V in order to maintain VCC above its UVLO in Equation 22. (22) Normally a lower value can be used for C1 since the above calculation is a worst case calculation which assumes the power source has a high source impedance. A quality ceramic capacitor with a low ESR should be used for C1. 8.2.2.1.8 C3 The capacitor at the VCC pin provides noise filtering and stability, prevents false triggering of the VCC UVLO at the buck switch ON and OFF transitions, and limits the peak voltage at VCC when a high voltage with a short rise time is initially applied at VIN. C3 should be no smaller than 0.47 µF, and must be a good quality, low ESR, ceramic capacitor, physically close to the IC pins. 8.2.2.1.9 C4 The recommended value for C4 is 0.022 µF. TI recommends a high quality ceramic capacitor with low ESR as C4 supplies the surge current to charge the buck switch gate at each turnon. A low ESR also ensures a complete recharge during each OFF-time. 8.2.2.1.10 C5 This capacitor suppresses transients and ringing due to lead inductance at VIN. TI recommends a low ESR, 0.1- µF ceramic chip capacitor placed physically close to the LM25010. 8.2.2.1.11 C6 The capacitor at the SS pin determines the softstart time (that is the time for the reference voltage at the regulation comparator and the output voltage) to reach their final value. Determine the capacitor value with Equation 23. (23) For a 5 ms softstart time, C6 calculates to 0.022 µF.

IPK+(CL) = R CL 1.5A x (150 m: + RCL ) + IOR(MAX) IPK+ = IO(max) + 2 IOR(max) IAVE = (RCL + 0.11: x VIN(max) IO(max) x RCL x (VIN(max) - VOUT ) R CL = 1.0A x 0.11: IPK- - 1.0A IPK- = IO(max) - 2 IOR(min) LM25010,LM25010-Q1 www.ti.com SNVS419E –DECEMBER 2005–REVISED MAY 2016 Product Folder Links: LM25010 LM25010-Q1 Submit Documentation FeedbackCopyright © 2005–2016, Texas Instruments Incorporated

8.2.2.2 Increasing The Current Limit Threshold

The current limit threshold is nominally 1.25 A, with a minimum guaranteed value of 1 A. If, at maximum load current, the lower peak of the inductor current (IPK– in Figure 12) exceeds 1 A, resistor RCL must be added between SGND and ISEN to increase the current limit threshold to be equal or exceed that lower peak current. This resistor diverts some of the recirculating current from the internal sense resistor so that a higher current level is needed to switch the internal current limit comparator. Calculate IPK– with Equation 24. where

IO(max) is the maximum load current
IOR(min) is the minimum ripple current calculated using Equation 18 (24) RCL is calculated with Equation 25. where
0.11 Ω is the minimum value of the internal resistance from SGND to ISEN (25) The next smaller standard value resistor should be used for RCL. With the addition of RCL it is necessary to check the average and peak current values to ensure they do not exceed the LM25010 limits. At maximum load current the average current through the internal sense resistor is calculated with Equation 26. (26) If IAVE is less than 2 A, no changes are necessary. If it exceeds 2 A, RCL must be reduced. The upper peak of the inductor current (IPK+), at maximum load current, is calculated using Equation 27. where
IOR(max) is calculated using Equation 14 (27) If IPK+ exceeds 3.5 A , the inductor value must be increased to reduce the ripple amplitude. This necessitates recalculation of IOR(min), IPK–, and RCL. When the circuit is in current limit, the upper peak current out of the SW pin is calculated with Equation 28. (28) The inductor L1 and diode D1 must be rated for this current.

8.2.2.3 Ripple Configurations

For applications where low output voltage ripple is required the output can be taken directly from the low ESR output capacitor (C2) as shown in Figure 13. However, R3 slightly degrades the load regulation. The specific component values, and the application determine if this is suitable.

through CB. Typical values for the additional components are RA = 200 kΩ, CA = 680 pF, and CB = 0.01 µF.

8.2.3 Application Curves

Figure 16. Efficiency vs Load Current and VIN Figure 17. Frequency vs VIN

8.3 Do's and Don'ts

feedback resistors to be low enough in value to provide the minimum required current at nominal VOUT.

9 Power Supply Recommendations

The LM25010 is designed to operate with an input power supply capable of supplying a voltage range from 6 V to 42 V. The input power supply must be well-regulated and capable of supplying sufficient current to the regulator during peak load operation. Also, like in all applications, the power-supply source impedance must be small compared to the module input impedance to maintain the stability of the converter.

10 Layout

10.1 Layout Guidelines

The LM25010 regulation, overvoltage, and current limit comparators are very fast, and respond to short duration noise pulses. Therefore, layout considerations are critical for optimum performance. The layout must be as neat and compact as possible, and all the components must be as close as possible to their associated pins. The two major current loops have currents which switch very fast, and so the loops should be as small as possible to minimize conducted and radiated EMI. The first loop is that formed by C1 (CIN), through the VIN to SW pins, L1 (LIND), C2 (COUT), and back to C1. The second loop is that formed by D1, L1, C2, and the SGND and ISEN pins. The ground connection from C2 to C1 should be as short and direct as possible, preferably without going through vias. Directly connect the SGND and RTN pin to each other, and they should be connected as directly as possible to the C1/C2 ground line without going through vias. The power dissipation within the IC can be approximated by determining the total conversion loss (PIN – POUT), and then subtracting the power losses in the free-wheeling diode and the inductor. The power loss in the diode is approximately Equation 29. PD1 = IO × VF × (1 – D) (29) where IO is the load current, VF is the diode’s forward voltage drop, and D is the duty cycle. The power loss in the inductor is approximately Equation 30. PL1 = IO 2 × RL × 1.1 where

RL is the inductor’s DC resistance
the 1.1 factor is an approximation for the AC losses (30) If it is expected that the internal dissipation of the LM25010 will produce high junction temperatures during normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The exposed pad on the IC package bottom should be soldered to a ground plane, and that plane should both extend from beneath the IC, and be connected to exposed ground plane on the board’s other side using as many vias as possible. The exposed pad is internally connected to the IC substrate. The use of wide PC board traces at the pins, where possible, can help conduct heat away from the IC. The four NC pins on the HTSSOP package are not electrically connected to any part of the IC, and may be connected to ground plane to help dissipate heat from the package. Judicious positioning of the PC board within the end product, along with the use of any available air flow (forced or natural convection) can help reduce the junction temperature.

10.2 Layout Example

Figure 18. LM25010 Buck Layout Example With the WSON Package

11 Device and Documentation Support

11.1 Related Links

resources, tools and software, and quick access to sample or buy. Table 3. Related Links

11.2 Community Resources

solve problems with fellow engineers. contact information for technical support.

11.3 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

during storage or handling to prevent electrostatic damage to the MOS gates.

11.5 Glossary

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM25010MH/NOPB Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 125 L25010 MH LM25010MH/NOPB.A Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 125 L25010 MH LM25010MH/NOPB.B Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 125 L25010 MH LM25010MHX/NOPB Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 L25010 MH LM25010MHX/NOPB.A Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 L25010 MH LM25010MHX/NOPB.B Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 L25010 MH LM25010Q0MH/NOPB Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q0MH LM25010Q0MH/NOPB.A Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q0MH LM25010Q0MH/NOPB.B Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q0MH LM25010Q0MHX/NOPB Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q0MH LM25010Q0MHX/NOPB.A Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q0MH LM25010Q0MHX/NOPB.B Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q0MH LM25010Q1MH/NOPB Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 125 L25010 Q1MH LM25010Q1MH/NOPB.A Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q1MH LM25010Q1MH/NOPB.B Active Production HTSSOP (PWP) | 14 94 | TUBE Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q1MH LM25010Q1MHX/NOPB Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 L25010 Q1MH Addendum-Page 1

www.ti.com 23-May-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM25010Q1MHX/NOPB.A Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q1MH LM25010Q1MHX/NOPB.B Active Production HTSSOP (PWP) | 14 2500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 150 L25010 Q1MH LM25010SD/NOPB Active Production WSON (DPR) | 10 1000 | SMALL T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 25010SD LM25010SD/NOPB.A Active Production WSON (DPR) | 10 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 25010SD LM25010SD/NOPB.B Active Production WSON (DPR) | 10 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 25010SD LM25010SDX/NOPB Active Production WSON (DPR) | 10 4500 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 25010SD LM25010SDX/NOPB.A Active Production WSON (DPR) | 10 4500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 25010SD LM25010SDX/NOPB.B Active Production WSON (DPR) | 10 4500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 25010SD (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 2

www.ti.com 23-May-2025 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM25010, LM25010-Q1 :

Catalog : LM25010
Automotive : LM25010-Q1 NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM25010MHX/NOPB HTSSOP PWP 14 2500 367.0 367.0 35.0 LM25010Q0MHX/NOPB HTSSOP PWP 14 2500 367.0 367.0 35.0 LM25010Q1MHX/NOPB HTSSOP PWP 14 2500 367.0 367.0 35.0 LM25010SD/NOPB WSON DPR 10 1000 200.0 183.0 25.0 LM25010SD/NOPB WSON DPR 10 1000 210.0 185.0 35.0 LM25010SDX/NOPB WSON DPR 10 4500 346.0 346.0 35.0 LM25010SDX/NOPB WSON DPR 10 4500 367.0 367.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) LM25010MH/NOPB PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010MH/NOPB PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010MH/NOPB.A PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010MH/NOPB.A PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010MH/NOPB.B PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010MH/NOPB.B PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010Q0MH/NOPB PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010Q0MH/NOPB.A PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010Q0MH/NOPB.B PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010Q1MH/NOPB PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010Q1MH/NOPB.A PWP HTSSOP 14 94 495 8 2514.6 4.06 LM25010Q1MH/NOPB.B PWP HTSSOP 14 94 495 8 2514.6 4.06 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C TYP6.6 6.2 12X 0.65 14X 0.30 0.19 3.9 (0.15) TYP 0 - 8 0.15 0.05 3.155 3.105 3.255 3.205 4X (0.2) NOTE 5

1.2 MAX

0.25 GAGE PLANE 0.75 0.50 (1) A NOTE 3 5.1 4.9 B 4.5 4.3 4X (0.05) NOTE 5 4214867/A 09/2016 PowerPAD TSSOP - 1.2 mm max heightPWP0014A PLASTIC SMALL OUTLINE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. Reference JEDEC registration MO-153. 5. Features may differ and may not be present. PowerPAD is a trademark of Texas Instruments. TM

0.1 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 2.400 THERMAL PAD 1 14

www.ti.com EXAMPLE BOARD LAYOUT (5.8)

0.05 MAX

0.05 MIN

14X (1.5) 14X (0.45) 12X (0.65) (3.4) NOTE 9 (5) NOTE 9 (3.155) (3.255) ( 0.2) TYP VIA (1.1) TYP (1.1) TYP (R0.05) TYP 4214867/A 09/2016 PowerPAD TSSOP - 1.2 mm max heightPWP0014A PLASTIC SMALL OUTLINE SYMM SYMM SEE DETAILS LAND PATTERN EXAMPLE SCALE:10X METAL COVERED BY SOLDER MASK SOLDER MASK DEFINED PAD TM NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature 9. Size of metal pad may vary due to creepage requirement. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS PADS 1-14 SOLDER MASK DEFINED SOLDER MASK METAL UNDER SOLDER MASK OPENING

www.ti.com EXAMPLE STENCIL DESIGN 14X (1.5) 14X (0.45) (3.155) (3.255) BASED ON

0.125 THICK

12X (0.65) (R0.05) TYP (5.8) 4214867/A 09/2016 PowerPAD TSSOP - 1.2 mm max heightPWP0014A PLASTIC SMALL OUTLINE 2.67 X 2.750.175 2.88 X 2.970.15 3.155 X 3.255 (SHOWN)0.125 3.53 X 3.640.1 SOLDER STENCIL OPENING STENCIL THICKNESS NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. TM SYMM SYMM 7 8 BASED ON METAL COVERED SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED SOLDER COVERAGE BY AREA SCALE:10X

www.ti.com PACKAGE OUTLINE C 10X 0.35 0.25 3 0.1 2.6 0.1 0.8 0.7 8X 0.8 10X 0.5 0.3 (0.1) TYP 3.2 0.05 0.00 B 4.1 3.9 A 4.1 3.9 (0.2) WSON - 0.8 mm max heightDPR0010A PLASTIC SMALL OUTLINE - NO LEAD 4218856/B 01/2021 PIN 1 INDEX AREA SEATING PLANE 0.08 C 5 6 PIN 1 ID 0.05 C THERMAL PAD EXPOSED SEE ALTERNATIVE LEAD DETAIL NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 3.000 20.000 FULL R ALTERNATIVE LEAD DETAIL BOTTOM VIEW SIDE VIEW

www.ti.com EXAMPLE BOARD LAYOUT (R0.05) TYP 8X (0.8)

0.07 MIN

ALL AROUND0.07 MAX ALL AROUND (2.6) (3.8) 10X (0.3) 10X (0.6) (3) ( 0.2) VIA TYP (1.25) (1.05) WSON - 0.8 mm max heightDPR0010A PLASTIC SMALL OUTLINE - NO LEAD 4218856/B 01/2021 SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED EXPOSED METAL METAL EDGE SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN 10X (0.3) 10X (0.6) 8X (0.8) (1.31) 4X (1.15) (0.76) (3.8) (R0.05) TYP (0.68) WSON - 0.8 mm max heightDPR0010A PLASTIC SMALL OUTLINE - NO LEAD 4218856/B 01/2021 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 11: 77% PRINTED SOLDER COVERAGE BY AREA SCALE:20X SYMM 5 6 SYMM METAL TYP

IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated

Product Information

LM25010Q1MHX/NOPB.B specifications and overview.

Summary

LM25010, LM25010-Q1 42-V, 1-A Step-Down Switching Regulator REVISED MAY 2016

Description

LM25010, LM25010-Q1 42-V, 1-A Step-Down Switching Regulator REVISED MAY 2016

Source title LM25010Q1MHX/NOPB.B Datasheet(PDF) - Texas Instruments

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