LM324_V01 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 17
Technical content
Features
- Short Circuited Protected Outputs
- True Differential Input Stage
- Single Supply Operation: 3.0 V to 32 V
- Low Input Bias Currents: 100 nA Maximum (LM324A)
- Four Amplifiers Per Package
- Internally Compensated
- Common Mode Range Extends to Negative Supply
- Industry Standard Pinouts
- ESD Clamps on the Inputs Increase Ruggedness without Affecting Device Operation
- NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant SOIC−14 D SUFFIX CASE 751A PIN CONNECTIONS Out 4 Inputs 4 VEE, GND Inputs 3 Out 3 Out 1 VCC Out 2 /C0042 /C0041Inputs 1 Inputs 2 (Top View) /C0041 /C0042 /C0042 /C0041 /C0041 /C0042 See general marking information in the device marking section on page 11 of this data sheet. DEVICE MARKING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
TSSOP−14 DTB SUFFIX CASE 948G
LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V, NCV2902 www.onsemi.com MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.) Rating Symbol Value Unit Power Supply Voltages Vdc Single Supply VCC 32 Split Supplies VCC, VEE ±16 Input Differential Voltage Range (Note 1) VIDR ±32 Vdc Input Common Mode Voltage Range VICR −0.3 to 32 Vdc Output Short Circuit Duration tSC Continuous Junction Temperature TJ 150 °C Thermal Resistance, Junction−to−Air (Note 2) Case 646 Case 751A Case 948G R/C0113JA 118 156 190 °C/W Storage Temperature Range Tstg −65 to +150 °C Operating Ambient Temperature Range TA °C LM224 −25 to +85 LM324, LM324A, LM324E 0 to +70 LM2902, LM2902E −40 to +105 LM2902V, NCV2902 (Note 3) −40 to +125 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Split Power Supplies. 2. All R /C0113JA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active. 3. NCV2902 is qualified for automitive use. ESD RATINGS Rating HBM MM Unit ESD Protection at any Pin (Human Body Model − HBM, Machine Model − MM) NCV2902 (Note 3) LM324E, LM2902E LM324DG/DR2G, LM2902DG/DR2G All Other Devices 2000 2000 200 2000 200 200 100 200 V V V V
LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V, NCV2902 www.onsemi.com ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.) LM224 LM324A LM324, LM324E LM2902, LM2902E LM2902V/NCV2902 Characteristics Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit Input Offset Voltage VIO mV VCC = 5.0 V to 30 V VICR = 0 V to VCC −1.7 V, VO = 1.4 V, RS = 0 /C0087 Average Temperature Coefficient of Input Offset Voltage TA = Thigh to Tlow (Notes 4 and 6) TA = Thigh to Tlow (Note 4) Average Temperature Coefficient of Input Offset Current /C0068IIO//C0068T − 10 − − 10 300 − 10 − − 10 − − 10 − pA/°C TA = Thigh to Tlow (Notes 4 and 6) Input Bias Current IIB − −90 −150 − −45 −100 − −90 −250 − −90 −250 − −90 −250 nA TA = Thigh to Tlow (Note 4) Input Common Mode Voltage Range (Note 5) VICR V VCC = 30 V TA = Thigh to Tlow (Note 4) 0 − 28 0 − 28 0 − 28 0 − 28 0 − 28 Differential Input Voltage Range Large Signal Open Loop Voltage Gain AVOL V/mV RL = 2.0 k/C0087, VCC = 15 V, for Large VO Swing 50 100 − 25 100 − 25 100 − 25 100 − 25 100 − TA = Thigh to Tlow (Note 4) Channel Separation 10 kHz ≤ f ≤ 20 kHz, Input Referenced Common Mode Rejection, RS ≤ 10 k/C0087 CMR 70 85 − 65 70 − 65 70 − 50 70 − 50 70 − dB Power Supply Rejection PSR 65 100 − 65 100 − 65 100 − 50 100 − 50 100 − dB 4. LM224: T low = −25°C, Thigh = +85°C LM324/LM324A/LM324E: Tlow = 0°C, Thigh = +70°C LM2902/LM2902E: Tlow = −40°C, Thigh = +105°C LM2902V & NCV2902: Tlow = −40°C, Thigh = +125°C NCV2902 is qualified for automotive use. 5. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude of VCC. 6. Guaranteed by design.
LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V, NCV2902 www.onsemi.com ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.) LM224 LM324A LM324, LM324E LM2902, LM2902E LM2902V/NCV2902 Characteristics Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit Output Voltage− High Limit VOH V VCC = 5.0 V, RL = 2.0 k/C0087, TA = 25°C VCC = 30 V RL = 2.0 k/C0087 (TA = Thigh to Tlow) (Note 7) VCC = 30 V RL = 10 k/C0087 (TA = Thigh to Tlow) (Note 7) 27 28 − 27 28 − 27 28 − 27 28 − 27 28 − Output Voltage − Low Limit, V CC = 5.0 V, RL = 10 k/C0087, TA = Thigh to Tlow (Note 7) Output Source Current (VID = +1.0 V, VCC = 15 V) IO + mA TA = 25°C 20 40 − 20 40 − 20 40 − 20 40 − 20 40 − TA = Thigh to Tlow (Note 7) 10 20 − 10 20 − 10 20 − 10 20 − 10 20 − Output Sink Current IO − mA (VID = −1.0 V, VCC = 15 V) TA = 25°C 10 20 − 10 20 − 10 20 − 10 20 − 10 20 − TA = Thigh to Tlow (Note 7) (VID = −1.0 V, VO = 200 mV, TA = 25°C) Output Short Circuit to Ground (Note 8) ISC − 40 60 − 40 60 − 40 60 − 40 60 − 40 60 mA Power Supply Current A = Thigh to Tlow) (Note 7) ICC mA VCC = 30 V VO = 0 V, RL = ∞ VCC = 5.0 V, VO = 0 V, RL = ∞ 7. LM224: T low = −25°C, Thigh = +85°C LM324/LM324A/LM324E: Tlow = 0°C, Thigh = +70°C LM2902/LM2902E: Tlow = −40°C, Thigh = +105°C LM2902V & NCV2902: Tlow = −40°C, Thigh = +125°C NCV2902 is qualified for automotive use. 8. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude of VCC. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Figure 1. Representative Circuit Diagram
accomplished by splitting the collectors of Q20 and Q18. Figure 2. Large Signal Voltage Follower Response
1.0 V/DIV
well as excellent power supply rejection.
3.0 V to VCC(max)
1.5 V to VCC(max)
1.5 V to VEE(max)
Figure 4. Gain and Phase Margin
voltage follower buffer to stabilize filter parameters. where fo and BW are expressed in Hz.
4 CRf R1 R3 = R2 R1
Figure 16. Function Generator Figure 17. Multiple Feedback Bandpass Filter
LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V, NCV2902 www.onsemi.com Device Operating Temperature Range Package Shipping† LM224DR2G −25°C to +85°C SOIC−14 (Pb−Free) 2500/Tape & Reel LM224DTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel LM324DR2G 0°C to +70°C SOIC−14 (Pb−Free) 2500/Tape & Reel LM324EDR2G SOIC−14 (Pb−Free) 2500/Tape & Reel LM324DTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel LM324ADR2G SOIC−14 (Pb−Free) 2500/Tape & Reel LM324ADTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel LM2902DR2G −40°C to +105°C SOIC−14 (Pb−Free) 2500/Tape & Reel LM2902EDR2G SOIC−14 (Pb−Free) 2500/Tape & Reel LM2902DTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel LM2902VDR2G −40°C to +125°C SOIC−14 (Pb−Free) 2500/Tape & Reel LM2902VDTBR2G TSSOP−14 (Pb−Free) 2500/Tape & Reel NCV2902DR2G* SOIC−14 (Pb−Free) 2500/Tape & Reel NCV2902DTBR2G* TSSOP−14 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
LM324, LM324A, LM324E, LM224, LM2902, LM2902E, LM2902V, NCV2902 www.onsemi.com MARKING DIAGRAMS x = 2 or 3 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or /C0071= Pb−Free Package SOIC−14 D SUFFIX CASE 751A *This marking diagram also applies to NCV2902. TSSOP−14 DTB SUFFIX CASE 948G x24 ALYW/C0071 /C0071 324A ALYW/C0071 /C0071 2902 ALYW/C0071 /C0071 2902 V ALYW/C0071 /C0071 LM324ADG AWLYWW LMx24DG AWLYWW LM2902DG AWLYWW LM2902VDG AWLYWW (Note: Microdot may be in either location) LMx24EG AWLYWW LM2902EG AWLYWW
PDIP−14 CASE 646−06 ISSUE S DATE 22 APR 2015 SCALE 1:1 14 8 GENERIC MARKING DIAGRAM* XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb −Free Package XXXXXXXXXXXX XXXXXXXXXXXX AWLYYWWG 1STYLES ON PAGE 2 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. b2NOTE 8 D A TOP VIEW B b L A C SEATING PLANE
0.010 CASIDE VIEW M
e NOTE 3 M B M eB E END VIEW END VIEW WITH LEADS CONSTRAINED DIM MIN MAX INCHES A −−−− 0.210 A1 0.015 −−−− b 0.014 0.022 C 0.008 0.014 D 0.735 0.775 D1 0.005 −−−− e 0.100 BSC E 0.300 0.325 M −−−− 10 −−− 5.33 0.38 −−− 0.35 0.56 0.20 0.36 18.67 19.69 0.13 −−−
2.54 BSC
7.62 8.26 −−− 10 MIN MAX MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK- AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT TO EXCEED 0.10 INCH. 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C. 6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNCONSTRAINED. 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE LEADS, WHERE THE LEADS EXIT THE BODY . 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE CORNERS). E1 0.240 0.280 6.10 7.11 0.060 TYP 1.52 TYP c A2 0.115 0.195 2.92 4.95 L 0.115 0.150 2.92 3.81 H NOTE 5 NOTE 6 M MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98ASB42428BDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2PDIP−14 © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
STYLE 1: PIN 1. COLLECTOR 2. BASE 3. EMITTER 4. NO CONNECTION 5. EMITTER 6. BASE 7. COLLECTOR 8. COLLECTOR 9. BASE 10. EMITTER 11. NO CONNECTION 12. EMITTER 13. BASE 14. COLLECTOR STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 6: PIN 1. COMMON CATHODE 2. ANODE/CATHODE 3. ANODE/CATHODE 4. NO CONNECTION 5. ANODE/CATHODE 6. NO CONNECTION 7. ANODE/CATHODE 8. ANODE/CATHODE 9. ANODE/CATHODE 10. NO CONNECTION 11. ANODE/CATHODE 12. ANODE/CATHODE 13. NO CONNECTION 14. COMMON ANODE STYLE 7: PIN 1. NO CONNECTION 2. ANODE 3. ANODE 4. NO CONNECTION 5. ANODE 6. NO CONNECTION 7. ANODE 8. ANODE 9. ANODE 10. NO CONNECTION 11. ANODE 12. ANODE 13. NO CONNECTION 14. COMMON CATHODE STYLE 8: PIN 1. NO CONNECTION 2. CATHODE 3. CATHODE 4. NO CONNECTION 5. CATHODE 6. NO CONNECTION 7. CATHODE 8. CATHODE 9. CATHODE 10. NO CONNECTION 11. CATHODE 12. CATHODE 13. NO CONNECTION 14. COMMON ANODE STYLE 10: PIN 1. COMMON CATHODE 2. ANODE/CATHODE 3. ANODE/CATHODE 4. ANODE/CATHODE 5. ANODE/CATHODE 6. NO CONNECTION 7. COMMON ANODE 8. COMMON CATHODE 9. ANODE/CATHODE 10. ANODE/CATHODE 11. ANODE/CATHODE 12. ANODE/CATHODE 13. NO CONNECTION 14. COMMON ANODE STYLE 11: PIN 1. CATHODE 2. CATHODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE 7. CATHODE 8. ANODE 9. ANODE 10. ANODE 11. ANODE 12. ANODE 13. ANODE 14. ANODE STYLE 12: PIN 1. COMMON CATHODE 2. COMMON ANODE 3. ANODE/CATHODE 4. ANODE/CATHODE 5. ANODE/CATHODE 6. COMMON ANODE 7. COMMON CATHODE 8. ANODE/CATHODE 9. ANODE/CATHODE 10. ANODE/CATHODE 11. ANODE/CATHODE 12. ANODE/CATHODE 13. ANODE/CATHODE 14. ANODE/CATHODE STYLE 4: PIN 1. DRAIN 2. SOURCE 3. GATE 4. NO CONNECTION 5. GATE 6. SOURCE 7. DRAIN 8. DRAIN 9. SOURCE 10. GATE 11. NO CONNECTION 12. GATE 13. SOURCE 14. DRAIN STYLE 5: PIN 1. GATE 2. DRAIN 3. SOURCE 4. NO CONNECTION 5. SOURCE 6. DRAIN 7. GATE 8. GATE 9. DRAIN 10. SOURCE 11. NO CONNECTION 12. SOURCE 13. DRAIN 14. GATE STYLE 9: PIN 1. COMMON CATHODE 2. ANODE/CATHODE 3. ANODE/CATHODE 4. NO CONNECTION 5. ANODE/CATHODE 6. ANODE/CATHODE 7. COMMON ANODE 8. COMMON ANODE 9. ANODE/CATHODE 10. ANODE/CATHODE 11. NO CONNECTION 12. ANODE/CATHODE 13. ANODE/CATHODE 14. COMMON CATHODE PDIP−14 CASE 646−06 ISSUE S DATE 22 APR 2015 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98ASB42428BDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2PDIP−14 © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
SOIC−14 NB CASE 751A−03 ISSUE L DATE 03 FEB 2016SCALE 1:1 GENERIC MARKING DIAGRAM* XXXXXXXXXG AWLYWW XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb −Free Package STYLES ON PAGE 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. H 14 8 M0.25 B M C h X 45 SEATING PLANE A M /C0095 SAM0.25 B SC b13X B A E D e DETAIL A L DETAIL A DIM MIN MAX MIN MAX INCHESMILLIMETERS D 8.55 8.75 0.337 0.344 E 3.80 4.00 0.150 0.157 A 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 L 0.40 1.25 0.016 0.049 e 1.27 BSC 0.050 BSC A3 0.19 0.25 0.008 0.010 A1 0.10 0.25 0.004 0.010 M 0 7 0 7 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095 6.50 14X 0.58 14X 1.18 1.27 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 0.10 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “/C0071”, may or may not be present. Some products may not follow the Generic Marking. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 98ASB42565BDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2SOIC−14 NB onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
SOIC−14 CASE 751A−03 ISSUE L DATE 03 FEB 2016 STYLE 7: PIN 1. ANODE/CATHODE 2. COMMON ANODE 3. COMMON CATHODE 4. ANODE/CATHODE 5. ANODE/CATHODE 6. ANODE/CATHODE 7. ANODE/CATHODE 8. ANODE/CATHODE 9. ANODE/CATHODE 10. ANODE/CATHODE 11. COMMON CATHODE 12. COMMON ANODE 13. ANODE/CATHODE 14. ANODE/CATHODE STYLE 5: PIN 1. COMMON CATHODE 2. ANODE/CATHODE 3. ANODE/CATHODE 4. ANODE/CATHODE 5. ANODE/CATHODE 6. NO CONNECTION 7. COMMON ANODE 8. COMMON CATHODE 9. ANODE/CATHODE 10. ANODE/CATHODE 11. ANODE/CATHODE 12. ANODE/CATHODE 13. NO CONNECTION 14. COMMON ANODE STYLE 6: PIN 1. CATHODE 2. CATHODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE 7. CATHODE 8. ANODE 9. ANODE 10. ANODE 11. ANODE 12. ANODE 13. ANODE 14. ANODE STYLE 1: PIN 1. COMMON CATHODE 2. ANODE/CATHODE 3. ANODE/CATHODE 4. NO CONNECTION 5. ANODE/CATHODE 6. NO CONNECTION 7. ANODE/CATHODE 8. ANODE/CATHODE 9. ANODE/CATHODE 10. NO CONNECTION 11. ANODE/CATHODE 12. ANODE/CATHODE 13. NO CONNECTION 14. COMMON ANODE STYLE 3: PIN 1. NO CONNECTION 2. ANODE 3. ANODE 4. NO CONNECTION 5. ANODE 6. NO CONNECTION 7. ANODE 8. ANODE 9. ANODE 10. NO CONNECTION 11. ANODE 12. ANODE 13. NO CONNECTION 14. COMMON CATHODE STYLE 4: PIN 1. NO CONNECTION 2. CATHODE 3. CATHODE 4. NO CONNECTION 5. CATHODE 6. NO CONNECTION 7. CATHODE 8. CATHODE 9. CATHODE 10. NO CONNECTION 11. CATHODE 12. CATHODE 13. NO CONNECTION 14. COMMON ANODE STYLE 8: PIN 1. COMMON CATHODE 2. ANODE/CATHODE 3. ANODE/CATHODE 4. NO CONNECTION 5. ANODE/CATHODE 6. ANODE/CATHODE 7. COMMON ANODE 8. COMMON ANODE 9. ANODE/CATHODE 10. ANODE/CATHODE 11. NO CONNECTION 12. ANODE/CATHODE 13. ANODE/CATHODE 14. COMMON CATHODE STYLE 2: CANCELLED 98ASB42565BDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2SOIC−14 NB onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
TSSOP−14 WB CASE 948G ISSUE C DATE 17 FEB 2016 SCALE 2:1 DIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. /C0095/C0095/C0095/C0095 SU0.15 (0.006) T 2X L/2 SUM0.10 (0.004) V ST L −U− SEATING PLANE 0.10 (0.004) −T− ÇÇÇ ÇÇÇ SECTION N−N DETAIL E J J1 K ÉÉÉ ÉÉÉ DETAIL E F M −W− 0.25 (0.010) 814 PIN 1 IDENT. HG A D C B SU0.15 (0.006) T −V− 14X REFK N N GENERIC MARKING DIAGRAM* XXXX XXXX ALYW/C0071 /C0071 A = Assembly Location L = Wafer Lot Y = Year W = Work Week /C0071 = Pb−Free Package 7.06 14X 0.36 14X 1.26 0.65 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “/C0071”, may or may not be present. Some products may not follow the Generic Marking. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 98ASH70246ADOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TSSOP−14 WB onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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