LM211Q1

LM211-Q1 TI | Alldatasheet

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/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Qualified for Automotive Applications /C0068Fast Response Times /C0068Strobe Capability /C0068Maximum Input Bias Current. . . 150 nA /C0068Maximum Input Offset Current. . . 20 nA /C0068Can Operate From Single 5-V Supply description/ordering information The LM211 is a single high-speed voltage comparator. This device is designed to operate from a wide range of power-supply voltages, including ±15-V supplies for operational amplifiers and 5-V supplies for logic systems. The output levels are compatible with most TTL and MOS circuits. This comparator is capable of driving lamps or relays and switching voltages up to 50 V at 50 mA. All inputs and outputs can be isolated from system ground. The outputs can drive loads referenced to ground, V CC+ , or VCC− . Offset balancing and strobe capabilities are available, and the outputs can be wire-OR connected. If the strobe is low, the output is in the off state, regardless of the differential input. ORDERING INFORMATION /C0123 TA VIO max AT 25°C PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C 3 mV SOIC (D) Reel of 2500 LM211QDRQ1 LM211Q1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. functional block diagram BAL/STRB COL OUT IN− IN+ BALANCE EMIT OUT Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2008, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 EMIT OUT IN+ IN− VCC− VCC+ COL OUT BAL/STRB BALANCE D PACKAGE (TOP VIEW)

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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All resistor values shown are nominal. BAL/STRB BALANCE IN+ IN− 450 Ω 450 Ω 2.4 kΩ 1.2 kΩ 70 Ω 2.4 kΩ 1.2 kΩ 60 Ω 400 Ω 450 Ω 2 kΩ 200 Ω250 Ω 600 Ω 130 Ω 4 Ω 4 kΩ VCC+ VCC− EMIT OU T COL OUT 750 Ω 600 Ω Component Count Resistors 20 Diodes 2 EPI FET 1 Transistors 22

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC− . 2. Differential voltages are at IN+ with respect to IN−. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or ±15 V, whichever is less. 4. The output may be shorted to ground or either power supply. 5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 6. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN MAX UNIT VCC+ − VCC− Supply voltage 3.5 30 V VI Input voltage (|VCC ±| ≤ 15 V) VCC− +0.5 VCC+ −1.5 V TA Operating free-air temperature range −40 125 °C

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † MIN TYP ‡ MAX UNIT VIO Input offset voltage See Note 7 25°C 0.7 3 mVVIO Input offset voltage See Note 7 Full range 4 mV IIO Input offset current See Note 7 25°C 4 10 nAIIO Input offset current See Note 7 Full range 20 nA IIB Input bias current VO = 1 V to 14 V 25°C 75 100 nAIIB Input bias current V O = 1 V to 14 V Full range 150 nA IIL(S) Low-level strobe current (see Note 8) V(strobe) = 0.3 V, VID ≤ −10 mV 25°C −3 mA VICR Common-mode input voltage range Full range to −14.5 13.8 to −14.7 V AVD Large-signal differential voltage amplification VO = 5 V to 35 V, R L = 1 kΩ 25°C 40 200 V/mV High-level (collector) outputI(strobe) = −3 mA, VID = 5 mV, VOH = 35 V 25°C 0.2 10 nA IOH High-level (collector) output leakage current I(strobe) = −3 mA, VID = 5 mV, VOH = 35 V Full range 0.5 µAIOH leakage current VID = 5 mV, VOH = 35 V 25°C nA IOL = 50 mA VID = −5 mV 25°C 0.75 1.5 VOL Low-level (collector-to-emitter) IOL = 50 mA VID = −10 mV 25°C VVOL Low-level (collector-to-emitter) output voltage VCC+ = 4.5 V, VCC− = 0, VID = −6 mV Full range 0.23 0.4 Voutput voltage VCC+ = 4.5 V, VCC− = 0, IOL = 8 mA VID = −10 mV Full range ICC+ Supply current from VCC+ , output low VID = −10 mV, No load 25°C 5.1 6 mA ICC− Supply current from VCC− , output high VID = 10 mV, No load 25°C −4.1 −5 mA † Unless otherwise noted, all characteristics are measured with BALANCE and BAL/STRB open and EMIT OUT grounded. Full range for LM211Q is −40°C to 125°C. ‡ All typical values are at TA = 25°C. NOTES: 7. The offset voltages and offset currents given are the maximum values required to drive the collector output up to 14 V or down to 1 V with a pullup resistor of 7.5 kΩ to VCC+ . These parameters actually define an error band and take into account the worst-case effects of voltage gain and input impedance. 8. The strobe should not be shorted to ground; it should be current driven at −3 mA to −5 mA (see Figures 13 and 27). switching characteristics, VCC ± = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Response time, low-to-high-level output R C = 500 Ω to 5 V, C L = 5 pF, See Note 9 115 ns Response time, high-to-low-level outputR C = 500 Ω to 5 V, C L = 5 pF, See Note 9 165 ns NOTE 9: The response time specified is for a 100-mV input step with 5-mV overdrive and is the interval between the input step function and the instant when the output crosses 1.4 V.

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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−1 −0.5 0 − Output Voltage − V VOLTAGE TRANSFER CHARACTERISTICS 0.5 1 VO VID − Differential Input Voltage − mV VID VCC+ = 30 V 1 kΩ Output VCC− VI = 50 V VID VCC+ = 30 V 600 Ω VCC− Output COLLECTOR OUTPUT TRANSFER CHARACTERISTIC TEST CIRCUIT FOR FIGURE 3 EMITTER OUTPUT TRANSFER CHARACTERISTIC TEST CIRCUIT FOR FIGURE 3 Collector Output R L = 1 kΩ Emitter Output R L = 600 Ω VCC + = 30 V VCC− = 0 TA = 25°C Figure 3

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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−10 −15 t − Time − s 1.2 1.4 Differential Input Voltage − Output Voltage − VVO OUTPUT RESPONSE FOR VARIOUS INPUT OVERDRIVES 1.6 1.8 20 mV 100 mV 2 mV 5 mV VCC ± = ±15 V R E = 2 kΩ to −15 V TA = 25°C /C0109 Figure 7 t − Time − s OUTPUT RESPONSE FOR VARIOUS INPUT OVERDRIVES Differential Input Voltage − Output Voltage − VVO −10 −15 20 mV VCC ± = ±15 V R E = 2 kΩ to −15 V TA = 25°C 2 mV 5 mV 100 mV /C0109 VID VCC+ = 15 V R E = 2 kΩ VO VCC− = −15 V TEST CIRCUIT FOR FIGURES 6 AND 7

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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APPLICATION INFORMATION

Figure 11 through Figure 29 show various applications for the LM211 comparator. Figure 11. 100-kHz Free-Running Multivibrator pins should be shorted together. Figure 12. Offset Balancing Figure 13. Strobing Figure 14. Zero-Crossing Detector

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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Figure 18. Comparator and Solenoid Driver Figure 19. Strobing Both Input and Output Stages † Typical input current is 50 pA with inputs strobed off. Figure 20. Low-Voltage Adjustable Figure 21. Zero-Crossing Detector

/C0076/C0077/C0050/C0049/C0049/C0262/C0081/C0049 /C0068/C0073/C0070/C0070/C0069/C0082/C0069/C0078/C0084/C0073/C0065/C0076 /C0067/C0079/C0077/C0080/C0065/C0082/C0065/C0084/C0079/C0082 /C0087/C0073/C0084/C0072 /C0083/C0084/C0082/C0079/C0066/C0069/C0083 SLCS143A − APRIL 2004 − REVISED APRIL 2008

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15 µF 10 kΩ 1 MΩ VCC+ = 15 V TL081 OutputInput VCC− = −15 V 2 kΩ + Figure 25. Negative-Peak Detector † R1 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing dark current by an order of magnitude. Figure 26. Precision Photodiode Comparator Figure 27. Relay Driver With Strobe

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM211QDRG4Q1 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDRG4Q1.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDRQ1 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDRQ1.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM211-Q1 : Addendum-Page 1

www.ti.com 23-May-2025

• Catalog : LM211
• Enhanced Product : LM211-EP NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

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