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IN− IN+ BALANCE EMIT OUT Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community LM111,LM211,LM311 SLCS007I – SEPTEMBER 1973– REVISED JUNE 2015 LMx11QuadDifferentialComparators
1 Features 3 Description
The LM111, LM211, and LM311 devices are single 1• Fast Response Time: 165 ns high-speed voltage comparators. These devices are• Strobe Capability designed to operate from a wide range of power-
- Maximum Input Bias Current: 300 nA supply voltages, including ±15-V supplies for operational amplifiers and 5-V supplies for logic• Maximum Input Offset Current: 70 nA systems. The output levels are compatible with most• Can Operate From Single 5-V Supply TTL and MOS circuits. These comparators are• Available in Q-Temp Automotive capable of driving lamps or relays and switching voltages up to 50 V at 50 mA. All inputs and outputs– High-Reliability Automotive Applications can be isolated from system ground. The outputs can– Configuration Control and Print Support drive loads referenced to ground, VCC+ or VCC−. Offset– Qualification to Automotive Standards balancing and strobe capabilities are available, and
- On Products Compliant to MIL-PRF-38535, the outputs can be wire-OR connected. If the strobe is low, the output is in the off state, regardless of theAll Parameters Are Tested Unless Otherwise differential input.Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing Device Information(1) of All Parameters. PART NUMBER PACKAGE BODY SIZE LMx11D SOIC (8) 4.90 mm × 3.91 mm2 Applications LMx11DK LCCC (20) 8.89 mm × 8.89 mm• Desktop PCs LMx11JG CDIP (8) 9.60 mm × 6.67 mm LMx11P PDIP (8) 9.81 mm × 6.35 mm LMx11PS SOP (8) 6.20 mm × 5.30 mm LMx11PW TSSOP (8) 3.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM111,LM211,LM311 SLCS007I –SEPTEMBER 1973– REVISED JUNE 2015 www.ti.com Table of Contents
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision H (August 2003) to Revision I Page
- Added Applications, Device Information table, Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
2 Submit Documentation Feedback Copyright © 1973–2015, Texas Instruments Incorporated
Product Folder Links: LM111 LM211 LM311
IN− NC NC EMIT OUT NC BALANCE NC NC NC NCCC−V CC+V EMIT OUT IN+ IN− VCC− VCC+ COL OUT BAL/STRB BALANCE LM111,LM211,LM311 www.ti.com SLCS007I – SEPTEMBER 1973– REVISED JUNE 2015
5 Pin Configuration and Functions
D, JG, P, PS, or PW Package FK Package 8-Pin SOIC, CDIP, PDIP, SOP or TSSOP 20-Pin LCCC(1) Top View Top View (1) NC = No internal connection Pin Functions PIN SOIC, CDIP, I/O(1) DESCRIPTION NAME PDIP, SOP, LCCC TSSOP 1IN+ 2 5 I Noninverting comparator 1IN– 3 7 I Inverting input comparator BALANCE 5 12 I Balance BAL/STRB 6 15 I Strobe COL OUT 7 17 O Output collector comparator EMIT OUT 1 2 O Output emitter comparator VCC– 4 10 — Negative supply VCC+ 8 20 — Positive supply NC — — No connect (No internal connection) (1) I = Input, O = Output Copyright © 1973–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM111 LM211 LM311
LM111,LM211,LM311 SLCS007I –SEPTEMBER 1973– REVISED JUNE 2015 www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCC+(2) 18 Supply voltage VCC– (2) –18 V VCC+ – VCC– 36 VID Differential input voltage(3) ±30 V VI Input voltage (either input)(2)(4) ±15 V Voltage from emitter output to VCC– 30 V LM111 50 LM211 50 Voltage from collector output to VCC– V LM211Q 50 LM311 40 Duration of output short circuit to ground 10 s TJ Operating virtual-junction temperature 150 °C Case temperature for 60 s FK package 260 °C Lead temperature 1,6 mm (1/16 inch) from case, 10 s J or JG package 300 °C D, P, PS, or PWLead temperature 1,6 mm (1/16 inch) from case, 60 s 260 °Cpackage Tstg Storage temperature range −65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC–. (3) Differential voltages are at IN+ with respect to IN–. (4) The magnitude of the input voltage must never exceed the magnitude of the supply voltage or ±15 V, whichever is less.
6.2 ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000ElectrostaticV(ESD) Vdischarge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
VCC+ – VCC– Supply voltage 3.5 30 V VI Input voltage (|VCC+| ≤ 15 V) VCC– + 0.5 VCC+ – 1.5 V LM111 –55 125 LM211 –40 85 TA Operating free-air temperature range °C LM211Q –40 125 LM311 0 70
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Product Folder Links: LM111 LM211 LM311
LM111,LM211,LM311 www.ti.com SLCS007I – SEPTEMBER 1973– REVISED JUNE 2015
6.4 Thermal Information (8-Pin Packages)
PWTHERMAL METRIC(1) D (SOIC) P (PDIP) PS (SOP) JG (CDIP) UNIT(TSSOP)
8 PINS 8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 97 85 95 149 — °C/W RθJC(top) Junction-to-case (top) thermal resistance — — — — 14.5 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 Thermal Information (20-Pin Package)
THERMAL METRIC(1) FK (LCCC) UNIT
20 PINS
RθJC(top) Junction-to-case (top) thermal resistance 5.61 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.6 Electrical Characteristics
at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) LM111 LM211 LM311 PARAMETER TEST CONDITIONS TA (1) UNITLM211Q MIN TYP(2) MAX MIN TYP(2) MAX 25°C 0.7 3 2 7.5 VIO Input offset voltage See(3) mV Full range 4 10 25°C 4 10 6 50 IIO Input offset current See(3) nA Full range 20 70 25°C 75 100 100 250 IIB Input bias current 1 V ≤ VO ≤ 14 V nA Full range 150 300 Low-level V(strobe) = 0.3 V,IIL(S) 25°C –3 –3 mAstrobe current(4) VID ≤ –10 mV Common-mode Lower range –14.7 –14.5 –14.7 –14.5 VICR input-voltage Full range V Upper range 13 13.8 13 13.8range(3) Large-signal AVD differential-voltage 5 V ≤ VO ≤ 35 V, RL = 1 kΩ 25°C 40 200 40 200 V/mV amplification 25°C 0.2 10 nAHigh-level I(strobe) = –3 mA, VOH = 35 V(collector) VID = 5 mVIOH Full range 0.5 μAoutput leakage current VID = 5 mV, VOH = 35 V 25°C 0.2 50 nA VID = –5 mV 25°C 0.75 1.5 output voltage VCC– = 0 V, VID = –10 mV Full range 0.23 0.4IOL = 8 mA Supply current from ICC+ VCC+ VID = –10 mV, No load 25°C 5.1 6 5.1 7.5 mA output low Supply current from ICC– VCC– VID = 10 mV, No load 25°C –4.1 –5 –4.1 –5 mA output high (1) Unless otherwise noted, all characteristics are measured with BALANCE and BAL/STRB open and EMIT OUT grounded. Full range for LM111 is –55°C to 125°C, for LM211 is –40°C to 85°C, for LM211Q is –40°C to 125°C, and for LM311 is 0°C to 70°C. (2) All typical values are at TA = 25°C. (3) The offset voltages and offset currents given are the maximum values required to drive the collector output up to 14 V or down to 1 V with a pullup resistor of 7.5 kΩ to VCC+. These parameters actually define an error band and take into account the worst-case effects of voltage gain and input impedance. (4) The strobe must not be shorted to ground; it must be current driven at –3 mA to –5 mA (see Figure 18 and Figure 31). Copyright © 1973–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM111 LM211 LM311
LM111,LM211,LM311 SLCS007I –SEPTEMBER 1973– REVISED JUNE 2015 www.ti.com
6.7 Switching Characteristics
VCC± = ±15 V, TA = 25°C LM111 LM211 LM211QPARAMETER TEST CONDITIONS UNIT LM311 TYP Response time, low-to-high-level outputSee(1) 115 ns RC = 500 Ω to 5 V, CL = 5 pF, see (2) Response time, high-to-low-level outputSee(1) 165 ns (1) The response time specified is for a 100-mV input step with 5-mV overdrive and is the interval between the input step function and the instant when the output crosses 1.4 V. (2) The package thermal impedance is calculated in accordance with MIL-STD-883.
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Product Folder Links: LM111 LM211 LM311
6.8 Typical Characteristics
Condition 1 is with BALANCE and BAL/STRB open. Condition 1 is with BALANCE and BAL/STRB open. Condition 2 is with BALANCE and BAL/STRB connected to VCC+. Condition 2 is with BALANCE and BAL/STRB connected to VCC+. Figure 1. Input Offset Current vs Free-Air Temperature Figure 2. Input Bias Current vs Free-Air Temperature Figure 3. Output Response for Various Input Overdrives Figure 4. Output Response for Various Input Overdrives Figure 5. Output Current and Dissipation vs Output Voltage Figure 6. Positive Supply Current vs Positive Supply
Figure 8. Voltage Transfer Characteristics and Test CircuitsFigure 7. Negative Supply Current vs Negative Supply
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40 V (LM311)
7 Parameter Measurement Information
Figure 9. Collector Output Transfer Characteristic Figure 10. Emitter Output Transfer Characteristic Figure 11. Test Circuit for Figure 3 and Figure 4 Figure 12. Test Circuit for Figure 14 and Figure 15
IN− 450 Ω 450 Ω 2.4 kΩ 1.2 kΩ 70 Ω 2.4 kΩ 1.2 kΩ 60 Ω 400 Ω 450 Ω 2 kΩ 200 Ω250 Ω 600 Ω 130 Ω 4 Ω 4 kΩ VCC+ VCC− EMIT OUT COL OUT 750 Ω 600 Ω Component Count Resistors 20 Diodes 2 EPI FET 1 Transistors 22 LM111,LM211,LM311 SLCS007I –SEPTEMBER 1973– REVISED JUNE 2015 www.ti.com
8 Detailed Description
8.1 Overview
The LM111, LM211 and LM311 are voltage comparators that have input currents nearly a thousand times lower than legacy standard devices. They are also designed to operate over a wider range of supply voltages: from standard ±15V op amp supplies down to the single 5-V supply used for IC logic. Their output is compatible with RTL, DTL and TTL as well as MOS circuits. Further, they can drive lamps or relays, switching voltages up to 50 V at currents as high as 50 mA. Both the inputs and the outputs of the LM111, LM211 or the LM311 can be isolated from system ground, and the output can drive loads referred to ground, the positive supply or the negative supply. Offset balancing and strobe capability are provided and outputs can be wire ORed. The LM211 is identical to the LM111, except that its performance is specified over a −25°C to +85°C temperature range instead of −55°C to +125°C. The LM311 has a temperature range of 0°C to +70°C.
8.2 Functional Block Diagram
8.3 Feature Description
LMx11 consists of a PNP input stage to sense voltages near VCC–. It also contains balance and strobe pins for external offset adjustment or trimming. The input stage is followed by a very high gain stage for very fast response after a voltage difference on the input pins have been sensed.
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Product Folder Links: LM111 LM211 LM311
LM111,LM211,LM311 www.ti.com SLCS007I – SEPTEMBER 1973– REVISED JUNE 2015 Feature Description (continued) This is then followed by the output stage that consists of an open collector NPN (pulldown or low-side) transistor. Unlike most open drain comparators, this NPN output stage has an isolated emitter from VCC–, allowing this device to set the VOL output value for collector output.
8.4 Device Functional Modes
8.4.1 Voltage Comparison
The LMx11 operates solely as a voltage comparator, comparing the differential voltage between the positive and negative pins and outputting a logic low or high impedance (logic high with pullup) based on the input differential polarity. Copyright © 1973–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM111 LM211 LM311
9 Application and Implementation
the design implementation to confirm system functionality.
9.1 Application Information
9.2 Typical Application
Figure 13. Zero-Crossing Detector
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters. Table 1. Design Parameters
9.2.2 Detailed Design Procedure
- Input voltage range
- Minimum overdrive voltage
- Output and drive current
- Response time
9.2.2.1 Input Voltage Range
outside of this range can yield incorrect comparisons. The following list describes the outcomes of some input voltage situations.
12 Submit Documentation Feedback Copyright © 1973–2015, Texas Instruments Incorporated
P PULLUP LR C/c116 /c64 /c180 LM111,LM211,LM311 www.ti.com SLCS007I – SEPTEMBER 1973– REVISED JUNE 2015
- When both IN– and IN+ are both within the common-mode range: – If IN– is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking current – If IN– is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is not conducting
- When IN– is higher than common mode and IN+ is within common mode, the output is low and the output transistor is sinking current
- When IN+ is higher than common mode and IN– is within common mode, the output is high impedance and the output transistor is not conducting
- When IN– and IN+ are both higher than common mode, the output is undefined
9.2.2.2 Minimum Overdrive Voltage
Overdrive voltage is the differential voltage produced between the positive and negative inputs of the comparator over the offset voltage (VIO). In order to make an accurate comparison the Overdrive voltage (VOD) must be higher than the input offset voltage (VIO). Overdrive voltage can also determine the response time of the comparator, with the response time decreasing with increasing overdrive. Figure 14 and Figure 15 show positive and negative response times with respect to overdrive voltage.
9.2.2.3 Output and Drive Current
Output current is determined by the pullup resistance and pullup voltage. The output current produces a output low voltage (VOL) from the comparator, in which VOL is proportional to the output current. Use Figure 5 to determine VOL based on the output current. The output current can also effect the transient response.
9.2.2.4 Response Time
The load capacitance (CL), pullup resistance (RPULLUP), and equivalent collector-emitter resistance (RCE) levels determine the transient response. Equation 1 approximates the positive response time. Equation 2 approximates the negative response time. RCE can be determine by taking the slope of Figure 5 in the linear region at the desired temperature, or by Equation 3. (1) (2) where
- VOL is the low-level output voltage
- IOUT is the output current (3) Copyright © 1973–2015, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LM111 LM211 LM311
9.2.3 Application Curves
Figure 14. Output Response for Various Input Overdrives Figure 15. Output Response for Various Input Overdrives
9.3 System Examples
Figure 16 through Figure 33 show various applications for the LM111, LM211, and LM311 comparators. Figure 16. 100-kHz Free-Running Multivibrator Figure 17. Offset Balancing
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† Typical input current is 50 pA with inputs strobed off. Figure 22. Comparator and Solenoid Driver Figure 23. Strobing Both Input and Output Stages Figure 24. Low-Voltage Adjustable Reference Figure 25. Zero-Crossing Detector Driving MOS Figure 26. Precision Squarer
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† R1 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing dark current by an order o f magnitude. Figure 30. Precision Photodiode Comparator Figure 31. Relay Driver With Strobe
18 Submit Documentation Feedback Copyright © 1973–2015, Texas Instruments Incorporated
8 VCC+
7 COL OUT
6 BAL/STROB
5 BALANCE
10 Power Supply Recommendations
input and create an inaccurate comparison.
11 Layout
11.1 Layout Guidelines
supply and negative supply (if available).
11.2 Layout Example
Figure 34. LMx11 Layout Example
20 Submit Documentation Feedback Copyright © 1973–2015, Texas Instruments Incorporated
12 Device and Documentation Support
12.1 Related Links
resources, tools and software, and quick access to sample or buy. Table 2. Related Links
12.2 Community Resources
solve problems with fellow engineers. contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
this document. For browser based versions of this data sheet, refer to the left hand navigation.
www.ti.com 27-Jul-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples JM38510/10304BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /10304BPA LM111FKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 LM111FKB LM111JG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 LM111JG LM111JGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 LM111JGB LM211D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 LM211P LM211PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 LM211P LM211PW ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211QD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q
www.ti.com 27-Jul-2016 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM211QDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM311-MWC ACTIVE WAFERSALE YS 0 1 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LM311D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 LM311 LM311DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM311P LM311PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 LM311P LM311PSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PW ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PWG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI LM311PWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L311
www.ti.com 27-Jul-2016 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples LM311PWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311Y OBSOLETE DIESALE Y 0 TBD Call TI Call TI M38510/10304BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /10304BPA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
www.ti.com 27-Jul-2016 Addendum-Page 4 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM211 :
- Automotive: LM211-Q1
- Enhanced Product: LM211-EP NOTE: Qualified Version Definitions:
- Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
- Enhanced Product - Supports Defense, Aerospace and Medical Applications
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 4-Nov-2015 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM211DR SOIC D 8 2500 340.5 338.1 20.6 LM211DR SOIC D 8 2500 367.0 367.0 35.0 LM211DRG4 SOIC D 8 2500 340.5 338.1 20.6 LM211DRG4 SOIC D 8 2500 367.0 367.0 35.0 LM211PWR TSSOP PW 8 2000 367.0 367.0 35.0 LM311DR SOIC D 8 2500 364.0 364.0 27.0 LM311DR SOIC D 8 2500 367.0 367.0 35.0 LM311DR SOIC D 8 2500 340.5 338.1 20.6 LM311DRG4 SOIC D 8 2500 367.0 367.0 35.0 LM311DRG4 SOIC D 8 2500 340.5 338.1 20.6 LM311PSR SO PS 8 2000 367.0 367.0 38.0 LM311PWR TSSOP PW 8 2000 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 4-Nov-2015 Pack Materials-Page 2
MCER001A – JANUARY 1995 – REVISED JANUARY 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.310 (7,87) 0.290 (7,37) 0.014 (0,36) 0.008 (0,20) Seating Plane 4040107/C 08/96 0.065 (1,65) 0.045 (1,14) 0.020 (0,51) MIN 0.400 (10,16) 0.355 (9,00) 0.015 (0,38) 0.023 (0,58) 0.063 (1,60) 0.015 (0,38) 0.200 (5,08) MAX 0.130 (3,30) MIN 0.245 (6,22) 0.280 (7,11) 0.100 (2,54) 0°–15° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8
www.ti.com PACKAGE OUTLINE C TYP6.6 6.2
1.2 MAX
6X 0.65 8X 0.30 0.19 1.95 0.15 0.05 (0.15) TYP 0 - 8 0.25 GAGE PLANE 0.75 0.50 A NOTE 3 3.1 2.9 B NOTE 4 4.5 4.3 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. 1 8
0.1 C A B
0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800
www.ti.com EXAMPLE BOARD LAYOUT (5.8)
0.05 MAX
0.05 MIN
8X (1.5) 8X (0.45) 6X (0.65) (R ) TYP 0.05 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE SYMM SYMM LAND PATTERN EXAMPLE SCALE:10X 4 5 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED
www.ti.com EXAMPLE STENCIL DESIGN (5.8) 6X (0.65) 8X (0.45) 8X (1.5) (R ) TYP0.05 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 4 5 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X
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