LM20134

LM20134_08 NSC | Alldatasheet

Document overview

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Technical content

Features

■ Input voltage range 2.95V to 5.5V ■ Accurate current limit minimizes inductor size ■ 97% peak efficiency ■ Frequency synchronization pin ■ 32 mΩ integrated FET switches ■ Starts up into pre-biased loads ■ Output voltage tracking ■ Peak current mode control ■ Adjustable output voltage down to 0.8V ■ Adjustable Soft-Start with external capacitor ■ Precision enable pin with hysteresis ■ Integrated OVP, UVLO, power good and thermal shutdown ■ eTSSOP-16 exposed pad package

Applications

■ Simple to design, high efficiency point of load regulation from a 5V or 3.3V bus ■ High Performance DSPs, FPGAs, ASICs and microprocessors ■ Broadband, Networking and Optical Communications Infrastructure Typical Application Circuit 30030401 PowerWise® is a registered trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation 300304 www.national.com LM20134 4A, PowerWise Synchronous Buck Regulator with Synchronization

Ordering Information

Order Number Package Type NSC Package Drawing Package Marking Supplied As LM20134MH eTSSOP-16 MXA16A 20134MH 92 Units of Rail LM20134MHE 250 Units of Tape and Reel LM20134MHX 2500 Units of Tape and Reel Pin Descriptions Pin # Name Description 1 SS/TRK Soft-Start or Tracking control input. An internal 5 µA current source charges an external capacitor to set the Soft-Start ramp rate. If driven by a external source less tan 800 mV, this pin overrides the internal reference that sets the output voltage. If left open, an internal 1ms Soft-Start ramp is activated. 2 FB Feedback input to the error amplifier from the regulated output. This pin is connected to the inverting input of the internal transconductance error amplifier. An 800 mV reference connected to the non- inverting input of the error amplifier sets the closed loop regulation voltage at the FB pin. 3 PGOOD Power good output signal. Open drain output indicating the output voltage is regulating within tolerance. A pull-up resistor of 10 to 100 kΩ is recommend for most applications. 4 COMP External compensation pin. Connect a resistor and capacitor to this pin to compensate the device. 5 NC These pins must be connected to GND to ensure proper operation. 6,7 PVIN Input voltage to the power switches inside the device. These pins should be connected together at the device. A low ESR capacitor should be placed near these pins to stabilize the input voltage. 8,9 SW Switch pin. The PWM output of the internal power switches. 10,11 PGND Power ground pin for the internal power switches. 12 EN Precision enable input for the device. An external voltage divider can be used to set the device turn- on threshold. If not used the EN pin should be connected to PVIN. 13 VCC Internal 2.7V sub-regulator. This pin should be bypassed with a 1 µF ceramic capacitor. 14 AVIN Analog input supply that generates the internal bias. Must be connected to VIN through a low pass RC filter. 15 AGND Quiet analog ground for the internal bias circuitry. 16 SYNC Frequency synchronization pin. An external clock connected to this pin will set the switching frequency. If left open the device will operate at approximately 410 kHz. EP Exposed Pad Exposed metal pad on the underside of the package with a weak electrical connection to ground. It is recommended to connect this pad to the PC board ground plane in order to improve heat dissipation. www.national.com 2 LM20134

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Voltages from the indicated pins to GND AVIN, PVIN, EN, PGOOD, SS/ TRK, COMP, FB, SW, SYNC -0.3V to +6V Storage Temperature -65°C to 150°C Junction Temperature 150°C Power Dissipation (Note 2) 2.6W Lead Temperature (Soldering, 10 sec) 260°C Minimum ESD Rating (Note 3) ±2kV Operating Ratings PVIN, AVIN to GND 2.95V to 5.5V Junction Temperature −40°C to + 125°C Electrical Characteristics Unless otherwise stated, the following conditions apply: AVIN = PVIN = VIN = 5V. Limits in standard type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Symbol Parameter Conditions Min Typ Max Unit ΔVOUT/ΔIOUT Load Regulation IOUT = 100 mA to 4A 0.08 %/A ICL Switch Current Limit Threshold VIN = 3.3V 5.8 6.4 7.9 A RDS_ON High-Side Switch On Resistance ISW = 3.5A 36 55 mΩ RDS_ON Low-Side Switch On Resistance ISW = 3.5A 32 52 mΩ IQ Operating Quiescent Current Non-switching, VFB = VCOMP 3.5 6 mA ISD Shutdown Quiescent current VEN = 0V 90 180 µA VUVLO VIN Under Voltage Lockout Rising VIN 2.45 2.7 2.95 V VUVLO_HYS VIN Under Voltage Lockout Hysteresis Falling VIN 45 100 mV VVCC VCC Voltage IVCC = 0 µA 2.45 2.7 2.95 V ISS Soft-Start Pin Source Current VSS/TRK = 0V 2 4.5 7 µA VTRACK SS/TRK Accuracy, VSS - VFB VSS/TRK = 0.4V -10 3 15 mV Oscillator and Clock Synchronization FOSC Oscillator Frequency VSYNC = Static 360 410 460 kHz FOSCH Maximum SYNC Frequency 1500 kHz FOSCL Minimum SYNC Frequency 460 kHz VIH_SYNC SYNC pin Logic High 2 V VIL_SYNC SYNC pin Logic Low 0.8 V ISYNC SYNC pin input leakage VSYNC = 5V 10 nA DCMAX Maximum Duty Cycle ILOAD = 0A 85 % TON_TIME Minimum On Time 100 ns TCL_BLANK Current Sense Blanking Time After Rising VSW 80 ns Error Amplifier and Modulator IFB Feedback pin bias current VFB = 0.8V 1 100 nA ICOMP_SRC COMP Output Source Current VFB = VCOMP = 0.6V 80 100 µA ICOMP_SNK COMP Output Sink Current VFB = 1.0V, VCOMP = 0.6V 80 100 µA gm Error Amplifier Transconductance ICOMP = ± 50 µA 450 510 600 µmho AVOL Error Amplifier Voltage Gain 2000 V/V Power Good VOVP Over Voltage Protection Rising Threshold With respect to VFB 105 108 111 % VOVP_HYS Over Voltage Protection Hysteresis 2 3 % VPGTH PGOOD Rising Threshold With respect to VFB 92 94 96 % VPGHYS PGOOD Falling Hysteresis 2 3 % TPGOOD PGOOD deglitch time 16 µs IOL PGOOD Low Sink Current VPGOOD = 0.4V 0.6 1 mA IOH PGOOD High Leakage Current VPGOOD = 5V 5 100 nA 3 www.national.com LM20134

Symbol Parameter Conditions Min Typ Max Unit Enable VIH_EN EN Pin Turn on Threshold VEN Rising 1.08 1.18 1.28 V VEN_HYS EN Pin Hysteresis 66 mV Thermal Shutdown TSD Thermal Shutdown 160 °C TSD_HYS Thermal Shutdown Hysteresis 10 °C Thermal Resistance θJA Junction to Ambient 38 °C/W Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ_MAX, the junctions-to-ambient thermal resistance, θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD_MAX = (TJ_MAX – TA)/θJA. The maximum power dissipations of 2.6W is determined using TA = 25°C, θJA = 38°C/W, and TJ_MAX = 125°C. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor to each pin. Typical Performance Characteristics Unless otherwise specified: CIN = COUT = 100 µF, L = 1.0 µH (Coilcraft MSS1038), VIN = 5V, VOUT = 1.2V, RLOAD = 1.2Ω, fSW = 1 MHz, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Efficiency vs. Load Current (VIN = 5V, fSW = 1 MHz) 30030431 Efficiency vs. Load Current (VIN = 3.3V, fSW = 1 MHz) 30030430 Efficiency vs. Load Current (VIN = 5V, fSW = 500 kHz) 30030449 Efficiency vs. Load Current (VIN = 3.3V, fSW = 500 kHz) 30030448 www.national.com 4 LM20134

High-Side FET resistance vs. Temperature 30030452 Low-Side FET resistance vs. Temperature 30030453 Error Amplifier Gain vs. Frequency 30030436 Line Regulation 30030437 Load Regulation 30030438 Feedback Pin Voltage vs. Temperature 30030451 5 www.national.com LM20134

Switching Frequency vs. Temperature 30030439 Switch Synchronization 30030460 Quiescent Current vs. Temperature (Not Switching) 30030440 Shutdown Current vs. VIN 30030441 Enable Threshold vs. Temperature 30030428 UVLO Threshold vs. Temperature 30030445 www.national.com 6 LM20134

Peak Current Limit vs. Temperature 30030442 Peak Current Limit vs. VOUT 30030454 Peak Current Limit vs. VIN 30030455 Load Transient Response 30030434 Line Transient Response 30030443 Start-Up (Soft-Start) 30030444 7 www.national.com LM20134

Start-Up (Tracking) 30030433 Power Down 30030432 Short Circuit Input Current vs. VIN 30030456 PGOOD vs. IPGOOD 30030427 www.national.com 8 LM20134

9 www.national.com LM20134

The LM20134 switching regulator features all of the functions necessary to implement an efficient low voltage buck regula- tor using a minimum number of external components. This easy to use regulator features two integrated switches and is capable of supplying up to 4A of continuous output current. The regulator utilizes peak current mode control with nonlin- ear slope compensation to optimize stability and transient response over the entire output voltage range. Peak current mode control also provides inherent line feed-forward, cycle- by-cycle current limiting and easy loop compensation. The internal oscillator can synchronize up to 1.5 MHz minimizing the inductor size while still achieving efficiencies up to 96%. The precision internal voltage reference allows the output to be set as low as 0.8V. Fault protection features include: cur- rent limiting, thermal shutdown, over voltage protection, and shutdown capability. The device is available in the eTSSOP-16 package featuring an exposed pad to aid thermal dissipation. The LM20134 can be used in numerous applica- tions to efficiently step-down from a 5V or 3.3V bus. The typical application circuit for the LM20134 is shown in Figure 2 in the design guide. PRECISION ENABLE The enable (EN) pin allows the output of the device to be en- abled or disabled with an external control signal. This pin is a precision analog input that enables the device when the volt- age exceeds 1.18V (typical). The EN pin has 66 mV of hys- teresis and will disable the output when the enable voltage falls below 1.11V (typical). If the EN pin is not used, it should be connected to VIN. Since the enable pin has a precise turn on threshold it can be used along with an external resistor divider network from VIN to configure the device to turn on at a precise input voltage. The precision enable circuitry will re- main active even when the device is disabled. FREQUENCY SYNCHRONIZATION The frequency synchronization pin (SYNC) allows the switch- ing frequency of the device to be controlled with an external clock signal. This feature allows the user to synchronize mul- tiple converters, avoiding undesirable frequency bands of operation. When used with the SYNCOUT of the LM20154, multiple devices can be configured to switch out of phase re- ducing input capacitor requirements and EMI of the power supply system. The turn on of the high-side switch will lock-on to the rising edge of the SYNC pin input. The logic low level for the input clock must be below 0.8V and the logic high level must exceed 2.0V to guarantee proper operation. The device will synchro- nize to frequencies from 500 kHz to 1.5 MHz. If the synchro- nization clock is removed or not present during startup, the oscillator of the device will run at approximately 410 kHz. If the SYNC pin is not used it should be connected to ground. PEAK CURRENT MODE CONTROL In most cases, the peak current mode control architecture used in the LM20134 only requires two external components to achieve a stable design. The compensation can be select- ed to accommodate any capacitor type or value. The external compensation also allows the user to set the crossover fre- quency and optimize the transient performance of the device. For duty cycles above 50% all current mode control buck converters require the addition of an artificial ramp to avoid sub-harmonic oscillation. This artificial linear ramp is com- monly referred to as slope compensation. What makes the LM20134 unique is the amount of slope compensation will change depending on the output voltage. When operating at high output voltages the device will have more slope com- pensation than when operating at lower output voltages. This is accomplished in the LM20134 by using a non-linear parabolic ramp for the slope compensation. The parabolic slope compensation of the LM20134 is much better than the traditional linear slope compensation because it optimizes the stability of the device over the entire output voltage range. CURRENT LIMIT The precise current limit of the LM20134 is set at the factory to be within 10% over the entire operating temperature range. This enables the device to operate with smaller inductors that have lower saturation currents. When the peak inductor cur- rent reaches the current limit threshold, an over current event is triggered and the internal high-side FET turns off and the low-side FET turns on allowing the inductor current to ramp down until the next switching cycle. For each sequential over- current event, the reference voltage is decremented and PWM pulses are skipped resulting in a current limit that does not aggressively fold back for brief over-current events, while at the same time providing frequency and voltage foldback protection during hard short circuit conditions. SOFT-START AND VOLTAGE TRACKING The SS/TRK pin is a dual function pin that can be used to set the start up time or track an external voltage source. The start up or Soft-Start time can be adjusted by connecting a capac- itor from the SS/TRK pin to ground. The Soft-Start feature allows the regulator output to gradually reach the steady state operating point, thus reducing stresses on the input supply and controlling start up current. If no Soft-Start capacitor is used the device defaults to the internal Soft-Start circuitry re- sulting in a start up time of approximately 1ms. For applica- tions that require a monotonic start up or utilize the PGOOD pin, an external Soft-Start capacitor is recommended. The SS/TRK pin can also be set to track an external voltage source. The tracking behavior can be adjusted by two external resistors connected to the SS/TRK pin as shown in Figure 7 in the design guide. PRE-BIAS START UP CAPABILITY The LM20134 is in a pre-biased state when the device starts up with an output voltage greater than zero. This often occurs in many multi-rail applications such as when powering an FP- GA, ASIC, or DSP. In these applications the output can be pre-biased through parasitic conduction paths from one sup- ply rail to another. Even though the LM20134 is a syn- chronous converter it will not pull the output low when a pre- bias condition exists. During start up condition the LM20134 will not sink current until the Soft-Start voltage exceeds the voltage on the FB pin. Since the device can not sink current it protects the load from damage that might otherwise occur if current is conducted through the parasitic paths of the load. POWER GOOD AND OVER VOLTAGE FAULT HANDLING The LM20134 has built in under and over voltage compara- tors that control the power switches. Whenever there is an excursion in output voltage above the set OVP threshold, the part will terminate the present on-pulse, turn on the low-side FET, and pull the PGOOD pin low. The low-side FET will re- main on until either the FB voltage falls back into regulation or the zero cross detection is triggered which in turn tri-states the FETs. If the output reaches the UVP threshold the part will continue switching and the PGOOD pin will be asserted and www.national.com 10 LM20134

go low. Typical values for the PGOOD resistor are on the or- der of 100 kΩ or less. To avoid false tripping during transient glitches the PGOOD pin has 16 µs of built in deglitch time to both rising and falling edges. UVLO The LM20134 has a built-in under-voltage lockout protection circuit that keeps the device from switching until the input voltage reaches 2.7V (typical). The UVLO threshold has 45 mV of hysteresis that keeps the device from responding to power-on glitches during start up. If desired the turn-on point of the supply can be changed by using the precision enable pin and a resistor divider network connected to VIN as shown in Figure 6 in the design guide. THERMAL PROTECTION Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction tem- perature is exceeded. When activated, typically at 160°C, the LM20134 tri-states the power FETs and resets soft start. After the junction cools to approximately 150°C, the part starts up using the normal start up routine. This feature is provided to prevent catastrophic failures from accidental device over- heating. LIGHT LOAD OPERATION The LM20134 offers increased efficiency when operating at light loads. Whenever the load current is reduced to a point where the peak to peak inductor ripple current is greater than two times the load current, the part will enter the diode emu- lation mode preventing significant negative inductor current. The point at which this occurs is the critical conduction bound- ary and can be calculated by the following equation: Several diagrams are shown in Figure 1 illustrating continu- ous conduction mode (CCM), discontinuous conduction mode, and the boundary condition. It can be seen that in diode emulation mode, whenever the inductor current reaches zero the SW node will become high impedance. Ringing will occur on this pin as a result of the LC tank circuit formed by the inductor and the parasitic capaci- tance at the node. If this ringing is of concern an additional RC snubber circuit can be added from the switch node to ground. At very light loads, usually below 100mA, several pulses may be skipped in between switching cycles, effectively reducing the switching frequency and further improving light-load effi- ciency. 11 www.national.com LM20134

FIGURE 1. Modes of Operation for LM20134

designing for a specific output ripple or transient drop target. possible PVIN and PGND pins of the device. quirement for RMS current rating occurs at 50% duty cycle. best input filtering for the device. gestions for RFB1 and RFB2 for common output voltages. TABLE 1. Suggested Values for RFB1 and RFB2 calculated using the equation below. put capacitor and 1 µH inductor. TABLE 2. Recommended Compensation for FIGURE 4. LM20134 Loop Compensation and external compensation network.

value, non-ceramic output capacitors are used. network as shown in Figure 5 below. FIGURE 5. Compensation Network for LM20134 A good starting value for CC1 for most applications is 4.7 nF. pole (fP(FIL)) as shown in Figure 4. for desired transient droop and settling time. value and ESR as shown in the equation below. RC1 is the calculated compensation resistance. ceramic capacitor should be used for CF. ommended for most applications. start capacitors and the corresponding typical start up times. TABLE 3. Start Up Times for Different Soft-Start low can be used to calculate the start up time. capacitor will be discharged just prior to the Soft-Start ramp. be used without greatly affecting the start-up time.

FIGURE 10. Schematic of LM20134 Highlighting Layout Sensitive Nodes

Typical Application Circuits This section provides several application solutions with a bill of materials. All bill of materials reference the below figure. The compensation for these solutions were optimized to work over a wide range of input and output voltages; if a faster transient response is needed reduce the value of C C1 and calculate the new value for RC1 as outline in the design guide. 30030401 FIGURE 11. Bill of Materials (VIN = 5V, VOUT = 3.3V, IOUTMAX = 4A, FSYNC = 750kHz) Designator Description Part Number Manufacturer Qty U1 Synchronous Buck Regulator LM20134 National Semiconductor 1 CIN 47 µF, 1210, X5R, 6.3V GRM32ER60J476ME20 Murata 1 COUT 47 µF, 1210, X5R, 6.3V GRM32ER60J476ME20 Murata 1 L 1.5 µH, 8.1 mΩ MSS1038-152NL Coilcraft 1 RF 1Ω, 0603 CRCW06031R0J-e3 Vishay-Dale 1 CF 100 nF, 0603, X7R, 16V GRM188R71C104KA01 Murata 1 CVCC 1 µF, 0603, X5R, 6.3V GRM188R60J105KA01 Murata 1 RC1 10 kΩ, 0603 CRCW06031002F-e3 Vishay-Dale 1 CC1 1.8 nF, 0603, X7R, 25V VJ0603Y182KXXA Vishay-Vitramon 1 CSS 33 nF, 0603, X7R, 25V VJ0603Y333KXXA Vishay-Vitramon 1 RFB1 31.6 kΩ, 0603 CRCW06033162F-e3 Vishay-Dale 1 RFB2 10.2 kΩ, 0603 CRCW06031022F-e3 Vishay-Dale 1 Bill of Materials (VIN = 3.3V or 5V, VOUT = 1.2V, IOUTMAX = 4A, FSYNC = 750kHz) Designator Description Part Number Manufacturer Qty U1 Synchronous Buck Regulator LM20134 National Semiconductor 1 CIN 47 µF, 1210, X5R, 6.3V GRM32ER60J476ME20 Murata 1 COUT 47 µF, 1210, X5R, 6.3V GRM32ER60J476ME20 Murata 1 L 1.5 µH, 8.1 mΩ MSS1038-152NL Coilcraft 1 RF 1Ω, 0603 CRCW06031R0J-e3 Vishay-Dale 1 CF 100 nF, 0603, X7R, 16V GRM188R71C104KA01 Murata 1 CVCC 1 µF, 0603, X5R, 6.3V GRM188R60J105KA01 Murata 1 RC1 10 kΩ, 0603 CRCW06031002F-e3 Vishay-Dale 1 CC1 2.2 nF, 0603, X7R, 25V VJ0603Y222KXXA Vishay-Vitramon 1 CSS 33 nF, 0603, X7R, 25V VJ0603Y333KXXA Vishay-Vitramon 1 RFB1 4.99 kΩ, 0603 CRCW06034991F-e3 Vishay-Dale 1 RFB2 10 kΩ, 0603 CRCW06031002F-e3 Vishay-Dale 1 19 www.national.com LM20134

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead eTSSOP Package www.national.com 20 LM20134

21 www.national.com LM20134

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