LM181E06 PHILIPS | Alldatasheet

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Technical content

Datasheet sections

  • 1 GENERAL DESCRIPTION
  • 2 ABSOLUTE MAXIMUM RATINGS
  • 3 ELECTRICAL SPECIFICATIONS
  • 4 OPTICAL SPECIFICATIONS
  • 5 MECHANICAL CHARACTERISTICS
  • 6 RELIABILITY
  • 7 INTERNATIONAL STANDARDS
  • 8 PACKING
  • 9 PRECAUTIONS
  • 10 OTHERS -

Ver 0.0 APR.07, 2002 G T. Kim / G.Manager SPECIFICATION FOR APPROVAL ( ? ) Preliminary Specification ( ) Final Specification *When you obtain standard approval, please use the above model name without suffix SIGNATURE DATE Please return 1 copy for your confirmation with your signature and comments. Product Engineering Dept. LG. Philips LCD Co., Ltd APPROVED BY DATE REVIEWED BY PREPARED BY K.J. Kwon / Manager K N. Kim Engineer Title 18.1” SXGA TFT LCD BUYER Philips MODEL SUPPLIER LG.Philips LCD CO., Ltd. *MODEL LM181E06 SUFFIX A4M1

Ver 0.0 APR.07, 2002 RECORD OF REVISIONS Revision No DescriptionDate Page Ver 0.0 First Draft, Preliminary SpecificationsApr.07, 2002

Ver 0.0 APR.07, 2002 1. General Description The LM181E06-A4M1 is a Color Active Matrix Liquid Crystal Display with an integral Cold Cathode Fluorescent Lamp(CCFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive type display operating in the normally black mode. This TFT-LCD has a 18.1 inch diagonally measured active display area with SXGA resolution(1024 vertical by 1280 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus, presenting a palette of more than 16,777,216 colors. The LM181E06-A4M1 has been designed to apply the interface method that enables low power, high speed,low EMI. FPD Link must be used as a LVDS(Low Voltage Differential Signaling) chip. The LM181E06-A4M1 is intended to support applications where thin thickness, wide viewing angle, low power are critical factors and graphic displays are important. In combination with the vertical arrangement of the sub-pixels, the LM181E06-A4M1 characteristics provide an excellent flat panel display for office automation products such as monitors. General Features CN1 (30pin) LVDS pair #1 LVDS pair #2 Power Circuit Block +12V Vcc Source Driver Circuit TFT - LCD Panel (1280 × RGB × 1024 pixels) S1 S1280 G1024 Back light Assembly (6CCFL) CN2,3,4(2pin) RGB Timing Controller & LVDS 1 Chip Outline Dimension 389.0(H) x 317.2(V) x 27.0(D) mm(Typ.) Active screen size 18.1 inches (459.74mm) diagonal Pixel Pitch 0.2805 mm x 0.2805 mm Pixel Format 1280 horizontal By 1024 vertical Pixels RGB stripe arrangement Color depth 8-bits, 16,777,216 colors Luminance, white 250 cd/m2(Typ. Center 1 point) Power Consumption Weight 3100g (Typ.) Display operating mode Transmissive mode, normally black Surface treatments Hard coating (3H), Anti-glare treatment of the front polarizer Gate Driver Circuit CN5,6,7(2pin) Total 29.52 Watt(Typ.), (4.32Watt @Vcc, 25.2 Watt @250cd/? [Lamp=7mA])

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit. Table 1. ABSOLUTE MAXIMUM RATINGS Note : 1. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be 39 °C Max, and no condensation of water.

  1. Electrical Specifications

by an inverter. The inverter is an external unit to the LCD. Table 2. ELECTRICAL CHARACTERISTICS Note : The design of the inverter must have specifications for the lampin LCD Assembly. designed so as not to produce too much leakage current from high-voltage output of the inverter. the LCD Assembly should be operated in the same condition as installed in you instrument. a better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its leakage current. c. The ideal sine wave form shall be symmetric in positive and negative polarities.

Ver 0.0 APR.07, 2002 1. The specified current and power consumption are under the VCC=12.0V, 25°C, fV=60Hz condition, Typical supply current is measured at the condition of8 X 6 chess pattern(white & black) 2. This impedance value is for impedance matching between LVDS TX and the mating connector of the LCD. 3. The duration of rush current is about 1ms. 4. The variance of the voltage is ± 10%. 5. The voltage above VBS should be applied to the lamps for more than 1 second for start-up. Otherwise, the lamps may not be turned on. 6. The output of the inverter must have symmetrical (negative and positive) voltage waveform and symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference. 7. Let’s define the brightness of the lamp after being lighted for 5 minutes as 100%. TS is the time required for the brightness of the center of the lamp to be not less than 95%. The used lamp current is the lamp typical current. 8. The lamp power consumption shown above does not includeloss of external inverter. The used lamp current is the lamp typical current. 9. The life time is determined as the time at which brightness of the lamp is 50% compared to that of initial value at the typical lamp current on condition of continuous operating at 25 ± 2°C. Typical life time shall be defined that remained rate maintains over 50% of total amount at the life test. ? Do not attach a conductive tape to lamp connecting wire. If the lamp wire attach to a conducting tape, TFT-LCD Module has a low luminance and the inverter has abnormal action. Because leakage current is occurred between lamp wire and conducting tape. I p I -p * Asymmetry rate: | I p – I – p | / Irms * 100% * Distortion rate I p (or I – p) / Irms

Interface chip must be used LVDS, part No. DS90CF383MTD(Transmitter) made by Nation Semiconductor. Or used the compatible interface chips(TI:SN75LVDS83, Thine). This LCD employs seven interface connections, a 30-pin connector is used for the module electronics interface. Six 2-pin connectors are used for the integral back-light system. the connector is shown in the table 3. Table 3. MODULE CONNECTOR PIN CONFIGURATION(LVDS)

part number is SM02B-BHS-1 or equivalent. The pin configuration for the connector is shown in the table 4. Table 4. BACKLIGHT CONNECTOR PIN CONFIGURATION Note : 1. The high voltage side terminal is colored Pink & Blue & Gray.

  1. The low voltage side terminal is all White

The below is block diagram for pin configuration of lamp connector.

should be satisfied with the following specifications for it’s proper operation. Notes: " No Variation of Hsync(DE ) input is required for normal operation . "Input data shall be latched at the falling edge of DCLK.

  1. Please refer transmitter data sheets for the detail timing condition (required setup, hold time and

etc.) between video processor and LVDS transmitter.

  1. Horizontal sync shall be active high.
  2. Vertical sync shall be active high.
  3. Data enable shall be active high.

Table 6. TIMING TABLE

Ver 0.0 APR.07, 2002 3-4. Signal Timing Waveforms 0.7Vcc 0.3Vcc tCLK Invalid data Valid data Invalid data Invalid data Invalid data Pixel 0,0 Pixel 2,0 Pixel 1,0 Pixel 3,0 DE(Data Enable) Valid data

0.5 Vcc

DE(Data Enable) DE(Data Enable) DCLK First data Second data Hsync, Vsync, DE, Data tWH

Table 7. COLOR DATA REFERENCE

Notes : 1. Please avoid floating state of interface signal at invalid period.

  1. When the interface signal is invalid, be sure to pull down the power supply for LCD VCC to 0V.

Invalid signal with Vcc for a long period of time, causes permanent damage to LCD panel.

  1. Lamp power must be turn on after power supply for LCD and interface signals are valid.

Table 8. POWER SEQUENCE

surface at a viewing angle of Φ and θ equal to 0 °. FIG. 1 presents additional information concerning the measurement equipment and method. Table 9. OPTICAL CHARACTERISTICS

Ver 0.0 APR.07, 2002 Notes : 1. Contrast Ratio(CR) is defined mathematically as : Surface Luminance with all white pixels Contrast Ratio = Surface Luminance with all black pixels 2. Surface luminance is the center point across the LCD surface 50cm from the surface with all pixels displaying white under the condition of IBL = 7mArms . For more information see FIG 2. 3. The variation in surface luminance , δ WHITE is determined by measuring LON at each test position 1 through 9, and then dividing the maximum LON of 9 points luminance by minimum LON of 9 points luminance. For more information see FIG 2. δ WHITE = Maximum(LON1,LON2, … .. LON9) ÷ Minimum(LON1,LON2, … .. LON9) 4. TCO’99 Certification Requirements and test methods for environmentallabeling of display [ flat] Report No.2 (×1.5.2. Luminance Uniformity) 5. Response time is the time required for the display to transition from black to white(Rise Time, TrR) and from white to black(Decay Time, TrD). For additional information see FIG 3. 6. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to the LCD surface. For more information see FIG 4. 7. Cross talk shall be measured at the V and H position.(Windowsize : 427×341pixels) For more information see FIG. 5. 8. Gray scale specification Gray Level Min. Luminance (%) Typ. Max. L 0 - 0.25 0.57 L 31 - 0.77 1.82 L 63 1.61 4.5 7.40 L 95 5.43 11.3 17.1 L 127 10.4 20.2 30.0 L 159 L 191 L 223 L 255 18.1 32.4 46.6 30.8 49.1 67.5 50.1 69.8 89.5 - 100 - =Cross talk Luminance at pattern A (Luminance at pattern A – Luminance at pattern B) × 100%

Ver 0.0 APR.07, 2002 FIG. 2 Luminance <Measuring point for luminance variation> <Measuring point for surface luminance> H V H/2 V/2 FIG. 3 Response Time The response time is defined as the following figure and shall be measured by switching the input signal for “black” and “white”. TrR TrD 100 Optical Response white blackblack A : H / 10 mm B : V / 10 mm H : 359.040 mm V : 287.232 mm @ H,V : Active Area B H A V Active Area H/2 V/2

Ver 0.0 APR.07, 2002 FIG. 4 Viewing angle <Definition of viewing angle range> φ = 90? (12:00)yu θ = 0? z z' yd θ φ φ = 180? (9:00) A φ = 0? (3:00) xr φ = 270? (6:00) TFT LCD MODULE xl FIG. 5 Cross talk V V Pattern : A (Background : 127-Gray or White) Pattern : B (Window : Black) (Background : 127-Gray or White) H H

Ver 0.0 APR.07, 2002 5. Mechanical Characteristics The contents provide general mechanical characteristics for the model LM181E06-A4M1 . In addition, the figures in the next page are detailed mechanical drawing of the LCD. Outside dimensions Horizontal 27.0 ± 0.5 mm Vertical 389.0 ± 0.5 mm Depth 317.2 ± 0.5 mm Bezel area Horizontal Vertical 366.0 ± 0.5 mm 294.2 ± 0.5 mm Active display area Horizontal Vertical 359.040 mm 287.232 mm Weight (approximate) 3,100g (Typ.), 3,255 (Max.) Surface Treatment Hard coating (3H) Anti-glare treatment of the front polarizer Haze (25%)

Ver 0.0 APR.07, 2002 <FRONT VIEW>

Ver 0.0 APR.07, 2002 <REAR VIEW>

Ver 0.0 APR.07, 2002 6. Reliability Environment test condition { Result Evaluation Criteria } There should be no change which might affect the practical display function when the display quality test is conducted under normal operating condition. No Test Item Conditions

1 High temperature storage test Ta= 60°C 240hr

2 Low temperature storage test Ta= -20°C 240hr

3 High temperature operation test Ta= 50°C 50%RH 240hr

4 Low temperature operation test Ta= 0°C 240hr

5 Humidity condition operation 20%RH ~ 95%RH

6 Humidity condition storage 5%RH ~ 95%RH

(non-operating) 1. Sinusoidal Vibration 1.0G zero to peak. 10 to 500 Hz, 0.5 oct/min sweep rate. 10 to 500, 10Hz, one sweep along each axis. 2. Random Vibration 0.002 G2 /Hz, 10 to 500Hz, normal 1 GRMS. 20 minute for each of the three axis.8 Shock test (non-operating) 1. Half sine wave shock : 120G peak, half sine pulse, 2ms pulse duration. Testing shall consist of one shock in each direction in each axis, for a total of 6 shock inputs.(1 time) 2. Square wave shock : 30G peak acceleration, 180 inches/sec velocity change. There shall be one shock in each direction in each axis, for a total of 6 shock inputs.(1 time)

9 Altitude

storage / shipment 0 - 40,000 feet

10 ESD test

(Non-operation) Condition : 150pF, 330? Terminal : 200V Chassis : 10KV

Ver 0.0 APR.07, 2002 7. International Standards 7-1. Safety a) UL 1950 Third Edition, Underwriters Laboratories, Inc. Jan. 28, 1995. Standard for Safety of Information Technology Equipment Including Electrical Business Equipment. b) CAN/CSA C22.2 No. 950-95 Third Edition, Canadian Standards Association, Jan. 28, 1995. Standard for Safety of Information Technology Equipment Including Electrical Business Equipment. c) EN 60950 : 1992+A1: 1993+A2: 1993+A3: 1995+A4: 1997+A11: 1997 IEC 950 : 1991+A1: 1992+A2: 1993+A3: 1995+A4: 1996 European Committee for Electrotechnical Standardization(CENELEC) EUROPEAN STANDARD for Safety of Information Technology Equipment Including Electrical Business Equipment. 7-2. EMC a) ANSI C63.4 “Methods of Measurement of Radio-Noise Emissions from Low-Voltage Electrical and Electrical Equipment in the Range of 9kHZ to 40GHz.” American National Standards Institute(ANSI), 1992 b) C.I.S.P.R “Limits and Methods of Measurement of Radio Interface Characteristics of Information Technology Equipment.” International Special Committee on Radio Interference (Standards apply by CISPR22 class B). c) EN 55022 “Limits and Methods of Measurement of Radio Interface Characteristics of Information Technology Equipment.” European Committee for Electrotechnical Standardization (CENELEC), 1988

Ver 0.0 APR.07, 2002 8. Packing 8-1. Designation of Lot Mark a) Lot Mark A B C D E F G H I J K L M A,B,C : SIZE D : YEAR E : MONTH F,G : PANEL CODE H : ASSEMBLY CODE I,J,K,L,M : SERIAL NO. Note: 1. YEAR b) Location of Lot Mark 2. MONTH Serial NO. is printed on the label. The label is attached to the backside of the LCD module. This is subject to change without prior notice. 8-2. Packing Form a) Package quantity in one box : 5 pcs b) Box Size : 530mm × 307mm × 453mm 3. Serial No. Serial No. Mark 1 ~ 99999 00001 ~ 99999 100000 ~ A0001 ~ A9999, …… ., Z9999 YEAR Mark 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 MONTH Mark Jan. Feb. Mar. Apr. May. Jun. Jul. Aug. Sep. Oct. A Nov. B Dec. C

Ver 0.0 APR.07, 2002 9. PRECAUTIONS Please pay attention to the followings when you use this TFT LCDmodule. 9-1. MOUNTING PRECAUTIONS (1) You must mount a module using holes arranged in four corners. (2) You should consider the mounting structure so that uneven force(ex. Twisted stress) is not applied to the module. And the case on which a module is mounted should have sufficient strength so that external force is not transmitted directly to the module. (3) Please attach the surface transparent protective plate to the surface in order to protect the polarizer. Transparent protective plate should have sufficient strength in order to resist external force. (4) You should adopt radiation structure to satisfy the temperature specification. (5) Acetic acid type and chlorine type materials for the cover case are not desirable because the former generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break by electro-chemical reaction. (6) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harder than HB pencil lead. And please do not rub with dust clothes with chemical treatment. Do not touch the surface of polarizer for bare hand or greasy cloth.(Some cosmetics are detrimental to the polarizer.) (7) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materials like chamois soaks with petroleum benzene. Normal-hexane is recommended for cleaning the adhesives used to attach front / rear polarizers. Do not use acetone, toluene and alcohol because they cause chemical damage to the polarizer. (8) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes deformations and color fading. (9) Do not open the case because inside circuits do not have sufficient strength. 9-2. OPERATING PRECAUTIONS (1) The spike noise causes the mis-operation of circuits. It should be lower than following voltage: V=±200mV(Over and under shoot voltage) (2) Response time depends on the temperature.(In lower temperature, it becomes longer.) (3) Brightness depends on the temperature. (In lower temperature, it becomes lower.) And in lower temperature, response time(required time that brightness is stable after turned on) becomes longer. (4) Be careful for condensation at sudden temperature change. Condensation makes damage to polarizer or electrical contacted parts. And after fading condensation, smear or spot will occur. (5) When fixed patterns are displayed for a long time, remnant image is likely to occur. (6) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be done by system manufacturers. Grounding and shielding methods may be important to minimized the interference.

Ver 0.0 APR.07, 2002 Since a module is composed of electronic circuits, it is not strong to electrostatic discharge. Make certain that treatment persons are connected to ground through wrist band etc. And don’t touch interface pin directly. 9-3. ELECTROSTATIC DISCHARGE CONTROL Strong light exposure causes degradation of polarizer and color filter. 9-4. PRECAUTIONS FOR STRONG LIGHT EXPOSURE When storing modules as spares for a long time, the following precautions are necessary. (1) Store them in a dark place. Do not expose the module to sunlight or fluorescent light. Keep the temperature between 5°C and 35°C at normal humidity. (2) The polarizer surface should not come in contact with any other object. It is recommended that they be stored in the container in which they were shipped. 9-5. STORAGE 9-6. HANDLING PRECAUTIONS FOR PROTECTION FILM (1) The protection film is attached to the bezel with a small masking tape. When the protection film is peeled off, static electricity is generated between the film and polarizer. This should be peeled off slowly and carefully by people who are electrically grounded and with well ion-blown equipment or in such a condition, etc. (2) When the module with protection film attached is stored for a long time, sometimes there remains a very small amount of glue still on the bezel after the protection film is peeled off. (3) You can remove the glue easily. When the glue remains on the bezel surface or its vestige is recognized, please wipe them off with absorbent cotton waste or other soft material like chamois soaked with normal-hexane.

Ver 0.0 APR.07, 2002 APPENDIX 1. REQUIRED SIGNAL ASSIGNMENT FOR FlatLink(TI:SN75LVDS83) Transmitter Notes : Refer to LVDS Transmitter Data Sheet for detail descriptions. Pin # Require SignalPin Name Pin # Require SignalPin Name

1 Power Supply for TTL InputVCC 29 Ground pin for TTLGND

2 TTL Input (R7)D5 30 TTL Input (DE)D26

3 TTL Input (R5)D6 31 TTL Level clock InputTX CLKIN

4 TTL Input (G0)D7 32 Power Down InputPWR DWN

5 Ground pin for TTLGND 33 Ground pin for PLLPLL GND

6 TTL Input (G1)D8 34 Power Supply for PLLPLL VCC

7 TTL Input (G2)D9 35 Ground pin for PLLPLL GND

8 TTL Input (G6)D10 36 Ground pin for LVDSLVDS GND

9 Power Supply for TTL InputVCC 37 Positive LVDS differential data output 3TxOUT3+

10 TTL Input (G7)D11 38 Negative LVDS differential data output 3TxOUT3-

11 TTL Input (G3)D12 39 Positive LVDS differential clock outputTX CLKOUT+

12 TTL Input (G4)D13 40 Negative LVDS differential clock outputTX CLKOUT-

13 Ground pin for TTLGND 41 Positive LVDS differential data output 2TX OUT2+

14 TTL Input (G5)D14 42 Negative LVDS differential data output 2TX OUT2-

15 TTL Input (B0)D15 43 Ground pin for LVDSLVDS GND

16 TTL Input (B6)D16 44 Power Supply for LVDSLVDS VCC

17 Power Supply for TTL InputVCC 45 Positive LVDS differential data output 1TX OUT1+

46 Negative LVDS differential data output 1TX OUT1-18 TTL Input (B7)D17

47 Positive LVDS differential data output 0TX OUT0+

48 Negative LVDS differential data output 0TX OUT0-

19 TTL Input (B1)D18

20 TTL Input (B2)D19

49 Ground pin for LVDSLVDS GND21 Ground pin for TTL InputGND

22 TTL Input (B3)D20

23 TTL Input (B4)D21

50 TTL Input (R6)D27

51 TTL Input (R0)D0

24 TTL Input (B5)D22

25 TTL Input (RSVD)D23

52 TTL Input (R1)D1

53 Ground pin for TTLGND

26 Power Supply for TTL InputVCC 54 TTL Input (R2)D2

55 TTL Input (R3)D327 TTL Input (HSYNC)D24

56 TTL Input (R4)D428 TTL Input (VSYNC)D25